m32r.h

Mac OS X 10.4.9 for x86 Source Code gcc 实现源代码

   ? ROUND_ADVANCE ((unsigned int) int_size_in_bytes (TYPE))	\
   : ROUND_ADVANCE ((unsigned int) GET_MODE_SIZE (MODE)))

/* Round CUM up to the necessary point for argument MODE/TYPE.  */
#define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) (CUM)

/* Return boolean indicating arg of type TYPE and mode MODE will be passed in
   a reg.  This includes arguments that have to be passed by reference as the
   pointer to them is passed in a reg if one is available (and that is what
   we're given).
   This macro is only used in this file.  */
#define PASS_IN_REG_P(CUM, MODE, TYPE) \
  (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) < M32R_MAX_PARM_REGS)

/* Determine where to put an argument to a function.
   Value is zero to push the argument on the stack,
   or a hard register in which to store the argument.

   MODE is the argument's machine mode.
   TYPE is the data type of the argument (as a tree).
    This is null for libcalls where that information may
    not be available.
   CUM is a variable of type CUMULATIVE_ARGS which gives info about
    the preceding args and about the function being called.
   NAMED is nonzero if this argument is a named parameter
    (otherwise it is an extra parameter matching an ellipsis).  */
/* On the M32R the first M32R_MAX_PARM_REGS args are normally in registers
   and the rest are pushed.  */
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
  (PASS_IN_REG_P ((CUM), (MODE), (TYPE))			\
   ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)))	\
   : 0)

/* Update the data in CUM to advance over an argument
   of mode MODE and data type TYPE.
   (TYPE is null for libcalls where that information may not be available.)  */
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
  ((CUM) = (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \
	  + ROUND_ADVANCE_ARG ((MODE), (TYPE))))

/* If defined, a C expression that gives the alignment boundary, in bits,
   of an argument with the specified mode and type.  If it is not defined, 
   PARM_BOUNDARY is used for all arguments.  */
#if 0
/* We assume PARM_BOUNDARY == UNITS_PER_WORD here.  */
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
  (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \
   ? PARM_BOUNDARY : 2 * PARM_BOUNDARY)
#endif

/* Function results.  */

/* Define how to find the value returned by a function.
   VALTYPE is the data type of the value (as a tree).
   If the precise function being called is known, FUNC is its FUNCTION_DECL;
   otherwise, FUNC is 0.  */
#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0)

/* Define how to find the value returned by a library function
   assuming the value has mode MODE.  */
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)

/* 1 if N is a possible register number for a function value
   as seen by the caller.  */
/* ??? What about r1 in DI/DF values.  */
#define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)

/* Tell GCC to use TARGET_RETURN_IN_MEMORY.  */
#define DEFAULT_PCC_STRUCT_RETURN 0

/* Function entry and exit.  */

/* Initialize data used by insn expanders.  This is called from
   init_emit, once for each function, before code is generated.  */
#define INIT_EXPANDERS m32r_init_expanders ()

/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
   the stack pointer does not matter.  The value is tested only in
   functions that have frame pointers.
   No definition is equivalent to always zero.  */
#define EXIT_IGNORE_STACK 1

/* Output assembler code to FILE to increment profiler label # LABELNO
   for profiling a function entry.  */
#undef  FUNCTION_PROFILER
#define FUNCTION_PROFILER(FILE, LABELNO)			\
  do								\
    {								\
      if (flag_pic)						\
	{							\
	  fprintf (FILE, "\tld24 r14,#mcount\n");		\
	  fprintf (FILE, "\tadd r14,r12\n");			\
	  fprintf (FILE, "\tld r14,@r14\n");			\
	  fprintf (FILE, "\tjl r14\n");				\
	}							\
      else							\
	{							\
	  if (TARGET_ADDR24)					\
	    fprintf (FILE, "\tbl mcount\n");			\
	  else							\
	    {							\
	      fprintf (FILE, "\tseth r14,#high(mcount)\n");	\
	      fprintf (FILE, "\tor3 r14,r14,#low(mcount)\n");	\
	      fprintf (FILE, "\tjl r14\n");			\
	    }							\
	}							\
      fprintf (FILE, "\taddi sp,#4\n");				\
    }								\
  while (0)

/* Trampolines.  */

/* On the M32R, the trampoline is:

        mv      r7, lr   -> bl L1        ; 178e 7e01
L1:     add3    r6, lr, #L2-L1           ; 86ae 000c (L2 - L1 = 12)
        mv      lr, r7   -> ld r7,@r6+   ; 1e87 27e6
        ld      r6, @r6  -> jmp r6       ; 26c6 1fc6
L2:     .word STATIC
        .word FUNCTION  */

#ifndef CACHE_FLUSH_FUNC
#define CACHE_FLUSH_FUNC "_flush_cache"
#endif
#ifndef CACHE_FLUSH_TRAP
#define CACHE_FLUSH_TRAP "12"
#endif

/* Length in bytes of the trampoline for entering a nested function.  */
#define TRAMPOLINE_SIZE 24

/* Emit RTL insns to initialize the variable parts of a trampoline.
   FNADDR is an RTX for the address of the function's pure code.
   CXT is an RTX for the static chain value for the function.  */
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) 				\
  do										\
    {										\
      emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 0)),		\
		      GEN_INT							\
		      (TARGET_LITTLE_ENDIAN ? 0x017e8e17 : 0x178e7e01));	\
      emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)),		\
		      GEN_INT							\
		      (TARGET_LITTLE_ENDIAN ? 0x0c00ae86 : 0x86ae000c));	\
      emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)),		\
		      GEN_INT							\
		      (TARGET_LITTLE_ENDIAN ? 0xe627871e : 0x1e8727e6));	\
      emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)),		\
		      GEN_INT							\
		      (TARGET_LITTLE_ENDIAN ? 0xc616c626 : 0x26c61fc6));	\
      emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)),		\
		      (CXT));							\
      emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 20)),		\
		      (FNADDR));						\
      if (m32r_cache_flush_trap_string && m32r_cache_flush_trap_string[0])	\
	emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)),\
				     GEN_INT (m32r_cache_flush_trap) ));	\
      else if (m32r_cache_flush_func && m32r_cache_flush_func[0])		\
	emit_library_call (m32r_function_symbol (m32r_cache_flush_func), 	\
			   0, VOIDmode, 3, TRAMP, Pmode,			\
			   GEN_INT (TRAMPOLINE_SIZE), SImode,			\
			   GEN_INT (3), SImode);				\
    }										\
  while (0)

#define RETURN_ADDR_RTX(COUNT, FRAME) m32r_return_addr (COUNT)

#define INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM)

/* Addressing modes, and classification of registers for them.  */

/* Maximum number of registers that can appear in a valid memory address.  */
#define MAX_REGS_PER_ADDRESS 1

/* We have post-inc load and pre-dec,pre-inc store,
   but only for 4 byte vals.  */
#define HAVE_PRE_DECREMENT  1
#define HAVE_PRE_INCREMENT  1
#define HAVE_POST_INCREMENT 1

/* Recognize any constant value that is a valid address.  */
#define CONSTANT_ADDRESS_P(X)   \
  (    GET_CODE (X) == LABEL_REF  \
   ||  GET_CODE (X) == SYMBOL_REF \
   ||  GET_CODE (X) == CONST_INT  \
   || (GET_CODE (X) == CONST      \
       && ! (flag_pic && ! m32r_legitimate_pic_operand_p (X))))

/* Nonzero if the constant value X is a legitimate general operand.
   We don't allow (plus symbol large-constant) as the relocations can't
   describe it.  INTVAL > 32767 handles both 16 bit and 24 bit relocations.
   We allow all CONST_DOUBLE's as the md file patterns will force the
   constant to memory if they can't handle them.  */

#define LEGITIMATE_CONSTANT_P(X)					\
  (! (GET_CODE (X) == CONST						\
      && GET_CODE (XEXP (X, 0)) == PLUS					\
      && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF			\
      && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT			\
      && (unsigned HOST_WIDE_INT) INTVAL (XEXP (XEXP (X, 0), 1)) > 32767))

/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
   and check its validity for a certain class.
   We have two alternate definitions for each of them.
   The usual definition accepts all pseudo regs; the other rejects
   them unless they have been allocated suitable hard regs.
   The symbol REG_OK_STRICT causes the latter definition to be used.

   Most source files want to accept pseudo regs in the hope that
   they will get allocated to the class that the insn wants them to be in.
   Source files for reload pass need to be strict.
   After reload, it makes no difference, since pseudo regs have
   been eliminated by then.  */

#ifdef REG_OK_STRICT

/* Nonzero if X is a hard reg that can be used as a base reg.  */
#define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X))
/* Nonzero if X is a hard reg that can be used as an index.  */
#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)

#else

/* Nonzero if X is a hard reg that can be used as a base reg
   or if it is a pseudo reg.  */
#define REG_OK_FOR_BASE_P(X)		\
  (GPR_P (REGNO (X))			\
   || (REGNO (X)) == ARG_POINTER_REGNUM	\
   || REGNO (X) >= FIRST_PSEUDO_REGISTER)
/* Nonzero if X is a hard reg that can be used as an index
   or if it is a pseudo reg.  */
#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)

#endif

/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
   that is a valid memory address for an instruction.
   The MODE argument is the machine mode for the MEM expression
   that wants to use this address.  */

/* Local to this file.  */
#define RTX_OK_FOR_BASE_P(X) (REG_P (X) && REG_OK_FOR_BASE_P (X))

/* Local to this file.  */
#define RTX_OK_FOR_OFFSET_P(X) \
  (GET_CODE (X) == CONST_INT && INT16_P (INTVAL (X)))

/* Local to this file.  */
#define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X)			\
  (GET_CODE (X) == PLUS						\
   && RTX_OK_FOR_BASE_P (XEXP (X, 0))				\
   && RTX_OK_FOR_OFFSET_P (XEXP (X, 1)))

/* Local to this file.  */
/* For LO_SUM addresses, do not allow them if the MODE is > 1 word,
   since more than one instruction will be required.  */
#define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X)			\
  (GET_CODE (X) == LO_SUM					\
   && (MODE != BLKmode && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD)\
   && RTX_OK_FOR_BASE_P (XEXP (X, 0))				\
   && CONSTANT_P (XEXP (X, 1)))

/* Local to this file.  */
/* Is this a load and increment operation.  */
#define LOAD_POSTINC_P(MODE, X)					\
  (((MODE) == SImode || (MODE) == SFmode)			\
   && GET_CODE (X) == POST_INC					\
   && GET_CODE (XEXP (X, 0)) == REG				\
   && RTX_OK_FOR_BASE_P (XEXP (X, 0)))

/* Local to this file.  */
/* Is this an increment/decrement and store operation.  */
#define STORE_PREINC_PREDEC_P(MODE, X)				\
  (((MODE) == SImode || (MODE) == SFmode)			\
   && (GET_CODE (X) == PRE_INC || GET_CODE (X) == PRE_DEC)	\
   && GET_CODE (XEXP (X, 0)) == REG				\
   && RTX_OK_FOR_BASE_P (XEXP (X, 0)))

#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)			\
  do								\
    {								\
      if (RTX_OK_FOR_BASE_P (X))				\
	goto ADDR;						\
      if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X)))		\
	goto ADDR;						\
      if (LEGITIMATE_LO_SUM_ADDRESS_P ((MODE), (X)))		\
	goto ADDR;						\
      if (LOAD_POSTINC_P ((MODE), (X)))				\
	goto ADDR;						\
      if (STORE_PREINC_PREDEC_P ((MODE), (X)))			\
	goto ADDR;						\
    }								\
  while (0)

/* Try machine-dependent ways of modifying an illegitimate address
   to be legitimate.  If we find one, return the new, valid address.
   This macro is used in only one place: `memory_address' in explow.c.

   OLDX is the address as it was before break_out_memory_refs was called.
   In some cases it is useful to look at this to decide what needs to be done.

   MODE and WIN are passed so that this macro can use
   GO_IF_LEGITIMATE_ADDRESS.

   It is always safe for this macro to do nothing.  It exists to recognize
   opportunities to optimize the output.  */

#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)			 \
  do								 \
    {								 \
      if (flag_pic)						 \
	(X) = m32r_legitimize_pic_address (X, NULL_RTX);	 \
      if (memory_address_p (MODE, X))				 \
	goto WIN;						 \
    }								 \
  while (0)

/* Go to LABEL if ADDR (a legitimate address expression)
   has an effect that depends on the machine mode it is used for.  */
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)		\
  do								\
    {						 		\
      if (   GET_CODE (ADDR) == PRE_DEC		 		\
	  || GET_CODE (ADDR) == PRE_INC		 		\
	  || GET_CODE (ADDR) == POST_INC		 	\
	  || GET_CODE (ADDR) == LO_SUM)		 		\
	goto LABEL;					 	\
    }								\
  while (0)

/* Condition code usage.  */

/* Return nonzero if SELECT_CC_MODE will never return MODE for a
   floating point inequality comparison.  */
#define REVERSIBLE_CC_MODE(MODE) 1 /*???*/

/* Costs.  */

/* Compute extra cost of moving data between one register class
   and another.  */
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 2

/* Compute the cost of moving data between registers and memory.  */
/* Memory is 3 times as expensive as registers.
   ??? Is that the right way to look at it?  */
#define MEMORY_MOVE_COST(MODE,CLASS,IN_P) \
(GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12)

/* The cost of a branch insn.  */
/* A value of 2 here causes GCC to avoid using branches in comparisons like
   while (a < N && a).  Branches aren't that expensive on the M32R so
   we define this as 1.  Defining it as 2 had a heavy hit in fp-bit.c.  */
#define BRANCH_COST ((TARGET_BRANCH_COST) ? 2 : 1)

/* Nonzero if access to memory by bytes is slow and undesirable.
   For RISC chips, it means that access to memory by bytes is no
   better than access by words when possible, so grab a whole word