📄 athlon.md
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(eq_attr "memory" "store")))) "athlon-vector,(athlon-ieu+athlon-agu),athlon-ieu, athlon-store");; Athlon floatin point unit(define_insn_reservation "athlon_fldxf" 12 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "fmov") (and (eq_attr "memory" "load") (eq_attr "mode" "XF")))) "athlon-vector,athlon-fpload2,athlon-fvector*9")(define_insn_reservation "athlon_fldxf_k8" 13 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "fmov") (and (eq_attr "memory" "load") (eq_attr "mode" "XF")))) "athlon-vector,athlon-fpload2k8,athlon-fvector*9");; Assume superforwarding to take place so effective latency of fany op is 0.(define_insn_reservation "athlon_fld" 0 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "fmov") (eq_attr "memory" "load"))) "athlon-direct,athlon-fpload,athlon-fany")(define_insn_reservation "athlon_fld_k8" 2 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "fmov") (eq_attr "memory" "load"))) "athlon-direct,athlon-fploadk8,athlon-fstore")(define_insn_reservation "athlon_fstxf" 10 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "fmov") (and (eq_attr "memory" "store,both") (eq_attr "mode" "XF")))) "athlon-vector,(athlon-fpsched+athlon-agu),(athlon-store2+(athlon-fvector*7))")(define_insn_reservation "athlon_fstxf_k8" 8 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "fmov") (and (eq_attr "memory" "store,both") (eq_attr "mode" "XF")))) "athlon-vector,(athlon-fpsched+athlon-agu),(athlon-store2+(athlon-fvector*6))")(define_insn_reservation "athlon_fst" 4 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "fmov") (eq_attr "memory" "store,both"))) "athlon-direct,(athlon-fpsched+athlon-agu),(athlon-fstore+athlon-store)")(define_insn_reservation "athlon_fst_k8" 2 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "fmov") (eq_attr "memory" "store,both"))) "athlon-direct,(athlon-fpsched+athlon-agu),(athlon-fstore+athlon-store)")(define_insn_reservation "athlon_fist" 4 (and (eq_attr "cpu" "athlon,k8,generic64") (eq_attr "type" "fistp")) "athlon-direct,(athlon-fpsched+athlon-agu),(athlon-fstore+athlon-store)")(define_insn_reservation "athlon_fmov" 2 (and (eq_attr "cpu" "athlon,k8,generic64") (eq_attr "type" "fmov")) "athlon-direct,athlon-fpsched,athlon-faddmul")(define_insn_reservation "athlon_fadd_load" 4 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "fop") (eq_attr "memory" "load"))) "athlon-direct,athlon-fpload,athlon-fadd")(define_insn_reservation "athlon_fadd_load_k8" 6 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "fop") (eq_attr "memory" "load"))) "athlon-direct,athlon-fploadk8,athlon-fadd")(define_insn_reservation "athlon_fadd" 4 (and (eq_attr "cpu" "athlon,k8,generic64") (eq_attr "type" "fop")) "athlon-direct,athlon-fpsched,athlon-fadd")(define_insn_reservation "athlon_fmul_load" 4 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "fmul") (eq_attr "memory" "load"))) "athlon-direct,athlon-fpload,athlon-fmul")(define_insn_reservation "athlon_fmul_load_k8" 6 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "fmul") (eq_attr "memory" "load"))) "athlon-direct,athlon-fploadk8,athlon-fmul")(define_insn_reservation "athlon_fmul" 4 (and (eq_attr "cpu" "athlon,k8,generic64") (eq_attr "type" "fmul")) "athlon-direct,athlon-fpsched,athlon-fmul")(define_insn_reservation "athlon_fsgn" 2 (and (eq_attr "cpu" "athlon,k8,generic64") (eq_attr "type" "fsgn")) "athlon-direct,athlon-fpsched,athlon-fmul")(define_insn_reservation "athlon_fdiv_load" 24 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "fdiv") (eq_attr "memory" "load"))) "athlon-direct,athlon-fpload,athlon-fmul")(define_insn_reservation "athlon_fdiv_load_k8" 13 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "fdiv") (eq_attr "memory" "load"))) "athlon-direct,athlon-fploadk8,athlon-fmul")(define_insn_reservation "athlon_fdiv" 24 (and (eq_attr "cpu" "athlon") (eq_attr "type" "fdiv")) "athlon-direct,athlon-fpsched,athlon-fmul")(define_insn_reservation "athlon_fdiv_k8" 11 (and (eq_attr "cpu" "k8,generic64") (eq_attr "type" "fdiv")) "athlon-direct,athlon-fpsched,athlon-fmul")(define_insn_reservation "athlon_fpspc_load" 103 (and (eq_attr "cpu" "athlon,k8,generic64") (and (eq_attr "type" "fpspc") (eq_attr "memory" "load"))) "athlon-vector,athlon-fpload,athlon-fvector")(define_insn_reservation "athlon_fpspc" 100 (and (eq_attr "cpu" "athlon,k8,generic64") (eq_attr "type" "fpspc")) "athlon-vector,athlon-fpsched,athlon-fvector")(define_insn_reservation "athlon_fcmov_load" 7 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "fcmov") (eq_attr "memory" "load"))) "athlon-vector,athlon-fpload,athlon-fvector")(define_insn_reservation "athlon_fcmov" 7 (and (eq_attr "cpu" "athlon") (eq_attr "type" "fcmov")) "athlon-vector,athlon-fpsched,athlon-fvector")(define_insn_reservation "athlon_fcmov_load_k8" 17 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "fcmov") (eq_attr "memory" "load"))) "athlon-vector,athlon-fploadk8,athlon-fvector")(define_insn_reservation "athlon_fcmov_k8" 15 (and (eq_attr "cpu" "k8,generic64") (eq_attr "type" "fcmov")) "athlon-vector,athlon-fpsched,athlon-fvector");; fcomi is vector decoded by uses only one pipe.(define_insn_reservation "athlon_fcomi_load" 3 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "fcmp") (and (eq_attr "athlon_decode" "vector") (eq_attr "memory" "load")))) "athlon-vector,athlon-fpload,athlon-fadd")(define_insn_reservation "athlon_fcomi_load_k8" 5 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "fcmp") (and (eq_attr "athlon_decode" "vector") (eq_attr "memory" "load")))) "athlon-vector,athlon-fploadk8,athlon-fadd")(define_insn_reservation "athlon_fcomi" 3 (and (eq_attr "cpu" "athlon,k8,generic64") (and (eq_attr "athlon_decode" "vector") (eq_attr "type" "fcmp"))) "athlon-vector,athlon-fpsched,athlon-fadd")(define_insn_reservation "athlon_fcom_load" 2 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "fcmp") (eq_attr "memory" "load"))) "athlon-direct,athlon-fpload,athlon-fadd")(define_insn_reservation "athlon_fcom_load_k8" 4 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "fcmp") (eq_attr "memory" "load"))) "athlon-direct,athlon-fploadk8,athlon-fadd")(define_insn_reservation "athlon_fcom" 2 (and (eq_attr "cpu" "athlon,k8,generic64") (eq_attr "type" "fcmp")) "athlon-direct,athlon-fpsched,athlon-fadd");; Never seen by the scheduler because we still don't do post reg-stack;; scheduling.;(define_insn_reservation "athlon_fxch" 2; (and (eq_attr "cpu" "athlon,k8,generic64"); (eq_attr "type" "fxch")); "athlon-direct,athlon-fpsched,athlon-fany");; Athlon handle MMX operations in the FPU unit with shorter latencies(define_insn_reservation "athlon_movlpd_load" 0 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "ssemov") (match_operand:DF 1 "memory_operand" ""))) "athlon-direct,athlon-fpload,athlon-fany")(define_insn_reservation "athlon_movlpd_load_k8" 2 (and (eq_attr "cpu" "k8") (and (eq_attr "type" "ssemov") (match_operand:DF 1 "memory_operand" ""))) "athlon-direct,athlon-fploadk8,athlon-fstore")(define_insn_reservation "athlon_movsd_load_generic64" 2 (and (eq_attr "cpu" "generic64") (and (eq_attr "type" "ssemov") (match_operand:DF 1 "memory_operand" ""))) "athlon-double,athlon-fploadk8,(athlon-fstore+athlon-fmul)")(define_insn_reservation "athlon_movaps_load_k8" 2 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "ssemov") (and (eq_attr "mode" "V4SF,V2DF,TI") (eq_attr "memory" "load")))) "athlon-double,athlon-fpload2k8,athlon-fstore,athlon-fstore")(define_insn_reservation "athlon_movaps_load" 0 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "ssemov") (and (eq_attr "mode" "V4SF,V2DF,TI") (eq_attr "memory" "load")))) "athlon-vector,athlon-fpload2,(athlon-fany+athlon-fany)")(define_insn_reservation "athlon_movss_load" 1 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "ssemov") (and (eq_attr "mode" "SF,DI") (eq_attr "memory" "load")))) "athlon-vector,athlon-fpload,(athlon-fany*2)")(define_insn_reservation "athlon_movss_load_k8" 1 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "ssemov") (and (eq_attr "mode" "SF,DI") (eq_attr "memory" "load")))) "athlon-double,athlon-fploadk8,(athlon-fstore+athlon-fany)")(define_insn_reservation "athlon_mmxsseld" 0 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "mmxmov,ssemov") (eq_attr "memory" "load"))) "athlon-direct,athlon-fpload,athlon-fany")(define_insn_reservation "athlon_mmxsseld_k8" 2 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "mmxmov,ssemov") (eq_attr "memory" "load"))) "athlon-direct,athlon-fploadk8,athlon-fstore")(define_insn_reservation "athlon_mmxssest" 3 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "mmxmov,ssemov") (and (eq_attr "mode" "V4SF,V2DF,TI") (eq_attr "memory" "store,both")))) "athlon-vector,(athlon-fpsched+athlon-agu),((athlon-fstore+athlon-store2)*2)")(define_insn_reservation "athlon_mmxssest_k8" 3 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "mmxmov,ssemov") (and (eq_attr "mode" "V4SF,V2DF,TI") (eq_attr "memory" "store,both")))) "athlon-double,(athlon-fpsched+athlon-agu),((athlon-fstore+athlon-store2)*2)")(define_insn_reservation "athlon_mmxssest_short" 2 (and (eq_attr "cpu" "athlon,k8,generic64") (and (eq_attr "type" "mmxmov,ssemov") (eq_attr "memory" "store,both"))) "athlon-direct,(athlon-fpsched+athlon-agu),(athlon-fstore+athlon-store)")(define_insn_reservation "athlon_movaps_k8" 2 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "ssemov") (eq_attr "mode" "V4SF,V2DF,TI"))) "athlon-double,athlon-fpsched,((athlon-faddmul+athlon-faddmul) | (athlon-faddmul, athlon-faddmul))")(define_insn_reservation "athlon_movaps" 2 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "ssemov") (eq_attr "mode" "V4SF,V2DF,TI"))) "athlon-vector,athlon-fpsched,(athlon-faddmul+athlon-faddmul)")(define_insn_reservation "athlon_mmxssemov" 2 (and (eq_attr "cpu" "athlon,k8,generic64") (eq_attr "type" "mmxmov,ssemov")) "athlon-direct,athlon-fpsched,athlon-faddmul")(define_insn_reservation "athlon_mmxmul_load" 4 (and (eq_attr "cpu" "athlon,k8,generic64") (and (eq_attr "type" "mmxmul") (eq_attr "memory" "load"))) "athlon-direct,athlon-fpload,athlon-fmul")(define_insn_reservation "athlon_mmxmul" 3 (and (eq_attr "cpu" "athlon,k8,generic64") (eq_attr "type" "mmxmul")) "athlon-direct,athlon-fpsched,athlon-fmul")(define_insn_reservation "athlon_mmx_load" 3 (and (eq_attr "cpu" "athlon,k8,generic64") (and (eq_attr "unit" "mmx") (eq_attr "memory" "load"))) "athlon-direct,athlon-fpload,athlon-faddmul")(define_insn_reservation "athlon_mmx" 2 (and (eq_attr "cpu" "athlon,k8,generic64") (eq_attr "unit" "mmx")) "athlon-direct,athlon-fpsched,athlon-faddmul");; SSE operations are handled by the i387 unit as well. The latency;; is same as for i387 operations for scalar operations(define_insn_reservation "athlon_sselog_load" 3 (and (eq_attr "cpu" "athlon") (and (eq_attr "type" "sselog,sselog1") (eq_attr "memory" "load"))) "athlon-vector,athlon-fpload2,(athlon-fmul*2)")(define_insn_reservation "athlon_sselog_load_k8" 5 (and (eq_attr "cpu" "k8,generic64") (and (eq_attr "type" "sselog,sselog1") (eq_attr "memory" "load"))) "athlon-double,athlon-fpload2k8,(athlon-fmul*2)")(define_insn_reservation "athlon_sselog" 3 (and (eq_attr "cpu" "athlon") (eq_attr "type" "sselog,sselog1")) "athlon-vector,athlon-fpsched,athlon-fmul*2")(define_insn_reservation "athlon_sselog_k8" 3
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