i386.md

Mac OS X 10.4.9 for x86 Source Code gcc 实现源代码

;; GCC machine description for IA-32 and x86-64.
;; Copyright (C) 1988, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
;; 2001, 2002, 2003, 2004, 2005
;; Free Software Foundation, Inc.
;; Mostly by William Schelter.
;; x86_64 support added by Jan Hubicka
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 2, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful,
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
;; GNU General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING.  If not, write to
;; the Free Software Foundation, 59 Temple Place - Suite 330,
;; Boston, MA 02111-1307, USA.  */
;;
;; The original PO technology requires these to be ordered by speed,
;; so that assigner will pick the fastest.
;;
;; See file "rtl.def" for documentation on define_insn, match_*, et. al.
;;
;; Macro REG_CLASS_FROM_LETTER in file i386.h defines the register
;; constraint letters.
;;
;; The special asm out single letter directives following a '%' are:
;; 'z' mov%z1 would be movl, movw, or movb depending on the mode of
;;     operands[1].
;; 'L' Print the opcode suffix for a 32-bit integer opcode.
;; 'W' Print the opcode suffix for a 16-bit integer opcode.
;; 'B' Print the opcode suffix for an 8-bit integer opcode.
;; 'Q' Print the opcode suffix for a 64-bit float opcode.
;; 'S' Print the opcode suffix for a 32-bit float opcode.
;; 'T' Print the opcode suffix for an 80-bit extended real XFmode float opcode.
;; 'J' Print the appropriate jump operand.
;;
;; 'b' Print the QImode name of the register for the indicated operand.
;;     %b0 would print %al if operands[0] is reg 0.
;; 'w' Likewise, print the HImode name of the register.
;; 'k' Likewise, print the SImode name of the register.
;; 'h' Print the QImode name for a "high" register, either ah, bh, ch or dh.
;; 'y' Print "st(0)" instead of "st" as a register.

;; UNSPEC usage:

(define_constants
  [; Relocation specifiers
   (UNSPEC_GOT			0)
   (UNSPEC_GOTOFF		1)
   (UNSPEC_GOTPCREL		2)
   (UNSPEC_GOTTPOFF		3)
   (UNSPEC_TPOFF		4)
   (UNSPEC_NTPOFF		5)
   (UNSPEC_DTPOFF		6)
   (UNSPEC_GOTNTPOFF		7)
   (UNSPEC_INDNTPOFF		8)

   ; Prologue support
   (UNSPEC_STACK_ALLOC		11)
   (UNSPEC_SET_GOT		12)
   (UNSPEC_SSE_PROLOGUE_SAVE	13)
   ; APPLE LOCAL begin mainline 2006-02-17 4356747 stack realign
   (UNSPEC_REG_SAVE		14)
   (UNSPEC_DEF_CFA		15)

   ; TLS support
   (UNSPEC_TP			16)
   (UNSPEC_TLS_GD		17)
   (UNSPEC_TLS_LD_BASE		18)
   ; APPLE LOCAL end mainline 2006-02-17 4356747 stack realign

   ; Other random patterns
   (UNSPEC_SCAS			20)
   (UNSPEC_SIN			21)
   (UNSPEC_COS			22)
   (UNSPEC_FNSTSW		24)
   (UNSPEC_SAHF			25)
   (UNSPEC_FSTCW		26)
   (UNSPEC_ADD_CARRY		27)
   (UNSPEC_FLDCW		28)

   ; For SSE/MMX support:
   (UNSPEC_FIX			30)
   (UNSPEC_FIX_NOTRUNC		31)
   (UNSPEC_MASKMOV		32)
   (UNSPEC_MOVMSK		33)
   (UNSPEC_MOVNT		34)
   (UNSPEC_MOVA			38)
   (UNSPEC_MOVU			39)
   (UNSPEC_SHUFFLE		41)
   (UNSPEC_RCP			42)
   (UNSPEC_RSQRT		43)
   (UNSPEC_SFENCE		44)
   (UNSPEC_NOP			45)	; prevents combiner cleverness
   (UNSPEC_PAVGUSB		49)
   (UNSPEC_PFRCP		50)
   (UNSPEC_PFRCPIT1		51)
   (UNSPEC_PFRCPIT2		52)
   (UNSPEC_PFRSQRT		53)
   (UNSPEC_PFRSQIT1		54)
   (UNSPEC_PSHUFLW		55)
   (UNSPEC_PSHUFHW		56)
   (UNSPEC_MFENCE		59)
   (UNSPEC_LFENCE		60)
   (UNSPEC_PSADBW		61)
   (UNSPEC_ADDSUB		71)
   (UNSPEC_HADD			72)
   (UNSPEC_HSUB			73)
   (UNSPEC_MOVSHDUP		74)
   (UNSPEC_MOVSLDUP		75)
   (UNSPEC_LDQQU		76)
   (UNSPEC_MOVDDUP		77)
   ; APPLE LOCAL begin 4121692
   (UNSPEC_LDQ			101)
   (UNSPEC_MOVQ			102)
   (UNSPEC_STOQ			103)
   ; APPLE LOCAL end 4121692

   ; x87 Floating point
   (UNSPEC_FPATAN		65)
   (UNSPEC_FYL2X		66)
   (UNSPEC_FYL2XP1		67)
   (UNSPEC_FRNDINT		68)
   (UNSPEC_F2XM1		69)

   ; x87 Double output FP
   (UNSPEC_SINCOS_COS		80)
   (UNSPEC_SINCOS_SIN		81)
   (UNSPEC_TAN_ONE		82)
   (UNSPEC_TAN_TAN		83)
   (UNSPEC_XTRACT_FRACT		84)
   (UNSPEC_XTRACT_EXP		85)
   (UNSPEC_FSCALE_FRACT		86)
   (UNSPEC_FSCALE_EXP		87)
   (UNSPEC_FPREM_F		88)
   (UNSPEC_FPREM_U		89)
   (UNSPEC_FPREM1_F		90)
   (UNSPEC_FPREM1_U		91)

   ; x87 Rounding
   (UNSPEC_FRNDINT_FLOOR	96)
   (UNSPEC_FRNDINT_CEIL 	97)
   (UNSPEC_FRNDINT_TRUNC	98)
   (UNSPEC_FRNDINT_MASK_PM	99)

   ; REP instruction
   (UNSPEC_REP			75)

   (UNSPEC_EH_RETURN		76)

   (UNSPEC_COPYSIGN		100)
   ; APPLE LOCAL begin mni 4424835
   ; MNI
   (UNSPEC_PSHUFB		120)
   (UNSPEC_PSIGN		121)
   (UNSPEC_PALIGNR		122)
   ; APPLE LOCAL end mni
   ; APPLE LOCAL begin mainline April 14, 2005 Radar 4053179
   (UNSPEC_IEEE_MIN             151)     ; not commutative
   (UNSPEC_IEEE_MAX             152)     ; not commutative
   ; APPLE LOCAL end mainline April 14, 2005 Radar 4053179
  ])

(define_constants
  [(UNSPECV_BLOCKAGE		0)
   (UNSPECV_STACK_PROBE		10)
   (UNSPECV_EMMS		31)
   (UNSPECV_LDMXCSR		37)
   (UNSPECV_STMXCSR		40)
   (UNSPECV_FEMMS		46)
   (UNSPECV_CLFLUSH		57)
   (UNSPECV_ALIGN		68)
   (UNSPECV_MONITOR		69)
   (UNSPECV_MWAIT		70)
  ])

;; Registers by name.
(define_constants
  [(BP_REG			 6)
   (SP_REG			 7)
   (FLAGS_REG			17)
   (FPSR_REG			18)
   (DIRFLAG_REG			19)
  ])

;; Insns whose names begin with "x86_" are emitted by gen_FOO calls
;; from i386.c.

;; In C guard expressions, put expressions which may be compile-time
;; constants first.  This allows for better optimization.  For
;; example, write "TARGET_64BIT && reload_completed", not
;; "reload_completed && TARGET_64BIT".


; APPLE LOCAL begin mainline 2006-04-19 4434601
;; Processor type.  This attribute must exactly match the processor_type
;; enumeration in i386.h.
(define_attr "cpu" "i386,i486,pentium,pentiumpro,k6,athlon,pentium4,k8,nocona,generic32,generic64"
  (const (symbol_ref "ix86_tune")))
; APPLE LOCAL end mainline 2006-04-19 4434601

;; A basic instruction type.  Refinements due to arguments to be
;; provided in other attributes.
; APPLE LOCAL begin mainline 2005-03-16 4054919
(define_attr "type"
  "other,multi,
   alu,alu1,negnot,imov,imovx,lea,
   incdec,ishift,ishift1,rotate,rotate1,imul,idiv,
   icmp,test,ibr,setcc,icmov,
   push,pop,call,callv,leave,
   str,cld,
   fmov,fop,fsgn,fmul,fdiv,fpspc,fcmov,fcmp,fxch,fistp,fisttp,frndint,
   sselog,sselog1,sseiadd,sseishft,sseimul,
   sse,ssemov,sseadd,ssemul,ssecmp,ssecomi,ssecvt,sseicvt,ssediv,
   mmx,mmxmov,mmxadd,mmxmul,mmxcmp,mmxcvt,mmxshft"
  (const_string "other"))
; APPLE LOCAL end mainline 2005-03-16 4054919

;; Main data type used by the insn
(define_attr "mode"
  "unknown,none,QI,HI,SI,DI,SF,DF,XF,TI,V4SF,V2DF,V2SF,V1DF"
  (const_string "unknown"))

;; The CPU unit operations uses.
(define_attr "unit" "integer,i387,sse,mmx,unknown"
; APPLE LOCAL mainline 2005-03-16 4054919
  (cond [(eq_attr "type" "fmov,fop,fsgn,fmul,fdiv,fpspc,fcmov,fcmp,fxch,fistp,fisttp,frndint")
	   (const_string "i387")
	 (eq_attr "type" "sselog,sselog1,sseiadd,sseishft,sseimul,
			  sse,ssemov,sseadd,ssemul,ssecmp,ssecomi,ssecvt,sseicvt,ssediv")
	   (const_string "sse")
	 (eq_attr "type" "mmx,mmxmov,mmxadd,mmxmul,mmxcmp,mmxcvt,mmxshft")
	   (const_string "mmx")
	 (eq_attr "type" "other")
	   (const_string "unknown")]
	 (const_string "integer")))

;; The (bounding maximum) length of an instruction immediate.
(define_attr "length_immediate" ""
  (cond [(eq_attr "type" "incdec,setcc,icmov,str,cld,lea,other,multi,idiv,leave")
	   (const_int 0)
	 (eq_attr "unit" "i387,sse,mmx")
	   (const_int 0)
	 (eq_attr "type" "alu,alu1,negnot,imovx,ishift,rotate,ishift1,rotate1,
			  imul,icmp,push,pop")
	   (symbol_ref "ix86_attr_length_immediate_default(insn,1)")
	 (eq_attr "type" "imov,test")
	   (symbol_ref "ix86_attr_length_immediate_default(insn,0)")
	 (eq_attr "type" "call")
	   (if_then_else (match_operand 0 "constant_call_address_operand" "")
	     (const_int 4)
	     (const_int 0))
	 (eq_attr "type" "callv")
	   (if_then_else (match_operand 1 "constant_call_address_operand" "")
	     (const_int 4)
	     (const_int 0))
	 ;; We don't know the size before shorten_branches.  Expect
	 ;; the instruction to fit for better scheduling.
	 (eq_attr "type" "ibr")
	   (const_int 1)
	 ]
	 (symbol_ref "/* Update immediate_length and other attributes! */
		      abort(),1")))

;; The (bounding maximum) length of an instruction address.
(define_attr "length_address" ""
  (cond [(eq_attr "type" "str,cld,other,multi,fxch")
	   (const_int 0)
	 (and (eq_attr "type" "call")
	      (match_operand 0 "constant_call_address_operand" ""))
	     (const_int 0)
	 (and (eq_attr "type" "callv")
	      (match_operand 1 "constant_call_address_operand" ""))
	     (const_int 0)
	 ]
	 (symbol_ref "ix86_attr_length_address_default (insn)")))

;; Set when length prefix is used.
(define_attr "prefix_data16" ""
  (if_then_else (ior (eq_attr "mode" "HI")
		     (and (eq_attr "unit" "sse") (eq_attr "mode" "V2DF")))
    (const_int 1)
    (const_int 0)))

;; Set when string REP prefix is used.
(define_attr "prefix_rep" "" 
  (if_then_else (and (eq_attr "unit" "sse") (eq_attr "mode" "SF,DF"))
    (const_int 1)
    (const_int 0)))

;; Set when 0f opcode prefix is used.
(define_attr "prefix_0f" ""
  (if_then_else 
    (ior (eq_attr "type" "imovx,setcc,icmov")
	 (eq_attr "unit" "sse,mmx"))
    (const_int 1)
    (const_int 0)))

;; Set when REX opcode prefix is used.
(define_attr "prefix_rex" ""
  (cond [(and (eq_attr "mode" "DI")
  	      (eq_attr "type" "!push,pop,call,callv,leave,ibr"))
	   (const_int 1)
	 (and (eq_attr "mode" "QI")
	      (ne (symbol_ref "x86_extended_QIreg_mentioned_p (insn)")
		  (const_int 0)))
	   (const_int 1)
	 (ne (symbol_ref "x86_extended_reg_mentioned_p (insn)")
	     (const_int 0))
	   (const_int 1)
	]
	(const_int 0)))

;; Set when modrm byte is used.
(define_attr "modrm" ""
  (cond [(eq_attr "type" "str,cld,leave")
	   (const_int 0)
	 (eq_attr "unit" "i387")
	   (const_int 0)
         (and (eq_attr "type" "incdec")
	      (ior (match_operand:SI 1 "register_operand" "")
		   (match_operand:HI 1 "register_operand" "")))
	   (const_int 0)
	 (and (eq_attr "type" "push")
	      (not (match_operand 1 "memory_operand" "")))
	   (const_int 0)
	 (and (eq_attr "type" "pop")
	      (not (match_operand 0 "memory_operand" "")))
	   (const_int 0)
	 (and (eq_attr "type" "imov")
	      (and (match_operand 0 "register_operand" "")
	           (match_operand 1 "immediate_operand" "")))
	   (const_int 0)
	 (and (eq_attr "type" "call")
	      (match_operand 0 "constant_call_address_operand" ""))
	     (const_int 0)
	 (and (eq_attr "type" "callv")
	      (match_operand 1 "constant_call_address_operand" ""))
	     (const_int 0)
	 ]
	 (const_int 1)))

;; The (bounding maximum) length of an instruction in bytes.
;; ??? fistp and frndint are in fact fldcw/{fistp,frndint}/fldcw sequences.
;; Later we may want to split them and compute proper length as for
;; other insns.
(define_attr "length" ""
  (cond [(eq_attr "type" "other,multi,fistp,frndint")
	   (const_int 16)
	 (eq_attr "type" "fcmp")
	   (const_int 4)
	 (eq_attr "unit" "i387")
	   (plus (const_int 2)
		 (plus (attr "prefix_data16")
		       (attr "length_address")))]
	 (plus (plus (attr "modrm")
		     (plus (attr "prefix_0f")
			   (plus (attr "prefix_rex")
				 (const_int 1))))
	       (plus (attr "prefix_rep")
		     (plus (attr "prefix_data16")
			   (plus (attr "length_immediate")
				 (attr "length_address")))))))

;; The `memory' attribute is `none' if no memory is referenced, `load' or
;; `store' if there is a simple memory reference therein, or `unknown'
;; if the instruction is complex.

(define_attr "memory" "none,load,store,both,unknown"
  (cond [(eq_attr "type" "other,multi,str")
	   (const_string "unknown")
	 (eq_attr "type" "lea,fcmov,fpspc,cld")
	   (const_string "none")
	 (eq_attr "type" "fistp,leave")
	   (const_string "both")
	 (eq_attr "type" "frndint")
	   (const_string "load")
	 (eq_attr "type" "push")
	   (if_then_else (match_operand 1 "memory_operand" "")
	     (const_string "both")
	     (const_string "store"))
	 (eq_attr "type" "pop")
	   (if_then_else (match_operand 0 "memory_operand" "")
	     (const_string "both")
	     (const_string "load"))
	 (eq_attr "type" "setcc")
	   (if_then_else (match_operand 0 "memory_operand" "")
	     (const_string "store")
	     (const_string "none"))
	 (eq_attr "type" "icmp,test,ssecmp,ssecomi,mmxcmp,fcmp")
	   (if_then_else (ior (match_operand 0 "memory_operand" "")
			      (match_operand 1 "memory_operand" ""))
	     (const_string "load")
	     (const_string "none"))
	 (eq_attr "type" "ibr")
	   (if_then_else (match_operand 0 "memory_operand" "")
	     (const_string "load")
	     (const_string "none"))
	 (eq_attr "type" "call")
	   (if_then_else (match_operand 0 "constant_call_address_operand" "")
	     (const_string "none")
	     (const_string "load"))
	 (eq_attr "type" "callv")
	   (if_then_else (match_operand 1 "constant_call_address_operand" "")
	     (const_string "none")
	     (const_string "load"))
	 (and (eq_attr "type" "alu1,negnot,ishift1,sselog1")
	      (match_operand 1 "memory_operand" ""))
	   (const_string "both")