h8300.md

Mac OS X 10.4.9 for x86 Source Code gcc 实现源代码

      if (rn == REGNO (operands[0]))
	/* Move the second word first.  */
	return \"mov.w	%f1,%f0\;mov.w	%e1,%e0\";
      else
	/* Move the first word first.  */
	return \"mov.w	%e1,%e0\;mov.w	%f1,%f0\";

    case 3:
      return \"mov.w	%e1,%e0\;mov.w	%f1,%f0\";
    case 4:
      return \"mov.w	%f1,%T0\;mov.w	%e1,%T0\";
    case 5:
      return \"mov.w	%T1,%e0\;mov.w	%T1,%f0\";
    default:
      abort ();
    }
}"
  [(set (attr "length")
	(symbol_ref "compute_mov_length (operands)"))])

(define_insn "*movsf_h8300hs"
  [(set (match_operand:SF 0 "general_operand_dst" "=r,r,r,m,<,r")
	(match_operand:SF 1 "general_operand_src" "G,r,im,r,r,>"))]
  "(TARGET_H8300H || TARGET_H8300S) && !TARGET_H8300SX
   && (register_operand (operands[0], SFmode)
       || register_operand (operands[1], SFmode))"
  "@
   sub.l	%S0,%S0
   mov.l	%S1,%S0
   mov.l	%S1,%S0
   mov.l	%S1,%S0
   mov.l	%S1,%S0
   mov.l	%S1,%S0"
  [(set (attr "length")
	(symbol_ref "compute_mov_length (operands)"))
   (set_attr "cc" "set_zn,set_znv,set_znv,set_znv,set_znv,set_znv")])

;; ----------------------------------------------------------------------
;; PUSH INSTRUCTIONS
;; ----------------------------------------------------------------------

(define_insn "pushqi1_h8300"
  [(set (reg:HI SP_REG)
	(plus:HI (reg:HI SP_REG) (const_int -2)))
   (set (mem:QI (plus:HI (reg:HI SP_REG) (const_int -1)))
	(match_operand:QI 0 "register_operand" "r"))]
  "TARGET_H8300
   && operands[0] != stack_pointer_rtx"
  "mov.w\\t%T0,@-r7"
  [(set_attr "length" "2")])

(define_insn "pushqi1_h8300hs_advanced"
  [(set (reg:SI SP_REG)
	(plus:SI (reg:SI SP_REG) (const_int -4)))
   (set (mem:QI (plus:SI (reg:SI SP_REG) (const_int -3)))
	(match_operand:QI 0 "register_operand" "r"))]
  "(TARGET_H8300H || TARGET_H8300S)
   && operands[0] != stack_pointer_rtx"
  "mov.l\\t%S0,@-er7"
  [(set_attr "length" "4")])

(define_insn "pushqi1_h8300hs_normal"
  [(set (reg:HI SP_REG)
	(plus:HI (reg:HI SP_REG) (const_int -4)))
   (set (mem:QI (plus:HI (reg:HI SP_REG) (const_int -3)))
	(match_operand:QI 0 "register_operand" "r"))]
  "(TARGET_H8300H || TARGET_H8300S)
   && operands[0] != stack_pointer_rtx"
  "mov.l\\t%S0,@-er7"
  [(set_attr "length" "4")])

(define_expand "pushqi1"
  [(match_operand:QI 0 "register_operand" "")]
  ""
  "
{
  if (TARGET_H8300)
    emit_insn (gen_pushqi1_h8300 (operands[0]));
  else if (!TARGET_NORMAL_MODE)
    emit_insn (gen_pushqi1_h8300hs_advanced (operands[0]));
  else
    emit_insn (gen_pushqi1_h8300hs_normal (operands[0]));
  DONE;
}")

(define_expand "pushhi1_h8300"
  [(set (mem:HI (pre_dec:HI (reg:HI SP_REG)))
	(match_operand:HI 0 "register_operand" ""))]
  "TARGET_H8300
   && operands[0] != stack_pointer_rtx"
  "")

(define_insn "pushhi1_h8300hs_advanced"
  [(set (reg:SI SP_REG)
	(plus:SI (reg:SI SP_REG) (const_int -4)))
   (set (mem:HI (plus:SI (reg:SI SP_REG) (const_int -2)))
	(match_operand:HI 0 "register_operand" "r"))]
  "(TARGET_H8300H || TARGET_H8300S)
   && operands[0] != stack_pointer_rtx"
  "mov.l\\t%S0,@-er7"
  [(set_attr "length" "4")])

(define_insn "pushhi1_h8300hs_normal"
  [(set (reg:HI SP_REG)
	(plus:HI (reg:HI SP_REG) (const_int -4)))
   (set (mem:HI (plus:HI (reg:HI SP_REG) (const_int -2)))
	(match_operand:HI 0 "register_operand" "r"))]
  "(TARGET_H8300H || TARGET_H8300S)
   && operands[0] != stack_pointer_rtx"
  "mov.l\\t%S0,@-er7"
  [(set_attr "length" "4")])

(define_expand "pushhi1"
  [(match_operand:HI 0 "register_operand" "")]
  ""
  "
{
  if (TARGET_H8300)
    emit_insn (gen_pushhi1_h8300 (operands[0]));
  else if (!TARGET_NORMAL_MODE)
    emit_insn (gen_pushhi1_h8300hs_advanced (operands[0]));
  else
    emit_insn (gen_pushhi1_h8300hs_normal (operands[0]));
  DONE;
}")

;; ----------------------------------------------------------------------
;; TEST INSTRUCTIONS
;; ----------------------------------------------------------------------

(define_insn ""
  [(set (cc0) (zero_extract:HI (match_operand:QI 0 "bit_memory_operand" "r,U")
			       (const_int 1)
			       (match_operand 1 "const_int_operand" "n,n")))]
  "TARGET_H8300"
  "btst	%Z1,%Y0"
  [(set_attr "length" "2,4")
   (set_attr "cc" "set_zn,set_zn")])

(define_insn ""
  [(set (cc0) (zero_extract:HI (match_operand:HI 0 "register_operand" "r")
			       (const_int 1)
			       (match_operand 1 "const_int_operand" "n")))]
  "TARGET_H8300"
  "btst	%Z1,%Y0"
  [(set_attr "length" "2")
   (set_attr "cc" "set_zn")])

(define_insn_and_split "*tst_extzv_1_n"
  [(set (cc0)
	(zero_extract:SI (match_operand:QI 0 "general_operand_src" "r,U,mn>")
			 (const_int 1)
			 (match_operand 1 "const_int_operand" "n,n,n")))
   (clobber (match_scratch:QI 2 "=X,X,&r"))]
  "(TARGET_H8300H || TARGET_H8300S)"
  "@
   btst\\t%Z1,%Y0
   btst\\t%Z1,%Y0
   #"
  "&& reload_completed
   && !OK_FOR_U (operands[0])"
  [(set (match_dup 2)
	(match_dup 0))
   (parallel [(set (cc0) (zero_extract:SI (match_dup 2)
					  (const_int 1)
					  (match_dup 1)))
	      (clobber (scratch:QI))])]
  ""
  [(set_attr "length" "2,8,10")
   (set_attr "cc" "set_zn,set_zn,set_zn")])

(define_insn ""
  [(set (cc0) (zero_extract:SI (match_operand:SI 0 "register_operand" "r")
			       (const_int 1)
			       (match_operand 1 "const_int_operand" "n")))]
  "(TARGET_H8300H || TARGET_H8300S)
   && INTVAL (operands[1]) <= 15"
  "btst	%Z1,%Y0"
  [(set_attr "length" "2")
   (set_attr "cc" "set_zn")])

(define_insn_and_split "*tstsi_upper_bit"
  [(set (cc0)
	(zero_extract:SI (match_operand:SI 0 "register_operand" "r")
			 (const_int 1)
			 (match_operand 1 "const_int_operand" "n")))
   (clobber (match_scratch:SI 2 "=&r"))]
  "(TARGET_H8300H || TARGET_H8300S)
   && INTVAL (operands[1]) >= 16"
  "#"
  "&& reload_completed"
  [(set (match_dup 2)
	(ior:SI (and:SI (match_dup 2)
			(const_int -65536))
		(lshiftrt:SI (match_dup 0)
			     (const_int 16))))
   (set (cc0)
	(zero_extract:SI (match_dup 2)
			 (const_int 1)
			 (match_dup 3)))]
  "operands[3] = GEN_INT (INTVAL (operands[1]) - 16);")

(define_insn "*tstsi_variable_bit"
  [(set (cc0)
	(zero_extract:SI (match_operand:SI 0 "register_operand" "r")
			 (const_int 1)
			 (and:SI (match_operand:SI 1 "register_operand" "r")
				 (const_int 7))))]
  "TARGET_H8300H || TARGET_H8300S"
  "btst	%w1,%w0"
  [(set_attr "length" "2")
   (set_attr "cc" "set_zn")])

(define_insn_and_split "*tstsi_variable_bit_qi"
  [(set (cc0)
	(zero_extract:SI (zero_extend:SI (match_operand:QI 0 "general_operand_src" "r,U,mn>"))
			 (const_int 1)
			 (and:SI (match_operand:SI 1 "register_operand" "r,r,r")
				 (const_int 7))))
   (clobber (match_scratch:QI 2 "=X,X,&r"))]
  "(TARGET_H8300H || TARGET_H8300S)"
  "@
   btst\\t%w1,%X0
   btst\\t%w1,%X0
   #"
  "&& reload_completed
   && !OK_FOR_U (operands[0])"
  [(set (match_dup 2)
	(match_dup 0))
   (parallel [(set (cc0) (zero_extract:SI (zero_extend:SI (match_dup 2))
					  (const_int 1)
					  (and:SI (match_dup 1)
						  (const_int 7))))
	      (clobber (scratch:QI))])]
  ""
  [(set_attr "length" "2,8,10")
   (set_attr "cc" "set_zn,set_zn,set_zn")])

(define_insn "tstqi"
  [(set (cc0) (match_operand:QI 0 "register_operand" "r"))]
  ""
  "mov.b	%X0,%X0"
  [(set_attr "length" "2")
   (set_attr "cc" "set_znv")])

(define_insn "tsthi"
  [(set (cc0) (match_operand:HI 0 "register_operand" "r"))]
  ""
  "mov.w	%T0,%T0"
  [(set_attr "length" "2")
   (set_attr "cc" "set_znv")])

(define_insn "*tsthi_upper"
  [(set (cc0)
	(and:HI (match_operand:HI 0 "register_operand" "r")
		(const_int -256)))]
  ""
  "mov.b	%t0,%t0"
  [(set_attr "length" "2")
   (set_attr "cc" "set_znv")])

(define_insn "tstsi"
  [(set (cc0) (match_operand:SI 0 "register_operand" "r"))]
  "TARGET_H8300H || TARGET_H8300S"
  "mov.l	%S0,%S0"
  [(set_attr "length" "2")
   (set_attr "cc" "set_znv")])

(define_insn "*tstsi_upper"
  [(set (cc0)
	(and:SI (match_operand:SI 0 "register_operand" "r")
		(const_int -65536)))]
  ""
  "mov.w	%e0,%e0"
  [(set_attr "length" "2")
   (set_attr "cc" "set_znv")])

(define_insn "cmpqi"
  [(set (cc0)
	(compare (match_operand:QI 0 "h8300_dst_operand" "rQ")
		 (match_operand:QI 1 "h8300_src_operand" "rQi")))]
  ""
  "cmp.b	%X1,%X0"
  [(set_attr "length_table" "addb")
   (set_attr "cc" "compare")])

(define_expand "cmphi"
  [(set (cc0)
	(compare (match_operand:HI 0 "h8300_dst_operand" "")
		 (match_operand:HI 1 "h8300_src_operand" "")))]
  ""
  "
{
  /* Force operand1 into a register if we're compiling
     for the H8/300.  */
  if (GET_CODE (operands[1]) != REG && TARGET_H8300)
    operands[1] = force_reg (HImode, operands[1]);
}")

(define_insn "*cmphi_h8300_znvc"
  [(set (cc0)
	(compare (match_operand:HI 0 "register_operand" "r")
		 (match_operand:HI 1 "register_operand" "r")))]
  "TARGET_H8300"
  "cmp.w	%T1,%T0"
  [(set_attr "length" "2")
   (set_attr "cc" "compare")])

(define_insn "*cmphi_h8300hs_znvc"
  [(set (cc0)
	(compare (match_operand:HI 0 "h8300_dst_operand" "rU,rQ")
		 (match_operand:HI 1 "h8300_src_operand" "P3>X,rQi")))]
  "TARGET_H8300H || TARGET_H8300S"
  "cmp.w	%T1,%T0"
  [(set_attr "length_table" "short_immediate,addw")
   (set_attr "cc" "compare,compare")])

(define_insn "cmpsi"
  [(set (cc0)
	(compare (match_operand:SI 0 "h8300_dst_operand" "r,rQ")
		 (match_operand:SI 1 "h8300_src_operand" "P3>X,rQi")))]
  "TARGET_H8300H || TARGET_H8300S"
  "cmp.l	%S1,%S0"
  [(set_attr "length" "2,*")
   (set_attr "length_table" "*,addl")
   (set_attr "cc" "compare,compare")])

;; ----------------------------------------------------------------------
;; ADD INSTRUCTIONS
;; ----------------------------------------------------------------------

(define_expand "addqi3"
  [(set (match_operand:QI 0 "register_operand" "")
	(plus:QI (match_operand:QI 1 "register_operand" "")
		 (match_operand:QI 2 "h8300_src_operand" "")))]
  ""
  "")

(define_insn "*addqi3"
  [(set (match_operand:QI 0 "h8300_dst_operand" "=rQ")
	(plus:QI (match_operand:QI 1 "h8300_dst_operand" "%0")
		 (match_operand:QI 2 "h8300_src_operand" "rQi")))]
  "h8300_operands_match_p (operands)"
  "add.b	%X2,%X0"
  [(set_attr "length_table" "addb")
   (set_attr "cc" "set_zn")])

(define_expand "addhi3"
  [(set (match_operand:HI 0 "register_operand" "")
	(plus:HI (match_operand:HI 1 "register_operand" "")
		 (match_operand:HI 2 "h8300_src_operand" "")))]
  ""
  "")

(define_insn "*addhi3_h8300"
  [(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r")
	(plus:HI (match_operand:HI 1 "register_operand" "%0,0,0,0,0")
		 (match_operand:HI 2 "h8300_src_operand" "L,N,J,n,r")))]
  "TARGET_H8300"
  "@
   adds	%2,%T0
   subs	%G2,%T0
   add.b	%t2,%t0
   add.b	%s2,%s0\;addx	%t2,%t0
   add.w	%T2,%T0"
  [(set_attr "length" "2,2,2,4,2")
   (set_attr "cc" "none_0hit,none_0hit,clobber,clobber,set_zn")])

;; This splitter is very important to make the stack adjustment
;; interrupt-safe.  The combination of add.b and addx is unsafe!
;;
;; We apply this split after the peephole2 pass so that we won't end
;; up creating too many adds/subs when a scratch register is
;; available, which is actually a common case because stack unrolling
;; tends to happen immediately after a function call.

(define_split
  [(set (match_operand:HI 0 "stack_pointer_operand" "")
	(plus:HI (match_dup 0)
		 (match_operand 1 "const_int_gt_2_operand" "")))]
  "TARGET_H8300 && flow2_completed"
  [(const_int 0)]
  "split_adds_subs (HImode, operands); DONE;")

(define_peephole2
  [(match_scratch:HI 2 "r")
   (set (match_operand:HI 0 "stack_pointer_operand" "")
	(plus:HI (match_dup 0)
		 (match_operand:HI 1 "const_int_ge_8_operand" "")))]
  "TARGET_H8300"
  [(set (match_dup 2)
	(match_dup 1))
   (set (match_dup 0)
	(plus:HI (match_dup 0)
		 (match_dup 2)))]
  "")

(define_insn "*addhi3_h8300hs"
  [(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r")
	(plus:HI (match_operand:HI 1 "register_operand" "%0,0,0,0,0")
		 (match_operand:HI 2 "h8300_src_operand" "L,N,J,n,r")))]
  "(TARGET_H8300H || TARGET_H8300S) && !TARGET_H8300SX"
  "@
   adds	%2,%S0
   subs	%G2,%S0
   add.b	%t2,%t0
   add.w	%T2,%T0
   add.w	%T2,%T0"
  [(set_attr "length" "2,2,2,4,2")
   (set_attr "cc" "none_0hit,none_0hit,clobber,set_zn,set_zn")])

(define_insn "*addhi3_incdec"
  [(set (match_operand:HI 0 "register_operand" "=r,r")
	(unspec:HI [(match_operand:HI 1 "register_operand" "0,0")
		    (match_operand:HI 2 "incdec_operand" "M,O")]