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📄 h8300.h

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#ifndef REG_OK_STRICT#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)	\  do						\    {						\      if (h8300_legitimate_address_p ((MODE), (X), 0))	\	goto ADDR;				\    }						\  while (0)#else#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)	\  do						\    {						\      if (h8300_legitimate_address_p ((MODE), (X), 1))	\	goto ADDR;				\    }						\  while (0)#endif/* Go to LABEL if ADDR (a legitimate address expression)   has an effect that depends on the machine mode it is used for.   On the H8/300, the predecrement and postincrement address depend thus   (the amount of decrement or increment being the length of the operand).  */#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \  if (GET_CODE (ADDR) == POST_INC \      || GET_CODE (ADDR) == POST_DEC \      || GET_CODE (ADDR) == PRE_INC \      || GET_CODE (ADDR) == PRE_DEC) \    goto LABEL; \  if (GET_CODE (ADDR) == PLUS \      && h8300_get_index (XEXP (ADDR, 0), VOIDmode, 0) != XEXP (ADDR, 0)) \    goto LABEL;/* Specify the machine mode that this machine uses   for the index in the tablejump instruction.  */#define CASE_VECTOR_MODE Pmode/* Define this as 1 if `char' should by default be signed; else as 0.   On the H8/300, sign extension is expensive, so we'll say that chars   are unsigned.  */#define DEFAULT_SIGNED_CHAR 0/* This flag, if defined, says the same insns that convert to a signed fixnum   also convert validly to an unsigned one.  */#define FIXUNS_TRUNC_LIKE_FIX_TRUNC/* Max number of bytes we can move from memory to memory   in one reasonably fast instruction.  */#define MOVE_MAX	(TARGET_H8300H || TARGET_H8300S ? 4 : 2)#define MAX_MOVE_MAX	4/* Nonzero if access to memory by bytes is slow and undesirable.  */#define SLOW_BYTE_ACCESS TARGET_SLOWBYTE/* Define if shifts truncate the shift count   which implies one can omit a sign-extension or zero-extension   of a shift count.  *//* #define SHIFT_COUNT_TRUNCATED *//* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits   is done just by pretending it is already truncated.  */#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1/* Specify the machine mode that pointers have.   After generation of rtl, the compiler makes no further distinction   between pointers and any other objects of this machine mode.  */#define Pmode								      \  ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? SImode : HImode)/* ANSI C types.   We use longs for the H8/300H and the H8S because ints can be 16 or 32.   GCC requires SIZE_TYPE to be the same size as pointers.  */#define SIZE_TYPE								\  (TARGET_H8300 || TARGET_NORMAL_MODE ? TARGET_INT32 ? "short unsigned int" : "unsigned int" : "long unsigned int")#define PTRDIFF_TYPE						\  (TARGET_H8300 || TARGET_NORMAL_MODE ? TARGET_INT32 ? "short int" : "int" : "long int")#define POINTER_SIZE							\  ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? 32 : 16)#define WCHAR_TYPE "short unsigned int"#define WCHAR_TYPE_SIZE 16/* A function address in a call instruction   is a byte address (for indexing purposes)   so give the MEM rtx a byte's mode.  */#define FUNCTION_MODE QImode/* Return the length of JUMP's delay slot insn (0 if it has none).   If JUMP is a delayed branch, NEXT_INSN (PREV_INSN (JUMP)) will   be the containing SEQUENCE, not JUMP itself.  */#define DELAY_SLOT_LENGTH(JUMP) \  (NEXT_INSN (PREV_INSN (JUMP)) == JUMP ? 0 : 2)#define BRANCH_COST 0/* Tell final.c how to eliminate redundant test instructions.  *//* Here we define machine-dependent flags and fields in cc_status   (see `conditions.h').  No extra ones are needed for the h8300.  *//* Store in cc_status the expressions   that the condition codes will describe   after execution of an instruction whose pattern is EXP.   Do not alter them if the instruction would not alter the cc's.  */#define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc (EXP, INSN)/* The add insns don't set overflow in a usable way.  */#define CC_OVERFLOW_UNUSABLE 01000/* The mov,and,or,xor insns don't set carry.  That's OK though as the   Z bit is all we need when doing unsigned comparisons on the result of   these insns (since they're always with 0).  However, conditions.h has   CC_NO_OVERFLOW defined for this purpose.  Rename it to something more   understandable.  */#define CC_NO_CARRY CC_NO_OVERFLOW/* Control the assembler format that we output.  *//* Output to assembler file text saying following lines   may contain character constants, extra white space, comments, etc.  */#define ASM_APP_ON "; #APP\n"/* Output to assembler file text saying following lines   no longer contain unusual constructs.  */#define ASM_APP_OFF "; #NO_APP\n"#define FILE_ASM_OP "\t.file\n"/* The assembler op to get a word, 2 bytes for the H8/300, 4 for H8/300H.  */#define ASM_WORD_OP							\  (TARGET_H8300 || TARGET_NORMAL_MODE ? "\t.word\t" : "\t.long\t")#define TEXT_SECTION_ASM_OP "\t.section .text"#define DATA_SECTION_ASM_OP "\t.section .data"#define BSS_SECTION_ASM_OP "\t.section .bss"#undef DO_GLOBAL_CTORS_BODY#define DO_GLOBAL_CTORS_BODY			\{						\  extern func_ptr __ctors[];			\  extern func_ptr __ctors_end[];		\  func_ptr *p;					\  for (p = __ctors_end; p > __ctors; )		\    {						\      (*--p)();					\    }						\}#undef DO_GLOBAL_DTORS_BODY#define DO_GLOBAL_DTORS_BODY			\{						\  extern func_ptr __dtors[];			\  extern func_ptr __dtors_end[];		\  func_ptr *p;					\  for (p = __dtors; p < __dtors_end; p++)	\    {						\      (*p)();					\    }						\}/* How to refer to registers in assembler output.   This sequence is indexed by compiler's hard-register-number (see above).  */#define REGISTER_NAMES \{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "sp", "mac", "ap", "rap", "fp" }#define ADDITIONAL_REGISTER_NAMES \{ {"er0", 0}, {"er1", 1}, {"er2", 2}, {"er3", 3}, {"er4", 4}, \  {"er5", 5}, {"er6", 6}, {"er7", 7}, {"r7", 7} }/* Globalizing directive for a label.  */#define GLOBAL_ASM_OP "\t.global "#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \   ASM_OUTPUT_LABEL (FILE, NAME)/* The prefix to add to user-visible assembler symbols.  */#define USER_LABEL_PREFIX "_"/* This is how to store into the string LABEL   the symbol_ref name of an internal numbered label where   PREFIX is the class of label and NUM is the number within the class.   This is suitable for output with `assemble_name'.   N.B.: The h8300.md branch_true and branch_false patterns also know   how to generate internal labels.  */#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM)	\  sprintf (LABEL, "*.%s%lu", PREFIX, (unsigned long)(NUM))/* This is how to output an insn to push a register on the stack.   It need not be very fast code.  */#define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \  fprintf (FILE, "\t%s\t%s\n", h8_push_op, h8_reg_names[REGNO])/* This is how to output an insn to pop a register from the stack.   It need not be very fast code.  */#define ASM_OUTPUT_REG_POP(FILE, REGNO) \  fprintf (FILE, "\t%s\t%s\n", h8_pop_op, h8_reg_names[REGNO])/* This is how to output an element of a case-vector that is absolute.  */#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \  fprintf (FILE, "%s.L%d\n", ASM_WORD_OP, VALUE)/* This is how to output an element of a case-vector that is relative.  */#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \  fprintf (FILE, "%s.L%d-.L%d\n", ASM_WORD_OP, VALUE, REL)/* This is how to output an assembler line   that says to advance the location counter   to a multiple of 2**LOG bytes.  */#define ASM_OUTPUT_ALIGN(FILE, LOG)		\  if ((LOG) != 0)				\    fprintf (FILE, "\t.align %d\n", (LOG))#define ASM_OUTPUT_SKIP(FILE, SIZE) \  fprintf (FILE, "\t.space %d\n", (int)(SIZE))/* This says how to output an assembler line   to define a global common symbol.  */#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED)	\( fputs ("\t.comm ", (FILE)),				\  assemble_name ((FILE), (NAME)),			\  fprintf ((FILE), ",%lu\n", (unsigned long)(SIZE)))/* This says how to output the assembler to define a global   uninitialized but not common symbol.   Try to use asm_output_bss to implement this macro.  */#define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED)		\  asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \  asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)/* This says how to output an assembler line   to define a local common symbol.  */#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)	\( fputs ("\t.lcomm ", (FILE)),				\  assemble_name ((FILE), (NAME)),			\  fprintf ((FILE), ",%d\n", (int)(SIZE)))#define ASM_PN_FORMAT "%s___%lu"/* Print an instruction operand X on file FILE.   Look in h8300.c for details.  */#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \  ((CODE) == '#')#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)/* Print a memory operand whose address is X, on file FILE.   This uses a function in h8300.c.  */#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)/* H8300 specific pragmas.  */#define REGISTER_TARGET_PRAGMAS()				\  do								\    {								\      c_register_pragma (0, "saveall", h8300_pr_saveall);	\      c_register_pragma (0, "interrupt", h8300_pr_interrupt);	\    }								\  while (0)#define FINAL_PRESCAN_INSN(insn, operand, nop)	\  final_prescan_insn (insn, operand, nop)#define MOVE_RATIO 3extern int h8300_move_ratio;#undef  MOVE_RATIO#define MOVE_RATIO h8300_move_ratio/* Define the codes that are matched by predicates in h8300.c.  */#define PREDICATE_CODES							\  {"general_operand_src", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF,	\			   LABEL_REF, SUBREG, REG, MEM}},		\  {"general_operand_dst", {SUBREG, REG, MEM}},				\  {"h8300_src_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF,	\			 LABEL_REF, SUBREG, REG, MEM}},			\  {"h8300_dst_operand", {SUBREG, REG, MEM}},				\  {"nibble_operand", {CONST_INT}},					\  {"reg_or_nibble_operand", {CONST_INT, SUBREG, REG}},			\  {"h8sx_unary_shift_operator", {ASHIFTRT, LSHIFTRT, ASHIFT, ROTATE}},	\  {"h8sx_binary_shift_operator", {ASHIFTRT, LSHIFTRT, ASHIFT}},		\  {"h8sx_binary_memory_operator", {PLUS, MINUS, AND, IOR, XOR, ASHIFT,	\				   ASHIFTRT, LSHIFTRT, ROTATE}},	\  {"h8sx_unary_memory_operator", {NEG, NOT}},				\  {"h8300_ldm_parallel", {PARALLEL}},					\  {"h8300_stm_parallel", {PARALLEL}},					\  {"h8300_return_parallel", {PARALLEL}},				\  {"single_one_operand", {CONST_INT}},					\  {"single_zero_operand", {CONST_INT}},					\  {"call_insn_operand", {MEM}},						\  {"small_call_insn_operand", {MEM}},					\  {"jump_address_operand", {REG, MEM}},					\  {"two_insn_adds_subs_operand", {CONST_INT}},				\  {"bit_operand", {REG, SUBREG, MEM}},					\  {"bit_memory_operand", {MEM}},					\  {"stack_pointer_operand", {REG}},					\  {"const_int_gt_2_operand", {CONST_INT}},				\  {"const_int_ge_8_operand", {CONST_INT}},				\  {"const_int_qi_operand", {CONST_INT}},				\  {"const_int_hi_operand", {CONST_INT}},				\  {"incdec_operand", {CONST_INT}},					\  {"bit_operator", {XOR, AND, IOR}},					\  {"nshift_operator", {ASHIFTRT, LSHIFTRT, ASHIFT}},			\  {"eqne_operator", {EQ, NE}},						\  {"gtle_operator", {GT, LE, GTU, LEU}},				\  {"gtuleu_operator", {GTU, LEU}},					\  {"iorxor_operator", {IOR, XOR}},#endif /* ! GCC_H8300_H */

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