📄 h8300.h
字号:
/* 1 if N is a possible register number for a function value. On the H8, R0 is the only register thus used. */#define FUNCTION_VALUE_REGNO_P(N) ((N) == R0_REG)/* Define this if PCC uses the nonreentrant convention for returning structure and union values. *//*#define PCC_STATIC_STRUCT_RETURN*//* 1 if N is a possible register number for function argument passing. On the H8, no registers are used in this way. */#define FUNCTION_ARG_REGNO_P(N) (TARGET_QUICKCALL ? N < 3 : 0)/* When defined, the compiler allows registers explicitly used in the rtl to be used as spill registers but prevents the compiler from extending the lifetime of these registers. */#define SMALL_REGISTER_CLASSES 1/* Define a data type for recording info about an argument list during the scan of that argument list. This data type should hold all necessary information about the function itself and about the args processed so far, enough to enable macros such as FUNCTION_ARG to determine where the next arg should go. On the H8/300, this is a two item struct, the first is the number of bytes scanned so far and the second is the rtx of the called library function if any. */#define CUMULATIVE_ARGS struct cum_argstruct cum_arg{ int nbytes; struct rtx_def *libcall;};/* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to a function whose data type is FNTYPE. For a library call, FNTYPE is 0. On the H8/300, the offset starts at 0. */#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ ((CUM).nbytes = 0, (CUM).libcall = LIBNAME)/* Update the data in CUM to advance over an argument of mode MODE and data type TYPE. (TYPE is null for libcalls where that information may not be available.) */#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ ((CUM).nbytes += ((MODE) != BLKmode \ ? (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD \ : (int_size_in_bytes (TYPE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD))/* Define where to put the arguments to a function. Value is zero to push the argument on the stack, or a hard register in which to store the argument. MODE is the argument's machine mode. TYPE is the data type of the argument (as a tree). This is null for libcalls where that information may not be available. CUM is a variable of type CUMULATIVE_ARGS which gives info about the preceding args and about the function being called. NAMED is nonzero if this argument is a named parameter (otherwise it is an extra parameter matching an ellipsis). *//* On the H8/300 all normal args are pushed, unless -mquickcall in which case the first 3 arguments are passed in registers. See function `function_arg'. */#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ function_arg (&CUM, MODE, TYPE, NAMED)/* Output assembler code to FILE to increment profiler label # LABELNO for profiling a function entry. */#define FUNCTION_PROFILER(FILE, LABELNO) \ fprintf (FILE, "\t%s\t#LP%d,%s\n\tjsr @mcount\n", \ h8_mov_op, (LABELNO), h8_reg_names[0]);/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, the stack pointer does not matter. The value is tested only in functions that have frame pointers. No definition is equivalent to always zero. */#define EXIT_IGNORE_STACK 0/* We emit the entire trampoline with INITIALIZE_TRAMPOLINE. Depending on the pointer size, we use a different trampoline. Pmode == HImode vvvv context 1 0000 7903xxxx mov.w #0x1234,r3 2 0004 5A00xxxx jmp @0x1234 ^^^^ function Pmode == SImode vvvvvvvv context 2 0000 7A03xxxxxxxx mov.l #0x12345678,er3 3 0006 5Axxxxxx jmp @0x123456 ^^^^^^ function*//* Length in units of the trampoline for entering a nested function. */#define TRAMPOLINE_SIZE ((Pmode == HImode) ? 8 : 12)/* Emit RTL insns to build a trampoline. FNADDR is an RTX for the address of the function's pure code. CXT is an RTX for the static chain value for the function. */#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ do \ { \ if (Pmode == HImode) \ { \ emit_move_insn (gen_rtx_MEM (HImode, (TRAMP)), GEN_INT (0x7903)); \ emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 2)), \ (CXT)); \ emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 4)), \ GEN_INT (0x5a00)); \ emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 6)), \ (FNADDR)); \ } \ else \ { \ rtx tem = gen_reg_rtx (Pmode); \ \ emit_move_insn (gen_rtx_MEM (HImode, (TRAMP)), GEN_INT (0x7a03)); \ emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 2)), \ (CXT)); \ emit_move_insn (tem, (FNADDR)); \ emit_insn (gen_andsi3 (tem, tem, GEN_INT (0x00ffffff))); \ emit_insn (gen_iorsi3 (tem, tem, GEN_INT (0x5a000000))); \ emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 6)), \ tem); \ } \ } \ while (0)/* Addressing modes, and classification of registers for them. */#define HAVE_POST_INCREMENT 1#define HAVE_PRE_DECREMENT 1#define HAVE_POST_DECREMENT TARGET_H8300SX#define HAVE_PRE_INCREMENT TARGET_H8300SX/* Macros to check register numbers against specific register classes. *//* These assume that REGNO is a hard or pseudo reg number. They give nonzero only if REGNO is a hard reg of the suitable class or a pseudo reg currently allocated to a suitable hard reg. Since they use reg_renumber, they are safe only once reg_renumber has been allocated, which happens in local-alloc.c. */#define REGNO_OK_FOR_INDEX_P(regno) 0#define REGNO_OK_FOR_BASE_P(regno) \ (((regno) < FIRST_PSEUDO_REGISTER && regno != MAC_REG) \ || reg_renumber[regno] >= 0)/* Maximum number of registers that can appear in a valid memory address. */#define MAX_REGS_PER_ADDRESS 1/* 1 if X is an rtx for a constant that is a valid address. */#define CONSTANT_ADDRESS_P(X) \ (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ || (GET_CODE (X) == CONST_INT \ /* We handle signed and unsigned offsets here. */ \ && INTVAL (X) > (TARGET_H8300 ? -0x10000 : -0x1000000) \ && INTVAL (X) < (TARGET_H8300 ? 0x10000 : 0x1000000)) \ || (GET_CODE (X) == HIGH || GET_CODE (X) == CONST))/* Nonzero if the constant value X is a legitimate general operand. It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */#define LEGITIMATE_CONSTANT_P(X) (h8300_legitimate_constant_p (X))/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check its validity for a certain class. We have two alternate definitions for each of them. The usual definition accepts all pseudo regs; the other rejects them unless they have been allocated suitable hard regs. The symbol REG_OK_STRICT causes the latter definition to be used. Most source files want to accept pseudo regs in the hope that they will get allocated to the class that the insn wants them to be in. Source files for reload pass need to be strict. After reload, it makes no difference, since pseudo regs have been eliminated by then. *//* Non-strict versions. */#define REG_OK_FOR_INDEX_NONSTRICT_P(X) 0/* Don't use REGNO_OK_FOR_BASE_P here because it uses reg_renumber. */#define REG_OK_FOR_BASE_NONSTRICT_P(X) \ (REGNO (X) >= FIRST_PSEUDO_REGISTER || REGNO (X) != MAC_REG)/* Strict versions. */#define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))#define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))#ifndef REG_OK_STRICT#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P (X)#else#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P (X)#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)#endif/* Extra constraints. */#define OK_FOR_Q(OP) \ (TARGET_H8300SX && memory_operand ((OP), VOIDmode))#define OK_FOR_R(OP) \ (GET_CODE (OP) == CONST_INT \ ? !h8300_shift_needs_scratch_p (INTVAL (OP), QImode) \ : 0)#define OK_FOR_S(OP) \ (GET_CODE (OP) == CONST_INT \ ? !h8300_shift_needs_scratch_p (INTVAL (OP), HImode) \ : 0)#define OK_FOR_T(OP) \ (GET_CODE (OP) == CONST_INT \ ? !h8300_shift_needs_scratch_p (INTVAL (OP), SImode) \ : 0)/* 'U' if valid for a bset destination; i.e. a register, register indirect, or the eightbit memory region (a SYMBOL_REF with an SYMBOL_REF_FLAG set). On the H8S 'U' can also be a 16bit or 32bit absolute. */#define OK_FOR_U(OP) \ ((GET_CODE (OP) == REG && REG_OK_FOR_BASE_P (OP)) \ || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \ && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \ || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == SYMBOL_REF \ && TARGET_H8300S) \ || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == CONST \ && GET_CODE (XEXP (XEXP (OP, 0), 0)) == PLUS \ && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 0)) == SYMBOL_REF \ && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 1)) == CONST_INT \ && (TARGET_H8300S \ || SYMBOL_REF_FLAG (XEXP (XEXP (XEXP (OP, 0), 0), 0)))) \ || (GET_CODE (OP) == MEM \ && h8300_eightbit_constant_address_p (XEXP (OP, 0))) \ || (GET_CODE (OP) == MEM && TARGET_H8300S \ && GET_CODE (XEXP (OP, 0)) == CONST_INT))/* Multi-letter constraints starting with W are to be used for operands that require a memory operand, i.e,. that are never used along with register constraints (see EXTRA_MEMORY_CONSTRAINTS). For operands that require a memory operand (or not) but that always accept a register, a multi-letter constraint starting with Y should be used instead. */#define OK_FOR_WU(OP) \ (GET_CODE (OP) == MEM && OK_FOR_U (OP))#define OK_FOR_W(OP, STR) \ ((STR)[1] == 'U' ? OK_FOR_WU (OP) \ : 0)#define CONSTRAINT_LEN_FOR_W(STR) \ ((STR)[1] == 'U' ? 2 \ : 0)/* We don't have any constraint starting with Y yet, but before someone uses it for a one-letter constraint and we're left without any upper-case constraints left, we reserve it for extensions here. */#define OK_FOR_Y(OP, STR) \ (0)#define CONSTRAINT_LEN_FOR_Y(STR) \ (0)#define OK_FOR_Z(OP) \ (TARGET_H8300SX \ && GET_CODE (OP) == MEM \ && CONSTANT_P (XEXP ((OP), 0)))#define EXTRA_CONSTRAINT_STR(OP, C, STR) \ ((C) == 'Q' ? OK_FOR_Q (OP) : \ (C) == 'R' ? OK_FOR_R (OP) : \ (C) == 'S' ? OK_FOR_S (OP) : \ (C) == 'T' ? OK_FOR_T (OP) : \ (C) == 'U' ? OK_FOR_U (OP) : \ (C) == 'W' ? OK_FOR_W ((OP), (STR)) : \ (C) == 'Y' ? OK_FOR_Y ((OP), (STR)) : \ (C) == 'Z' ? OK_FOR_Z (OP) : \ 0)#define CONSTRAINT_LEN(C, STR) \ ((C) == 'P' ? CONSTRAINT_LEN_FOR_P (STR) \ : (C) == 'W' ? CONSTRAINT_LEN_FOR_W (STR) \ : (C) == 'Y' ? CONSTRAINT_LEN_FOR_Y (STR) \ : DEFAULT_CONSTRAINT_LEN ((C), (STR)))/* Experiments suggest that it's better not add 'Q' or 'U' here. No patterns need it for correctness (no patterns use 'Q' and 'U' without also providing a register alternative). And defining it will mean that a spilled pseudo could be replaced by its frame location in several consecutive insns. Instead, it seems to be better to force pseudos to be reloaded into registers and then use peepholes to recombine insns when beneficial. Unfortunately, for WU (unlike plain U, that matches regs as well), we must require a memory address. In fact, all multi-letter constraints started with W are supposed to have this property, so we just test for W here. */#define EXTRA_MEMORY_CONSTRAINT(C, STR) \ ((C) == 'W')
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -