m68hc11.h

Mac OS X 10.4.9 for x86 Source Code gcc 实现源代码

#define HARD_FRAME_POINTER_REGNUM	HARD_FP_REGNUM

/* Base register for access to arguments of the function.  */
#define ARG_POINTER_REGNUM		SOFT_AP_REGNUM

/* Register in which static-chain is passed to a function.  */
#define STATIC_CHAIN_REGNUM	        SOFT_Z_REGNUM


/* Definitions for register eliminations.

   This is an array of structures.  Each structure initializes one pair
   of eliminable registers.  The "from" register number is given first,
   followed by "to".  Eliminations of the same "from" register are listed
   in order of preference.

   We have two registers that are eliminated on the 6811. The pseudo arg
   pointer and pseudo frame pointer registers can always be eliminated;
   they are replaced with either the stack or the real frame pointer.  */

#define ELIMINABLE_REGS					\
{{ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM},		\
 {ARG_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM},	\
 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},		\
 {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}

/* Value should be nonzero if functions must have frame pointers.
   Zero means the frame pointer need not be set up (and parms may be
   accessed via the stack pointer) in functions that seem suitable.
   This is computed in `reload', in reload1.c.  */
#define FRAME_POINTER_REQUIRED	0

/* Given FROM and TO register numbers, say whether this elimination is allowed.
   Frame pointer elimination is automatically handled.

   All other eliminations are valid.  */

#define CAN_ELIMINATE(FROM, TO)					\
 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM	\
  ? ! frame_pointer_needed					\
  : 1)


/* Define the offset between two registers, one to be eliminated, and the other
   its replacement, at the start of a routine.  */

#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)			\
    { OFFSET = m68hc11_initial_elimination_offset (FROM, TO); }


/* Passing Function Arguments on the Stack.  */

/* If we generate an insn to push BYTES bytes, this says how many the
   stack pointer really advances by. No rounding or alignment needed
   for MC6811.  */
#define PUSH_ROUNDING(BYTES)	(BYTES)

/* Value is 1 if returning from a function call automatically pops the
   arguments described by the number-of-args field in the call. FUNTYPE is
   the data type of the function (as a tree), or for a library call it is
   an identifier node for the subroutine name.
  
   The standard MC6811 call, with arg count word, includes popping the
   args as part of the call template.  */
#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE)	0

/* Passing Arguments in Registers.  */

/* Define a data type for recording info about an argument list
   during the scan of that argument list.  This data type should
   hold all necessary information about the function itself
   and about the args processed so far, enough to enable macros
   such as FUNCTION_ARG to determine where the next arg should go.  */

typedef struct m68hc11_args
{
  int words;
  int nregs;
} CUMULATIVE_ARGS;

/* If defined, a C expression which determines whether, and in which direction,
   to pad out an argument with extra space.  The value should be of type
   `enum direction': either `upward' to pad above the argument,
   `downward' to pad below, or `none' to inhibit padding.

   Structures are stored left shifted in their argument slot.  */
#define FUNCTION_ARG_PADDING(MODE, TYPE) \
  m68hc11_function_arg_padding ((MODE), (TYPE))

#undef PAD_VARARGS_DOWN
#define PAD_VARARGS_DOWN \
  (m68hc11_function_arg_padding (TYPE_MODE (type), type) == downward)

/* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to a
   function whose data type is FNTYPE. For a library call, FNTYPE is 0.  */
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
    (m68hc11_init_cumulative_args (&CUM, FNTYPE, LIBNAME))

/* Update the data in CUM to advance over an argument of mode MODE and data
   type TYPE. (TYPE is null for libcalls where that information may not be
   available.) */
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
    (m68hc11_function_arg_advance (&CUM, MODE, TYPE, NAMED))

/* Define where to put the arguments to a function.
   Value is zero to push the argument on the stack,
   or a hard register in which to store the argument.

   MODE is the argument's machine mode.
   TYPE is the data type of the argument (as a tree).
    This is null for libcalls where that information may
    not be available.
   CUM is a variable of type CUMULATIVE_ARGS which gives info about
    the preceding args and about the function being called.
   NAMED is nonzero if this argument is a named parameter
    (otherwise it is an extra parameter matching an ellipsis).  */
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
  (m68hc11_function_arg (&CUM, MODE, TYPE, NAMED))

/* Define the profitability of saving registers around calls.

   Disable this because the saving instructions generated by
   caller-save need a reload and the way it is implemented,
   it forbids all spill registers at that point.  Enabling
   caller saving results in spill failure.  */
#define CALLER_SAVE_PROFITABLE(REFS,CALLS) 0

/* 1 if N is a possible register number for function argument passing.
   D is for 16-bit values, X is for 32-bit (X+D).  */
#define FUNCTION_ARG_REGNO_P(N)	\
     (((N) == HARD_D_REGNUM) || ((N) == HARD_X_REGNUM))

/* All return values are in the D or X+D registers:
    - 8 and 16-bit values are returned in D.
      BLKmode are passed in D as pointer.
    - 32-bit values are returned in X + D.
      The high part is passed in X and the low part in D.
      For GCC, the register number must be HARD_X_REGNUM.  */
#define FUNCTION_VALUE(VALTYPE, FUNC)					\
     gen_rtx_REG (TYPE_MODE (VALTYPE),					\
              ((TYPE_MODE (VALTYPE) == BLKmode				\
	        || GET_MODE_SIZE (TYPE_MODE (VALTYPE)) <= 2)		\
		   ? HARD_D_REGNUM : HARD_X_REGNUM))

#define LIBCALL_VALUE(MODE)						\
     gen_rtx_REG (MODE,						\
              (((MODE) == BLKmode || GET_MODE_SIZE (MODE) <= 2)		\
                   ? HARD_D_REGNUM : HARD_X_REGNUM))

/* 1 if N is a possible register number for a function value.  */
#define FUNCTION_VALUE_REGNO_P(N) \
     ((N) == HARD_D_REGNUM || (N) == HARD_X_REGNUM)

/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
   the stack pointer does not matter.  The value is tested only in functions
   that have frame pointers. No definition is equivalent to always zero.  */
#define EXIT_IGNORE_STACK	0


/* Generating Code for Profiling.  */

/* Output assembler code to FILE to increment profiler label # LABELNO
   for profiling a function entry.  */
#define FUNCTION_PROFILER(FILE, LABELNO)		\
    fprintf (FILE, "\tldy\t.LP%d\n\tjsr mcount\n", (LABELNO))
/* Length in units of the trampoline for entering a nested function.  */
#define TRAMPOLINE_SIZE		(TARGET_M6811 ? 11 : 9)

/* A C statement to initialize the variable parts of a trampoline.
   ADDR is an RTX for the address of the trampoline; FNADDR is an
   RTX for the address of the nested function; STATIC_CHAIN is an
   RTX for the static chain value that should be passed to the
   function when it is called.  */
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
  m68hc11_initialize_trampoline ((TRAMP), (FNADDR), (CXT))


/* Addressing modes, and classification of registers for them.  */

/* The 68HC12 has all the post/pre increment/decrement modes.  */
#define HAVE_POST_INCREMENT (TARGET_M6812 && TARGET_AUTO_INC_DEC)
#define HAVE_PRE_INCREMENT  (TARGET_M6812 && TARGET_AUTO_INC_DEC)
#define HAVE_POST_DECREMENT (TARGET_M6812 && TARGET_AUTO_INC_DEC)
#define HAVE_PRE_DECREMENT  (TARGET_M6812 && TARGET_AUTO_INC_DEC)

/* The class value for base registers.  This depends on the target:
   A_REGS for 68HC11 and A_OR_SP_REGS for 68HC12.  The class value
   is stored at init time.  */
extern enum reg_class m68hc11_base_reg_class;
#define BASE_REG_CLASS		m68hc11_base_reg_class

/* The class value for index registers.  This is NO_REGS for 68HC11.  */

extern enum reg_class m68hc11_index_reg_class;
#define INDEX_REG_CLASS	        m68hc11_index_reg_class

/* These assume that REGNO is a hard or pseudo reg number. They give nonzero
   only if REGNO is a hard reg of the suitable class or a pseudo reg currently
   allocated to a suitable hard reg.  Since they use reg_renumber, they are
   safe only once reg_renumber has been allocated, which happens in
   local-alloc.c.  */


/* Internal macro, return 1 if REGNO is a valid base register.  */
#define REG_VALID_P(REGNO) (1)	/* ? */

extern unsigned char m68hc11_reg_valid_for_base[FIRST_PSEUDO_REGISTER];
#define REG_VALID_FOR_BASE_P(REGNO) \
    (REG_VALID_P (REGNO) && (REGNO) < FIRST_PSEUDO_REGISTER \
     && m68hc11_reg_valid_for_base[REGNO])

/* Internal macro, return 1 if REGNO is a valid index register.  */
extern unsigned char m68hc11_reg_valid_for_index[FIRST_PSEUDO_REGISTER];
#define REG_VALID_FOR_INDEX_P(REGNO) \
    (REG_VALID_P (REGNO) >= 0 && (REGNO) < FIRST_PSEUDO_REGISTER \
     && m68hc11_reg_valid_for_index[REGNO])

/* Internal macro, the nonstrict definition for REGNO_OK_FOR_BASE_P.  */
#define REGNO_OK_FOR_BASE_NONSTRICT_P(REGNO) \
    ((REGNO) >= FIRST_PSEUDO_REGISTER \
     || REG_VALID_FOR_BASE_P (REGNO) \
     || (REGNO) == FRAME_POINTER_REGNUM \
     || (REGNO) == HARD_FRAME_POINTER_REGNUM \
     || (REGNO) == ARG_POINTER_REGNUM \
     || (reg_renumber && REG_VALID_FOR_BASE_P (reg_renumber[REGNO])))

/* Internal macro, the nonstrict definition for REGNO_OK_FOR_INDEX_P.  */
#define REGNO_OK_FOR_INDEX_NONSTRICT_P(REGNO) \
    (TARGET_M6812 \
     && ((REGNO) >= FIRST_PSEUDO_REGISTER \
         || REG_VALID_FOR_INDEX_P (REGNO) \
         || (reg_renumber && REG_VALID_FOR_INDEX_P (reg_renumber[REGNO]))))

/* Internal macro, the strict definition for REGNO_OK_FOR_BASE_P.  */
#define REGNO_OK_FOR_BASE_STRICT_P(REGNO) \
    ((REGNO) < FIRST_PSEUDO_REGISTER ? REG_VALID_FOR_BASE_P (REGNO) \
     : (reg_renumber && REG_VALID_FOR_BASE_P (reg_renumber[REGNO])))

/* Internal macro, the strict definition for REGNO_OK_FOR_INDEX_P.  */
#define REGNO_OK_FOR_INDEX_STRICT_P(REGNO) \
    (TARGET_M6812 \
     && ((REGNO) < FIRST_PSEUDO_REGISTER ? REG_VALID_FOR_INDEX_P (REGNO) \
         : (reg_renumber && REG_VALID_FOR_INDEX_P (reg_renumber[REGNO]))))

#define REGNO_OK_FOR_BASE_P2(REGNO,STRICT) \
    ((STRICT) ? (REGNO_OK_FOR_BASE_STRICT_P (REGNO)) \
              : (REGNO_OK_FOR_BASE_NONSTRICT_P (REGNO)))

#define REGNO_OK_FOR_INDEX_P2(REGNO,STRICT) \
    ((STRICT) ? (REGNO_OK_FOR_INDEX_STRICT_P (REGNO)) \
              : (REGNO_OK_FOR_INDEX_NONSTRICT_P (REGNO)))

#define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_BASE_STRICT_P (REGNO)
#define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_INDEX_STRICT_P (REGNO)

#define REG_OK_FOR_BASE_STRICT_P(X)     REGNO_OK_FOR_BASE_STRICT_P (REGNO (X))
#define REG_OK_FOR_BASE_NONSTRICT_P(X)  REGNO_OK_FOR_BASE_NONSTRICT_P (REGNO (X))
#define REG_OK_FOR_INDEX_STRICT_P(X)    REGNO_OK_FOR_INDEX_STRICT_P (REGNO (X))
#define REG_OK_FOR_INDEX_NONSTRICT_P(X) REGNO_OK_FOR_INDEX_NONSTRICT_P (REGNO (X))

/* see PUSH_POP_ADDRESS_P() below for an explanation of this.  */
#define IS_STACK_PUSH(operand) \
    ((GET_CODE (operand) == MEM) \
     && (GET_CODE (XEXP (operand, 0)) == PRE_DEC) \
     && (SP_REG_P (XEXP (XEXP (operand, 0), 0))))

#define IS_STACK_POP(operand) \
    ((GET_CODE (operand) == MEM) \
     && (GET_CODE (XEXP (operand, 0)) == POST_INC) \
     && (SP_REG_P (XEXP (XEXP (operand, 0), 0))))

/* 1 if X is an rtx for a constant that is a valid address.  */
#define CONSTANT_ADDRESS_P(X)	(CONSTANT_P (X))

/* Maximum number of registers that can appear in a valid memory address */
#define MAX_REGS_PER_ADDRESS	2

/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
   valid memory address for an instruction. The MODE argument is the
   machine mode for the MEM expression that wants to use this address.  */

/*--------------------------------------------------------------
   Valid addresses are either direct or indirect (MEM) versions
   of the following forms:
	constant		N
	register		,X
	indexed			N,X
--------------------------------------------------------------*/

/* The range of index that is allowed by indirect addressing.  */

#define VALID_MIN_OFFSET m68hc11_min_offset
#define VALID_MAX_OFFSET m68hc11_max_offset

/* The offset values which are allowed by the n,x and n,y addressing modes.
   Take into account the size of the mode because we may have to add
   a mode offset to access the lowest part of the data.
   (For example, for an SImode, the last valid offset is 252.) */
#define VALID_CONSTANT_OFFSET_P(X,MODE)		\
(((GET_CODE (X) == CONST_INT) &&			\
  ((INTVAL (X) >= VALID_MIN_OFFSET)		\
     && ((INTVAL (X) <= VALID_MAX_OFFSET		\
		- (HOST_WIDE_INT) (GET_MODE_SIZE (MODE) + 1))))) \
|| (TARGET_M6812 \
    && ((GET_CODE (X) == SYMBOL_REF) \
        || GET_CODE (X) == LABEL_REF \
        || GET_CODE (X) == CONST)))

/* This is included to allow stack push/pop operations. Special hacks in the
   md and m6811.c files exist to support this.  */
#define PUSH_POP_ADDRESS_P(X) \
  (((GET_CODE (X) == PRE_DEC) || (GET_CODE (X) == POST_INC)) \
	&& SP_REG_P (XEXP (X, 0)))

/* Go to ADDR if X is a valid address.  */
#ifndef REG_OK_STRICT
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
{ \