iq2000.h

Mac OS X 10.4.9 for x86 Source Code gcc 实现源代码

/* Definitions of target machine for GNU compiler.  
   Vitesse IQ2000 processors
   Copyright (C) 2003, 2004, 2005 Free Software Foundation, Inc.

   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published
   by the Free Software Foundation; either version 2, or (at your
   option) any later version.

   GCC is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License
   along with GCC; see the file COPYING.  If not, write to the Free
   Software Foundation, 59 Temple Place - Suite 330, Boston, MA
   02111-1307, USA.  */

/* Driver configuration.  */

#undef  SWITCH_TAKES_ARG
#define SWITCH_TAKES_ARG(CHAR)						\
  (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')

/* The svr4.h LIB_SPEC with -leval and --*group tacked on */
#undef  LIB_SPEC
#define LIB_SPEC "%{!shared:%{!symbolic:--start-group -lc -leval -lgcc --end-group}}"

#undef STARTFILE_SPEC
#undef ENDFILE_SPEC


/* Run-time target specifications.  */

#define TARGET_CPU_CPP_BUILTINS()               \
  do                                            \
    {                                           \
      builtin_define ("__iq2000__"); 		\
      builtin_assert ("cpu=iq2000"); 		\
      builtin_assert ("machine=iq2000");	\
    }                                           \
  while (0)

extern int	target_flags;

#define MASK_GPOPT         0x00000008   /* Optimize for global pointer.  */
#define MASK_EMBEDDED_DATA 0x00008000   /* Reduce RAM usage, not fast code.  */
#define MASK_UNINIT_CONST_IN_RODATA \
                           0x00800000   /* Store uninitialized
                                           consts in rodata.  */

/* Macros used in the machine description to test the flags.  */

#define TARGET_STATS		0

/* For embedded systems, optimize for reduced RAM space instead of for
   fastest code.  */
#define TARGET_EMBEDDED_DATA	(target_flags & MASK_EMBEDDED_DATA)

#define TARGET_DEBUG_MODE	(target_flags & 0)
#define TARGET_DEBUG_A_MODE	(target_flags & 0)
#define TARGET_DEBUG_B_MODE	(target_flags & 0)
#define TARGET_DEBUG_C_MODE	(target_flags & 0)
#define TARGET_DEBUG_D_MODE	(target_flags & 0)

#define TARGET_SWITCHES							\
{									\
  {"no-crt0",          0,                                               \
     N_("No default crt0.o") },					 	\
  {"gpopt",		  MASK_GPOPT,					\
     N_("Use GP relative sdata/sbss sections")},			\
  {"no-gpopt",		 -MASK_GPOPT,					\
     N_("Don't use GP relative sdata/sbss sections")},			\
  {"embedded-data",	  MASK_EMBEDDED_DATA,				\
     N_("Use ROM instead of RAM")},					\
  {"no-embedded-data",	 -MASK_EMBEDDED_DATA,				\
     N_("Don't use ROM instead of RAM")},				\
  {"uninit-const-in-rodata", MASK_UNINIT_CONST_IN_RODATA,		\
     N_("Put uninitialized constants in ROM (needs -membedded-data)")},	\
  {"no-uninit-const-in-rodata", -MASK_UNINIT_CONST_IN_RODATA,		\
     N_("Don't put uninitialized constants in ROM")},			\
  {"",			  (TARGET_DEFAULT				\
			   | TARGET_CPU_DEFAULT),			\
     NULL},								\
}

/* Default target_flags if no switches are specified.  */

#define TARGET_DEFAULT 0

#ifndef TARGET_CPU_DEFAULT
#define TARGET_CPU_DEFAULT 0
#endif

#ifndef IQ2000_ISA_DEFAULT
#define IQ2000_ISA_DEFAULT 1
#endif

#define TARGET_OPTIONS							\
{									\
  SUBTARGET_TARGET_OPTIONS						\
  { "cpu=",	& iq2000_cpu_string,					\
      N_("Specify CPU for scheduling purposes")},			\
  { "arch=",    & iq2000_arch_string,                                   \
      N_("Specify CPU for code generation purposes")},                  \
}

/* This is meant to be redefined in the host dependent files.  */
#define SUBTARGET_TARGET_OPTIONS

#define IQ2000_VERSION "[1.0]"

#ifndef MACHINE_TYPE
#define MACHINE_TYPE "IQ2000"
#endif

#ifndef TARGET_VERSION_INTERNAL
#define TARGET_VERSION_INTERNAL(STREAM)					\
  fprintf (STREAM, " %s %s", IQ2000_VERSION, MACHINE_TYPE)
#endif

#ifndef TARGET_VERSION
#define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr)
#endif

#define OVERRIDE_OPTIONS override_options ()

#define CAN_DEBUG_WITHOUT_FP

/* Storage Layout.  */

#define BITS_BIG_ENDIAN 		0
#define BYTES_BIG_ENDIAN 		1 
#define WORDS_BIG_ENDIAN 		1
#define LIBGCC2_WORDS_BIG_ENDIAN	1
#define BITS_PER_WORD 			32
#define MAX_BITS_PER_WORD 		64
#define UNITS_PER_WORD 			4
#define MIN_UNITS_PER_WORD 		4
#define POINTER_SIZE 			32

/* Define this macro if it is advisable to hold scalars in registers
   in a wider mode than that declared by the program.  In such cases,
   the value is constrained to be within the bounds of the declared
   type, but kept valid in the wider mode.  The signedness of the
   extension may differ from that of the type.

   We promote any value smaller than SImode up to SImode.  */

#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)	\
  if (GET_MODE_CLASS (MODE) == MODE_INT		\
      && GET_MODE_SIZE (MODE) < 4)		\
    (MODE) = SImode;

#define PARM_BOUNDARY 32

#define STACK_BOUNDARY 64

#define FUNCTION_BOUNDARY 32

#define BIGGEST_ALIGNMENT 64

#undef  DATA_ALIGNMENT
#define DATA_ALIGNMENT(TYPE, ALIGN)					\
  ((((ALIGN) < BITS_PER_WORD)						\
    && (TREE_CODE (TYPE) == ARRAY_TYPE					\
	|| TREE_CODE (TYPE) == UNION_TYPE				\
	|| TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))

#define CONSTANT_ALIGNMENT(EXP, ALIGN)					\
  ((TREE_CODE (EXP) == STRING_CST  || TREE_CODE (EXP) == CONSTRUCTOR)	\
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))

#define EMPTY_FIELD_BOUNDARY 32

#define STRUCTURE_SIZE_BOUNDARY 8

#define STRICT_ALIGNMENT 1

#define PCC_BITFIELD_TYPE_MATTERS 1

#define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT


/* Layout of Source Language Data Types.  */

#define INT_TYPE_SIZE 		32
#define SHORT_TYPE_SIZE 	16
#define LONG_TYPE_SIZE 		32
#define LONG_LONG_TYPE_SIZE 	64
#define CHAR_TYPE_SIZE		BITS_PER_UNIT
#define FLOAT_TYPE_SIZE 	32
#define DOUBLE_TYPE_SIZE 	64
#define LONG_DOUBLE_TYPE_SIZE	64
#define DEFAULT_SIGNED_CHAR	1


/* Register Basics.  */

/* On the IQ2000, we have 32 integer registers.  */
#define FIRST_PSEUDO_REGISTER 33

#define FIXED_REGISTERS							\
{									\
  1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,			\
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1			\
}

#define CALL_USED_REGISTERS						\
{									\
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,			\
  0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 1			\
}


/* Order of allocation of registers.  */

#define REG_ALLOC_ORDER							\
{  0,  1,  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15,	\
  16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31	\
}


/* How Values Fit in Registers.  */

#define HARD_REGNO_NREGS(REGNO, MODE)   \
  ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

#define HARD_REGNO_MODE_OK(REGNO, MODE) 			\
 ((REGNO_REG_CLASS (REGNO) == GR_REGS)				\
  ? ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) <= 4     	\
  : ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) == 4)

#define MODES_TIEABLE_P(MODE1, MODE2)				\
  ((GET_MODE_CLASS (MODE1) == MODE_FLOAT ||			\
    GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT)		\
   == (GET_MODE_CLASS (MODE2) == MODE_FLOAT ||			\
       GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))

#define AVOID_CCMODE_COPIES


/* Register Classes.  */

enum reg_class
{
  NO_REGS,			/* No registers in set.  */
  GR_REGS,			/* Integer registers.  */
  ALL_REGS,			/* All registers.  */
  LIM_REG_CLASSES		/* Max value + 1.  */
};

#define GENERAL_REGS GR_REGS

#define N_REG_CLASSES (int) LIM_REG_CLASSES

#define REG_CLASS_NAMES						\
{								\
  "NO_REGS",							\
  "GR_REGS",							\
  "ALL_REGS"							\
}

#define REG_CLASS_CONTENTS					\
{								\
  { 0x00000000, 0x00000000 },	/* No registers,  */		\
  { 0xffffffff, 0x00000000 },	/* Integer registers.  */	\
  { 0xffffffff, 0x00000001 }	/* All registers.  */		\
}

#define REGNO_REG_CLASS(REGNO) \
((REGNO) <= GP_REG_LAST + 1 ? GR_REGS : NO_REGS)

#define BASE_REG_CLASS  (GR_REGS)

#define INDEX_REG_CLASS NO_REGS

#define REG_CLASS_FROM_LETTER(C) \
  ((C) == 'd' ? GR_REGS :        \
   (C) == 'b' ? ALL_REGS :       \
   (C) == 'y' ? GR_REGS :        \
   NO_REGS)

#define REGNO_OK_FOR_INDEX_P(regno)	0

#define PREFERRED_RELOAD_CLASS(X,CLASS)				\
  ((CLASS) != ALL_REGS						\
   ? (CLASS)							\
   : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT		\
       || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT)	\
      ? (GR_REGS)						\
      : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT		\
	  || GET_MODE (X) == VOIDmode)				\
	 ? (GR_REGS)						\
	 : (CLASS))))

#define SMALL_REGISTER_CLASSES 0

#define CLASS_MAX_NREGS(CLASS, MODE)    \
  ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

/* For IQ2000:

   `I'	is used for the range of constants an arithmetic insn can
	actually contain (16 bits signed integers).

   `J'	is used for the range which is just zero (i.e., $r0).

   `K'	is used for the range of constants a logical insn can actually
	contain (16 bit zero-extended integers).

   `L'	is used for the range of constants that be loaded with lui
	(i.e., the bottom 16 bits are zero).

   `M'	is used for the range of constants that take two words to load
	(i.e., not matched by `I', `K', and `L').

   `N'	is used for constants 0xffffnnnn or 0xnnnnffff

   `O'	is a 5 bit zero-extended integer.  */

#define CONST_OK_FOR_LETTER_P(VALUE, C)					\
  ((C) == 'I' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000)	\
   : (C) == 'J' ? ((VALUE) == 0)					\
   : (C) == 'K' ? ((unsigned HOST_WIDE_INT) (VALUE) < 0x10000)		\
   : (C) == 'L' ? (((VALUE) & 0x0000ffff) == 0				\
		   && (((VALUE) & ~2147483647) == 0			\
		       || ((VALUE) & ~2147483647) == ~2147483647))	\
   : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0)			\
		   && (((VALUE) & ~0x0000ffff) != ~0x0000ffff)		\
		   && (((VALUE) & 0x0000ffff) != 0			\
		       || (((VALUE) & ~2147483647) != 0			\
			   && ((VALUE) & ~2147483647) != ~2147483647)))	\
   : (C) == 'N' ? ((((VALUE) & 0xffff) == 0xffff)			\
		   || (((VALUE) & 0xffff0000) == 0xffff0000))		\
   : (C) == 'O' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x20) < 0x40)	\
   : 0)

#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)				\
  ((C) == 'G'								\
   && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))

/* `R' is for memory references which take 1 word for the instruction.  */

#define EXTRA_CONSTRAINT(OP,CODE)					\
  (((CODE) == 'R')	  ? simple_memory_operand (OP, GET_MODE (OP))	\
   : FALSE)


/* Basic Stack Layout.  */

#define STACK_GROWS_DOWNWARD

/* #define FRAME_GROWS_DOWNWARD */

#define STARTING_FRAME_OFFSET						\
  (current_function_outgoing_args_size)

/* Use the default value zero.  */
/* #define STACK_POINTER_OFFSET 0 */

#define FIRST_PARM_OFFSET(FNDECL) 0

/* The return address for the current frame is in r31 if this is a leaf
   function.  Otherwise, it is on the stack.  It is at a variable offset
   from sp/fp/ap, so we define a fake hard register rap which is a
   pointer to the return address on the stack.  This always gets eliminated
   during reload to be either the frame pointer or the stack pointer plus
   an offset.  */

#define RETURN_ADDR_RTX(count, frame)                                   \
  (((count) == 0)                                                       \
   ? (leaf_function_p ()                                                \
      ? gen_rtx_REG (Pmode, GP_REG_FIRST + 31)                          \
      : gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode,                         \
                                         RETURN_ADDRESS_POINTER_REGNUM))) \
    : (rtx) 0)

/* Before the prologue, RA lives in r31.  */
#define INCOMING_RETURN_ADDR_RTX  gen_rtx_REG (VOIDmode, GP_REG_FIRST + 31)


/* Register That Address the Stack Frame.  */

#define STACK_POINTER_REGNUM 		(GP_REG_FIRST + 29)
#define FRAME_POINTER_REGNUM 		(GP_REG_FIRST + 1)
#define HARD_FRAME_POINTER_REGNUM 	(GP_REG_FIRST + 27)
#define ARG_POINTER_REGNUM 		GP_REG_FIRST
#define RETURN_ADDRESS_POINTER_REGNUM	RAP_REG_NUM
#define STATIC_CHAIN_REGNUM 		(GP_REG_FIRST + 2)


/* Eliminating the Frame Pointer and the Arg Pointer.  */

#define FRAME_POINTER_REQUIRED 0

#define ELIMINABLE_REGS							\
{{ ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM},				\
 { ARG_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM},			\
 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},		\
 { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},		\
 { RETURN_ADDRESS_POINTER_REGNUM, GP_REG_FIRST + 31},			\
 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},				\
 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}


/* We can always eliminate to the frame pointer.  We can eliminate to the 
   stack pointer unless a frame pointer is needed.  */