📄 alpha.h
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extern const char *alpha_fprm_string; /* For -mfp-rounding-mode=[n|m|c|d] */extern const char *alpha_fptm_string; /* For -mfp-trap-mode=[n|u|su|sui] */extern const char *alpha_tp_string; /* For -mtrap-precision=[p|f|i] */extern const char *alpha_mlat_string; /* For -mmemory-latency= */extern const char *alpha_tls_size_string; /* For -mtls-size= */#define TARGET_OPTIONS \{ \ {"cpu=", &alpha_cpu_string, \ N_("Use features of and schedule given CPU"), 0}, \ {"tune=", &alpha_tune_string, \ N_("Schedule given CPU"), 0}, \ {"fp-rounding-mode=", &alpha_fprm_string, \ N_("Control the generated fp rounding mode"), 0}, \ {"fp-trap-mode=", &alpha_fptm_string, \ N_("Control the IEEE trap mode"), 0}, \ {"trap-precision=", &alpha_tp_string, \ N_("Control the precision given to fp exceptions"), 0}, \ {"memory-latency=", &alpha_mlat_string, \ N_("Tune expected memory latency"), 0}, \ {"tls-size=", &alpha_tls_size_string, \ N_("Specify bit size of immediate TLS offsets"), 0}, \}/* Support for a compile-time default CPU, et cetera. The rules are: --with-cpu is ignored if -mcpu is specified. --with-tune is ignored if -mtune is specified. */#define OPTION_DEFAULT_SPECS \ {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \ {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }/* This macro defines names of additional specifications to put in the specs that can be used in various specifications like CC1_SPEC. Its definition is an initializer with a subgrouping for each command option. Each subgrouping contains a string constant, that defines the specification name, and a string constant that used by the GCC driver program. Do not define this macro if it does not need to do anything. */#ifndef SUBTARGET_EXTRA_SPECS#define SUBTARGET_EXTRA_SPECS#endif#define EXTRA_SPECS \ { "cpp_subtarget", CPP_SUBTARGET_SPEC }, \ SUBTARGET_EXTRA_SPECS/* Sometimes certain combinations of command options do not make sense on a particular target machine. You can define a macro `OVERRIDE_OPTIONS' to take account of this. This macro, if defined, is executed once just after all the command options have been parsed. On the Alpha, it is used to translate target-option strings into numeric values. */#define OVERRIDE_OPTIONS override_options ()/* Define this macro to change register usage conditional on target flags. On the Alpha, we use this to disable the floating-point registers when they don't exist. */#define CONDITIONAL_REGISTER_USAGE \{ \ int i; \ if (! TARGET_FPREGS) \ for (i = 32; i < 63; i++) \ fixed_regs[i] = call_used_regs[i] = 1; \}/* Show we can debug even without a frame pointer. */#define CAN_DEBUG_WITHOUT_FP/* target machine storage layout *//* Define the size of `int'. The default is the same as the word size. */#define INT_TYPE_SIZE 32/* Define the size of `long long'. The default is the twice the word size. */#define LONG_LONG_TYPE_SIZE 64/* We're IEEE unless someone says to use VAX. */#define TARGET_FLOAT_FORMAT \ (TARGET_FLOAT_VAX ? VAX_FLOAT_FORMAT : IEEE_FLOAT_FORMAT)/* The two floating-point formats we support are S-floating, which is 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double' and `long double' are T. */#define FLOAT_TYPE_SIZE 32#define DOUBLE_TYPE_SIZE 64#define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)/* Define this to set long double type size to use in libgcc2.c, which can not depend on target_flags. */#ifdef __LONG_DOUBLE_128__#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128#else#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64#endif/* Work around target_flags dependency in ada/targtyps.c. */#define WIDEST_HARDWARE_FP_SIZE 64#define WCHAR_TYPE "unsigned int"#define WCHAR_TYPE_SIZE 32/* Define this macro if it is advisable to hold scalars in registers in a wider mode than that declared by the program. In such cases, the value is constrained to be within the bounds of the declared type, but kept valid in the wider mode. The signedness of the extension may differ from that of the type. For Alpha, we always store objects in a full register. 32-bit integers are always sign-extended, but smaller objects retain their signedness. Note that small vector types can get mapped onto integer modes at the whim of not appearing in alpha-modes.def. We never promoted these values before; don't do so now that we've trimmed the set of modes to those actually implemented in the backend. */#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ if (GET_MODE_CLASS (MODE) == MODE_INT \ && (TYPE == NULL || TREE_CODE (TYPE) != VECTOR_TYPE) \ && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ { \ if ((MODE) == SImode) \ (UNSIGNEDP) = 0; \ (MODE) = DImode; \ }/* Define this if most significant bit is lowest numbered in instructions that operate on numbered bit-fields. There are no such instructions on the Alpha, but the documentation is little endian. */#define BITS_BIG_ENDIAN 0/* Define this if most significant byte of a word is the lowest numbered. This is false on the Alpha. */#define BYTES_BIG_ENDIAN 0/* Define this if most significant word of a multiword number is lowest numbered. For Alpha we can decide arbitrarily since there are no machine instructions for them. Might as well be consistent with bytes. */#define WORDS_BIG_ENDIAN 0/* Width of a word, in units (bytes). */#define UNITS_PER_WORD 8/* Width in bits of a pointer. See also the macro `Pmode' defined below. */#define POINTER_SIZE 64/* Allocation boundary (in *bits*) for storing arguments in argument list. */#define PARM_BOUNDARY 64/* Boundary (in *bits*) on which stack pointer should be aligned. */#define STACK_BOUNDARY 128/* Allocation boundary (in *bits*) for the code of a function. */#define FUNCTION_BOUNDARY 32/* Alignment of field after `int : 0' in a structure. */#define EMPTY_FIELD_BOUNDARY 64/* Every structure's size must be a multiple of this. */#define STRUCTURE_SIZE_BOUNDARY 8/* A bit-field declared as `int' forces `int' alignment for the struct. */#define PCC_BITFIELD_TYPE_MATTERS 1/* No data type wants to be aligned rounder than this. */#define BIGGEST_ALIGNMENT 128/* For atomic access to objects, must have at least 32-bit alignment unless the machine has byte operations. */#define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32))/* Align all constants and variables to at least a word boundary so we can pick up pieces of them faster. *//* ??? Only if block-move stuff knows about different source/destination alignment. */#if 0#define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)#define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)#endif/* Set this nonzero if move instructions will actually fail to work when given unaligned data. Since we get an error message when we do one, call them invalid. */#define STRICT_ALIGNMENT 1/* Set this nonzero if unaligned move instructions are extremely slow. On the Alpha, they trap. */#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1/* Our SIMD is all done on single integer registers. */#define UNITS_PER_SIMD_WORD UNITS_PER_WORD/* Standard register usage. *//* Number of actual hardware registers. The hardware registers are assigned numbers for the compiler from 0 to just below FIRST_PSEUDO_REGISTER. All registers that the compiler knows about must be given numbers, even those that are not normally considered general registers. We define all 32 integer registers, even though $31 is always zero, and all 32 floating-point registers, even though $f31 is also always zero. We do not bother defining the FP status register and there are no other registers. Since $31 is always zero, we will use register number 31 as the argument pointer. It will never appear in the generated code because we will always be eliminating it in favor of the stack pointer or hardware frame pointer. Likewise, we use $f31 for the frame pointer, which will always be eliminated in favor of the hardware frame pointer or the stack pointer. */#define FIRST_PSEUDO_REGISTER 64/* 1 for registers that have pervasive standard uses and are not available for the register allocator. */#define FIXED_REGISTERS \ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }/* 1 for registers not available across function calls. These must include the FIXED_REGISTERS and also any registers that can be used without being saved. The latter must include the registers where values are returned and the register where structure-value addresses are passed. Aside from that, you can include as many other registers as you like. */#define CALL_USED_REGISTERS \ {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \ 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }/* List the order in which to allocate registers. Each register must be listed once, even those in FIXED_REGISTERS. */#define REG_ALLOC_ORDER { \ 1, 2, 3, 4, 5, 6, 7, 8, /* nonsaved integer registers */ \ 22, 23, 24, 25, 28, /* likewise */ \ 0, /* likewise, but return value */ \ 21, 20, 19, 18, 17, 16, /* likewise, but input args */ \ 27, /* likewise, but OSF procedure value */ \ \ 42, 43, 44, 45, 46, 47, /* nonsaved floating-point registers */ \ 54, 55, 56, 57, 58, 59, /* likewise */ \ 60, 61, 62, /* likewise */ \ 32, 33, /* likewise, but return values */ \ 53, 52, 51, 50, 49, 48, /* likewise, but input args */ \ \ 9, 10, 11, 12, 13, 14, /* saved integer registers */ \ 26, /* return address */ \ 15, /* hard frame pointer */ \ \ 34, 35, 36, 37, 38, 39, /* saved floating-point registers */ \ 40, 41, /* likewise */ \ \ 29, 30, 31, 63 /* gp, sp, ap, sfp */ \}/* Return number of consecutive hard regs needed starting at reg REGNO to hold something of mode MODE. This is ordinarily the length in words of a value of mode MODE but can be less for certain modes in special long registers. */#define HARD_REGNO_NREGS(REGNO, MODE) \ ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. On Alpha, the integer registers can hold any mode. The floating-point registers can hold 64-bit integers as well, but not smaller values. */#define HARD_REGNO_MODE_OK(REGNO, MODE) \ ((REGNO) >= 32 && (REGNO) <= 62 \ ? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \ || (MODE) == SCmode || (MODE) == DCmode \ : 1)/* A C expression that is nonzero if a value of mode MODE1 is accessible in mode MODE2 without copying. This asymmetric test is true when MODE1 could be put in an FP register but MODE2 could not. */#define MODES_TIEABLE_P(MODE1, MODE2) \ (HARD_REGNO_MODE_OK (32, (MODE1)) \ ? HARD_REGNO_MODE_OK (32, (MODE2)) \ : 1)/* Specify the registers used for certain standard purposes. The values of these macros are register numbers. *//* Alpha pc isn't overloaded on a register that the compiler knows about. *//* #define PC_REGNUM *//* Register to use for pushing function arguments. */#define STACK_POINTER_REGNUM 30/* Base register for access to local variables of the function. */#define HARD_FRAME_POINTER_REGNUM 15/* Value should be nonzero if functions must have frame pointers. Zero means the frame pointer need not be set up (and parms may be accessed via the stack pointer) in functions that seem suitable. This is computed in `reload', in reload1.c. */#define FRAME_POINTER_REQUIRED 0/* Base register for access to arguments of the function. */#define ARG_POINTER_REGNUM 31/* Base register for access to local variables of function. */#define FRAME_POINTER_REGNUM 63/* Register in which static-chain is passed to a function. For the Alpha, this is based on an example; the calling sequence doesn't seem to specify this. */#define STATIC_CHAIN_REGNUM 1/* The register number of the register used to address a table of static data addresses in memory. */#define PIC_OFFSET_TABLE_REGNUM 29/* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM' is clobbered by calls. *//* ??? It is and it isn't. It's required to be valid for a given function when the function returns. It isn't clobbered by current_file functions. Moreover, we do not expose the ldgp until after reload, so we're probably safe. *//* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */
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