📄 arm.h
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/* Setting STRUCTURE_SIZE_BOUNDARY to 32 produces more efficient code, but the value set in previous versions of this toolchain was 8, which produces more compact structures. The command line option -mstructure_size_boundary=<n> can be used to change this value. For compatibility with the ARM SDK however the value should be left at 32. ARM SDT Reference Manual (ARM DUI 0020D) page 2-20 says "Structures are aligned on word boundaries". The AAPCS specifies a value of 8. */#define STRUCTURE_SIZE_BOUNDARY arm_structure_size_boundaryextern int arm_structure_size_boundary;/* This is the value used to initialize arm_structure_size_boundary. If a particular arm target wants to change the default value it should change the definition of this macro, not STRUCTURE_SIZE_BOUNDARY. See netbsd.h for an example of this. */#ifndef DEFAULT_STRUCTURE_SIZE_BOUNDARY#define DEFAULT_STRUCTURE_SIZE_BOUNDARY 32#endif/* Used when parsing command line option -mstructure_size_boundary. */extern const char * structure_size_string;/* Nonzero if move instructions will actually fail to work when given unaligned data. */#define STRICT_ALIGNMENT 1/* wchar_t is unsigned under the AAPCS. */#ifndef WCHAR_TYPE#define WCHAR_TYPE (TARGET_AAPCS_BASED ? "unsigned int" : "int")#define WCHAR_TYPE_SIZE BITS_PER_WORD#endif#ifndef SIZE_TYPE#define SIZE_TYPE (TARGET_AAPCS_BASED ? "unsigned int" : "long unsigned int")#endif/* AAPCS requires that structure alignment is affected by bitfields. */#ifndef PCC_BITFIELD_TYPE_MATTERS#define PCC_BITFIELD_TYPE_MATTERS TARGET_AAPCS_BASED#endif /* Standard register usage. *//* Register allocation in ARM Procedure Call Standard (as used on RISCiX): (S - saved over call). r0 * argument word/integer result r1-r3 argument word r4-r8 S register variable r9 S (rfp) register variable (real frame pointer) r10 F S (sl) stack limit (used by -mapcs-stack-check) r11 F S (fp) argument pointer r12 (ip) temp workspace r13 F S (sp) lower end of current stack frame r14 (lr) link address/workspace r15 F (pc) program counter f0 floating point result f1-f3 floating point scratch f4-f7 S floating point variable cc This is NOT a real register, but is used internally to represent things that use or set the condition codes. sfp This isn't either. It is used during rtl generation since the offset between the frame pointer and the auto's isn't known until after register allocation. afp Nor this, we only need this because of non-local goto. Without it fp appears to be used and the elimination code won't get rid of sfp. It tracks fp exactly at all times. *: See CONDITIONAL_REGISTER_USAGE *//* mvf0 Cirrus floating point result mvf1-mvf3 Cirrus floating point scratch mvf4-mvf15 S Cirrus floating point variable. *//* s0-s15 VFP scratch (aka d0-d7). s16-s31 S VFP variable (aka d8-d15). vfpcc Not a real register. Represents the VFP condition code flags. *//* The stack backtrace structure is as follows: fp points to here: | save code pointer | [fp] | return link value | [fp, #-4] | return sp value | [fp, #-8] | return fp value | [fp, #-12] [| saved r10 value |] [| saved r9 value |] [| saved r8 value |] [| saved r7 value |] [| saved r6 value |] [| saved r5 value |] [| saved r4 value |] [| saved r3 value |] [| saved r2 value |] [| saved r1 value |] [| saved r0 value |] [| saved f7 value |] three words [| saved f6 value |] three words [| saved f5 value |] three words [| saved f4 value |] three words r0-r3 are not normally saved in a C function. *//* 1 for registers that have pervasive standard uses and are not available for the register allocator. */#define FIXED_REGISTERS \{ \ 0,0,0,0,0,0,0,0, \ 0,0,0,0,0,1,0,1, \ 0,0,0,0,0,0,0,0, \ 1,1,1, \ 1,1,1,1,1,1,1,1, \ 1,1,1,1,1,1,1,1, \ 1,1,1,1,1,1,1,1, \ 1,1,1,1,1,1,1,1, \ 1,1,1,1, \ 1,1,1,1,1,1,1,1, \ 1,1,1,1,1,1,1,1, \ 1,1,1,1,1,1,1,1, \ 1,1,1,1,1,1,1,1, \ 1 \}/* 1 for registers not available across function calls. These must include the FIXED_REGISTERS and also any registers that can be used without being saved. The latter must include the registers where values are returned and the register where structure-value addresses are passed. Aside from that, you can include as many other registers as you like. The CC is not preserved over function calls on the ARM 6, so it is easier to assume this for all. SFP is preserved, since FP is. */#define CALL_USED_REGISTERS \{ \ 1,1,1,1,0,0,0,0, \ 0,0,0,0,1,1,1,1, \ 1,1,1,1,0,0,0,0, \ 1,1,1, \ 1,1,1,1,1,1,1,1, \ 1,1,1,1,1,1,1,1, \ 1,1,1,1,1,1,1,1, \ 1,1,1,1,1,1,1,1, \ 1,1,1,1, \ 1,1,1,1,1,1,1,1, \ 1,1,1,1,1,1,1,1, \ 1,1,1,1,1,1,1,1, \ 1,1,1,1,1,1,1,1, \ 1 \}#ifndef SUBTARGET_CONDITIONAL_REGISTER_USAGE#define SUBTARGET_CONDITIONAL_REGISTER_USAGE#endif#define CONDITIONAL_REGISTER_USAGE \{ \ int regno; \ \ if (TARGET_SOFT_FLOAT || TARGET_THUMB || !TARGET_FPA) \ { \ for (regno = FIRST_FPA_REGNUM; \ regno <= LAST_FPA_REGNUM; ++regno) \ fixed_regs[regno] = call_used_regs[regno] = 1; \ } \ \ if (TARGET_THUMB && optimize_size) \ { \ /* When optimizing for size, it's better not to use \ the HI regs, because of the overhead of stacking \ them. */ \ for (regno = FIRST_HI_REGNUM; \ regno <= LAST_HI_REGNUM; ++regno) \ fixed_regs[regno] = call_used_regs[regno] = 1; \ } \ \ /* The link register can be clobbered by any branch insn, \ but we have no way to track that at present, so mark \ it as unavailable. */ \ if (TARGET_THUMB) \ fixed_regs[LR_REGNUM] = call_used_regs[LR_REGNUM] = 1; \ \ if (TARGET_ARM && TARGET_HARD_FLOAT) \ { \ if (TARGET_MAVERICK) \ { \ for (regno = FIRST_FPA_REGNUM; \ regno <= LAST_FPA_REGNUM; ++ regno) \ fixed_regs[regno] = call_used_regs[regno] = 1; \ for (regno = FIRST_CIRRUS_FP_REGNUM; \ regno <= LAST_CIRRUS_FP_REGNUM; ++ regno) \ { \ fixed_regs[regno] = 0; \ call_used_regs[regno] = regno < FIRST_CIRRUS_FP_REGNUM + 4; \ } \ } \ if (TARGET_VFP) \ { \ for (regno = FIRST_VFP_REGNUM; \ regno <= LAST_VFP_REGNUM; ++ regno) \ { \ fixed_regs[regno] = 0; \ call_used_regs[regno] = regno < FIRST_VFP_REGNUM + 16; \ } \ } \ } \ \ if (TARGET_REALLY_IWMMXT) \ { \ regno = FIRST_IWMMXT_GR_REGNUM; \ /* The 2002/10/09 revision of the XScale ABI has wCG0 \ and wCG1 as call-preserved registers. The 2002/11/21 \ revision changed this so that all wCG registers are \ scratch registers. */ \ for (regno = FIRST_IWMMXT_GR_REGNUM; \ regno <= LAST_IWMMXT_GR_REGNUM; ++ regno) \ fixed_regs[regno] = 0; \ /* The XScale ABI has wR0 - wR9 as scratch registers, \ the rest as call-preserved registers. */ \ for (regno = FIRST_IWMMXT_REGNUM; \ regno <= LAST_IWMMXT_REGNUM; ++ regno) \ { \ fixed_regs[regno] = 0; \ call_used_regs[regno] = regno < FIRST_IWMMXT_REGNUM + 10; \ } \ } \ \ if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM) \ { \ fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \ } \ else if (TARGET_APCS_STACK) \ { \ fixed_regs[10] = 1; \ call_used_regs[10] = 1; \ } \ /* -mcaller-super-interworking reserves r11 for calls to \ _interwork_r11_call_via_rN(). Making the register global \ is an easy way of ensuring that it remains valid for all \ calls. */ \ if (TARGET_APCS_FRAME || TARGET_CALLER_INTERWORKING) \ { \ fixed_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \ call_used_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \ if (TARGET_CALLER_INTERWORKING) \ global_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \ } \ SUBTARGET_CONDITIONAL_REGISTER_USAGE \}/* These are a couple of extensions to the formats accepted by asm_fprintf: %@ prints out ASM_COMMENT_START %r prints out REGISTER_PREFIX reg_names[arg] */#define ASM_FPRINTF_EXTENSIONS(FILE, ARGS, P) \ case '@': \ fputs (ASM_COMMENT_START, FILE); \ break; \ \ case 'r': \ fputs (REGISTER_PREFIX, FILE); \ fputs (reg_names [va_arg (ARGS, int)], FILE); \ break;/* Round X up to the nearest word. */#define ROUND_UP_WORD(X) (((X) + 3) & ~3)/* Convert fron bytes to ints. */#define ARM_NUM_INTS(X) (((X) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)/* The number of (integer) registers required to hold a quantity of type MODE. Also used for VFP registers. */#define ARM_NUM_REGS(MODE) \ ARM_NUM_INTS (GET_MODE_SIZE (MODE))/* The number of (integer) registers required to hold a quantity of TYPE MODE. */#define ARM_NUM_REGS2(MODE, TYPE) \ ARM_NUM_INTS ((MODE) == BLKmode ? \ int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE))/* The number of (integer) argument register available. */#define NUM_ARG_REGS 4/* Return the register number of the N'th (integer) argument. */#define ARG_REGISTER(N) (N - 1)/* Specify the registers used for certain standard purposes. The values of these macros are register numbers. *//* The number of the last argument register. */#define LAST_ARG_REGNUM ARG_REGISTER (NUM_ARG_REGS)/* The numbers of the Thumb register ranges. */#define FIRST_LO_REGNUM 0#define LAST_LO_REGNUM 7#define FIRST_HI_REGNUM 8#define LAST_HI_REGNUM 11/* We use sjlj exceptions for backwards compatibility. */#define MUST_USE_SJLJ_EXCEPTIONS 1/* We can generate DWARF2 Unwind info, even though we don't use it. */#define DWARF2_UNWIND_INFO 1/* Use r0 and r1 to pass exception handling information. */#define EH_RETURN_DATA_REGNO(N) (((N) < 2) ? N : INVALID_REGNUM)/* The register that holds the return address in exception handlers. */#define ARM_EH_STACKADJ_REGNUM 2#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, ARM_EH_STACKADJ_REGNUM)/* The native (Norcroft) Pascal compiler for the ARM passes the static chain as an invisible last argument (possible since varargs don't exist in Pascal), so the following is not true. */#define STATIC_CHAIN_REGNUM (TARGET_ARM ? 12 : 9)/* Define this to be where the real frame pointer is if it is not possible to work out the offset between the frame pointer and the automatic variables until after register allocation has taken place. FRAME_POINTER_REGNUM should point to a special register that we will make sure is eliminated. For the Thumb we have another problem. The TPCS defines the frame pointer as r11, and GCC believes that it is always possible to use the frame pointer as base register for addressing purposes. (See comments in find_reloads_address()). But - the Thumb does not allow high registers, including r11, to be used as base address registers. Hence our problem. The solution used here, and in the old thumb port is to use r7 instead of r11 as the hard frame pointer and to have special code to generate backtrace structures on the stack (if required to do so via a command line option) using r11. This is the only 'user visible' use of r11 as a frame pointer. */#define ARM_HARD_FRAME_POINTER_REGNUM 11#define THUMB_HARD_FRAME_POINTER_REGNUM 7⌨️ 快捷键说明
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