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📄 lib1funcs.asm

📁 Mac OS X 10.4.9 for x86 Source Code gcc 实现源代码
💻 ASM
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	ror	curbit, work	tst	overdone, curbit	beq	LSYM(Lover7)	lsr	work, divisor, #2	add	dividend, workLSYM(Lover7):	mov	curbit, ip	mov	work, #1	ror	curbit, work	tst	overdone, curbit	beq	LSYM(Lgot_result)	lsr	work, divisor, #1	add	dividend, work  .endifLSYM(Lgot_result):.endm	/* ------------------------------------------------------------------------ *//*		Start of the Real Functions				    *//* ------------------------------------------------------------------------ */#ifdef L_udivsi3	FUNC_START udivsi3#ifdef __thumb__	cmp	divisor, #0	beq	LSYM(Ldiv0)	mov	curbit, #1	mov	result, #0		push	{ work }	cmp	dividend, divisor	blo	LSYM(Lgot_result)	THUMB_DIV_MOD_BODY 0		mov	r0, result	pop	{ work }	RET#else /* ARM version.  */	subs	r2, r1, #1	RETc(eq)	bcc	LSYM(Ldiv0)	cmp	r0, r1	bls	11f	tst	r1, r2	beq	12f		ARM_DIV_BODY r0, r1, r2, r3		mov	r0, r2	RET	11:	moveq	r0, #1	movne	r0, #0	RET12:	ARM_DIV2_ORDER r1, r2	mov	r0, r0, lsr r2	RET#endif /* ARM version */	DIV_FUNC_END udivsi3FUNC_START aeabi_uidivmod#ifdef __thumb__	push	{r0, r1, lr}	bl	SYM(__udivsi3)	POP	{r1, r2, r3}	mul	r2, r0	sub	r1, r1, r2	bx	r3#else	stmfd	sp!, { r0, r1, lr }	bl	SYM(__udivsi3)	ldmfd	sp!, { r1, r2, lr }	mul	r3, r2, r0	sub	r1, r1, r3	RET#endif	FUNC_END aeabi_uidivmod	#endif /* L_udivsi3 *//* ------------------------------------------------------------------------ */#ifdef L_umodsi3	FUNC_START umodsi3#ifdef __thumb__	cmp	divisor, #0	beq	LSYM(Ldiv0)	mov	curbit, #1	cmp	dividend, divisor	bhs	LSYM(Lover10)	RET	LSYM(Lover10):	push	{ work }	THUMB_DIV_MOD_BODY 1		pop	{ work }	RET	#else  /* ARM version.  */		subs	r2, r1, #1			@ compare divisor with 1	bcc	LSYM(Ldiv0)	cmpne	r0, r1				@ compare dividend with divisor	moveq   r0, #0	tsthi	r1, r2				@ see if divisor is power of 2	andeq	r0, r0, r2	RETc(ls)	ARM_MOD_BODY r0, r1, r2, r3		RET	#endif /* ARM version.  */		DIV_FUNC_END umodsi3#endif /* L_umodsi3 *//* ------------------------------------------------------------------------ */#ifdef L_divsi3	FUNC_START divsi3	#ifdef __thumb__	cmp	divisor, #0	beq	LSYM(Ldiv0)		push	{ work }	mov	work, dividend	eor	work, divisor		@ Save the sign of the result.	mov	ip, work	mov	curbit, #1	mov	result, #0	cmp	divisor, #0	bpl	LSYM(Lover10)	neg	divisor, divisor	@ Loops below use unsigned.LSYM(Lover10):	cmp	dividend, #0	bpl	LSYM(Lover11)	neg	dividend, dividendLSYM(Lover11):	cmp	dividend, divisor	blo	LSYM(Lgot_result)	THUMB_DIV_MOD_BODY 0		mov	r0, result	mov	work, ip	cmp	work, #0	bpl	LSYM(Lover12)	neg	r0, r0LSYM(Lover12):	pop	{ work }	RET#else /* ARM version.  */		cmp	r1, #0	eor	ip, r0, r1			@ save the sign of the result.	beq	LSYM(Ldiv0)	rsbmi	r1, r1, #0			@ loops below use unsigned.	subs	r2, r1, #1			@ division by 1 or -1 ?	beq	10f	movs	r3, r0	rsbmi	r3, r0, #0			@ positive dividend value	cmp	r3, r1	bls	11f	tst	r1, r2				@ divisor is power of 2 ?	beq	12f	ARM_DIV_BODY r3, r1, r0, r2		cmp	ip, #0	rsbmi	r0, r0, #0	RET	10:	teq	ip, r0				@ same sign ?	rsbmi	r0, r0, #0	RET	11:	movlo	r0, #0	moveq	r0, ip, asr #31	orreq	r0, r0, #1	RET12:	ARM_DIV2_ORDER r1, r2	cmp	ip, #0	mov	r0, r3, lsr r2	rsbmi	r0, r0, #0	RET#endif /* ARM version */		DIV_FUNC_END divsi3FUNC_START aeabi_idivmod#ifdef __thumb__	push	{r0, r1, lr}	bl	SYM(__divsi3)	POP	{r1, r2, r3}	mul	r2, r0	sub	r1, r1, r2	bx	r3#else	stmfd	sp!, { r0, r1, lr }	bl	SYM(__divsi3)	ldmfd	sp!, { r1, r2, lr }	mul	r3, r2, r0	sub	r1, r1, r3	RET#endif	FUNC_END aeabi_idivmod	#endif /* L_divsi3 *//* ------------------------------------------------------------------------ */#ifdef L_modsi3	FUNC_START modsi3#ifdef __thumb__	mov	curbit, #1	cmp	divisor, #0	beq	LSYM(Ldiv0)	bpl	LSYM(Lover10)	neg	divisor, divisor		@ Loops below use unsigned.LSYM(Lover10):	push	{ work }	@ Need to save the sign of the dividend, unfortunately, we need	@ work later on.  Must do this after saving the original value of	@ the work register, because we will pop this value off first.	push	{ dividend }	cmp	dividend, #0	bpl	LSYM(Lover11)	neg	dividend, dividendLSYM(Lover11):	cmp	dividend, divisor	blo	LSYM(Lgot_result)	THUMB_DIV_MOD_BODY 1			pop	{ work }	cmp	work, #0	bpl	LSYM(Lover12)	neg	dividend, dividendLSYM(Lover12):	pop	{ work }	RET	#else /* ARM version.  */		cmp	r1, #0	beq	LSYM(Ldiv0)	rsbmi	r1, r1, #0			@ loops below use unsigned.	movs	ip, r0				@ preserve sign of dividend	rsbmi	r0, r0, #0			@ if negative make positive	subs	r2, r1, #1			@ compare divisor with 1	cmpne	r0, r1				@ compare dividend with divisor	moveq	r0, #0	tsthi	r1, r2				@ see if divisor is power of 2	andeq	r0, r0, r2	bls	10f	ARM_MOD_BODY r0, r1, r2, r310:	cmp	ip, #0	rsbmi	r0, r0, #0	RET	#endif /* ARM version */		DIV_FUNC_END modsi3#endif /* L_modsi3 *//* ------------------------------------------------------------------------ */#ifdef L_dvmd_tls	FUNC_START div0	FUNC_ALIAS aeabi_idiv0 div0	FUNC_ALIAS aeabi_ldiv0 div0	RET	FUNC_END aeabi_ldiv0	FUNC_END aeabi_idiv0	FUNC_END div0	#endif /* L_divmodsi_tools *//* ------------------------------------------------------------------------ */#ifdef L_dvmd_lnx@ GNU/Linux division-by zero handler.  Used in place of L_dvmd_tls/* Constants taken from <asm/unistd.h> and <asm/signal.h> */#define SIGFPE	8#define __NR_SYSCALL_BASE	0x900000#define __NR_getpid			(__NR_SYSCALL_BASE+ 20)#define __NR_kill			(__NR_SYSCALL_BASE+ 37)	.code	32	FUNC_START div0	stmfd	sp!, {r1, lr}	swi	__NR_getpid	cmn	r0, #1000	RETLDM	r1 hs	mov	r1, #SIGFPE	swi	__NR_kill	RETLDM	r1	FUNC_END div0	#endif /* L_dvmd_lnx *//* ------------------------------------------------------------------------ *//* Dword shift operations.  *//* All the following Dword shift variants rely on the fact that	shft xxx, Reg   is in fact done as	shft xxx, (Reg & 255)   so for Reg value in (32...63) and (-1...-31) we will get zero (in the   case of logical shifts) or the sign (for asr).  */#ifdef __ARMEB__#define al	r1#define ah	r0#else#define al	r0#define ah	r1#endif#ifdef L_lshrdi3	FUNC_START lshrdi3	FUNC_ALIAS aeabi_llsr lshrdi3	#ifdef __thumb__	lsr	al, r2	mov	r3, ah	lsr	ah, r2	mov	ip, r3	sub	r2, #32	lsr	r3, r2	orr	al, r3	neg	r2, r2	mov	r3, ip	lsl	r3, r2	orr	al, r3	RET#else	subs	r3, r2, #32	rsb	ip, r2, #32	movmi	al, al, lsr r2	movpl	al, ah, lsr r3	orrmi	al, al, ah, lsl ip	mov	ah, ah, lsr r2	RET#endif	FUNC_END aeabi_llsr	FUNC_END lshrdi3#endif	#ifdef L_ashrdi3		FUNC_START ashrdi3	FUNC_ALIAS aeabi_lasr ashrdi3	#ifdef __thumb__	lsr	al, r2	mov	r3, ah	asr	ah, r2	sub	r2, #32	@ If r2 is negative at this point the following step would OR	@ the sign bit into all of AL.  That's not what we want...	bmi	1f	mov	ip, r3	asr	r3, r2	orr	al, r3	mov	r3, ip1:	neg	r2, r2	lsl	r3, r2	orr	al, r3	RET#else	subs	r3, r2, #32	rsb	ip, r2, #32	movmi	al, al, lsr r2	movpl	al, ah, asr r3	orrmi	al, al, ah, lsl ip	mov	ah, ah, asr r2	RET#endif	FUNC_END aeabi_lasr	FUNC_END ashrdi3#endif#ifdef L_ashldi3	FUNC_START ashldi3	FUNC_ALIAS aeabi_llsl ashldi3	#ifdef __thumb__	lsl	ah, r2	mov	r3, al	lsl	al, r2	mov	ip, r3	sub	r2, #32	lsl	r3, r2	orr	ah, r3	neg	r2, r2	mov	r3, ip	lsr	r3, r2	orr	ah, r3	RET#else	subs	r3, r2, #32	rsb	ip, r2, #32	movmi	ah, ah, lsl r2	movpl	ah, al, lsl r3	orrmi	ah, ah, al, lsr ip	mov	al, al, lsl r2	RET#endif	FUNC_END aeabi_llsl	FUNC_END ashldi3#endif/* ------------------------------------------------------------------------ *//* These next two sections are here despite the fact that they contain Thumb    assembler because their presence allows interworked code to be linked even   when the GCC library is this one.  */		/* Do not build the interworking functions when the target architecture does    not support Thumb instructions.  (This can be a multilib option).  */#if defined __ARM_ARCH_4T__ || defined __ARM_ARCH_5T__\      || defined __ARM_ARCH_5TE__ || defined __ARM_ARCH_5TEJ__ \      || __ARM_ARCH__ >= 6#if defined L_call_via_rX/* These labels & instructions are used by the Arm/Thumb interworking code.    The address of function to be called is loaded into a register and then    one of these labels is called via a BL instruction.  This puts the    return address into the link register with the bottom bit set, and the    code here switches to the correct mode before executing the function.  */		.text	.align 0        .force_thumb.macro call_via register	THUMB_FUNC_START _call_via_\register	bx	\register	nop	SIZE	(_call_via_\register).endm	call_via r0	call_via r1	call_via r2	call_via r3	call_via r4	call_via r5	call_via r6	call_via r7	call_via r8	call_via r9	call_via sl	call_via fp	call_via ip	call_via sp	call_via lr#endif /* L_call_via_rX */#if defined L_interwork_call_via_rX/* These labels & instructions are used by the Arm/Thumb interworking code,   when the target address is in an unknown instruction set.  The address    of function to be called is loaded into a register and then one of these   labels is called via a BL instruction.  This puts the return address    into the link register with the bottom bit set, and the code here    switches to the correct mode before executing the function.  Unfortunately   the target code cannot be relied upon to return via a BX instruction, so   instead we have to store the resturn address on the stack and allow the   called function to return here instead.  Upon return we recover the real   return address and use a BX to get back to Thumb mode.   There are three variations of this code.  The first,   _interwork_call_via_rN(), will push the return address onto the   stack and pop it in _arm_return().  It should only be used if all   arguments are passed in registers.   The second, _interwork_r7_call_via_rN(), instead stores the return   address at [r7, #-4].  It is the caller's responsibility to ensure   that this address is valid and contains no useful data.   The third, _interwork_r11_call_via_rN(), works in the same way but   uses r11 instead of r7.  It is useful if the caller does not really   need a frame pointer.  */		.text	.align 0	.code   32	.globl _arm_return_arm_return:	RETLDM	.globl _arm_return_r7_arm_return_r7:	ldr	lr, [r7, #-4]	bx	lr	.globl _arm_return_r11_arm_return_r11:	ldr	lr, [r11, #-4]	bx	lr.macro interwork_with_frame frame, register, name, return	.code	16	THUMB_FUNC_START \name	bx	pc	nop	.code	32	tst	\register, #1	streq	lr, [\frame, #-4]	adreq	lr, _arm_return_\frame	bx	\register	SIZE	(\name).endm.macro interwork register	.code	16	THUMB_FUNC_START _interwork_call_via_\register	bx	pc	nop	.code	32	.globl LSYM(Lchange_\register)LSYM(Lchange_\register):	tst	\register, #1	streq	lr, [sp, #-4]!	adreq	lr, _arm_return	bx	\register	SIZE	(_interwork_call_via_\register)	interwork_with_frame r7,\register,_interwork_r7_call_via_\register	interwork_with_frame r11,\register,_interwork_r11_call_via_\register.endm		interwork r0	interwork r1	interwork r2	interwork r3	interwork r4	interwork r5	interwork r6	interwork r7	interwork r8	interwork r9	interwork sl	interwork fp	interwork ip	interwork sp		/* The LR case has to be handled a little differently...  */	.code 16	THUMB_FUNC_START _interwork_call_via_lr	bx 	pc	nop		.code 32	.globl .Lchange_lr.Lchange_lr:	tst	lr, #1	stmeqdb	r13!, {lr}	mov	ip, lr	adreq	lr, _arm_return	bx	ip		SIZE	(_interwork_call_via_lr)	#endif /* L_interwork_call_via_rX */#endif /* Arch supports thumb.  */#ifndef __symbian__#include "ieee754-df.S"#include "ieee754-sf.S"#include "bpabi.S"#endif /* __symbian__ */

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