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📄 avr.h

📁 Mac OS X 10.4.9 for x86 Source Code gcc 实现源代码
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/* Definitions of target machine for GNU compiler,   for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.   Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005   Free Software Foundation, Inc.   Contributed by Denis Chertykov (denisc@overta.ru)This file is part of GCC.GCC is free software; you can redistribute it and/or modifyit under the terms of the GNU General Public License as published bythe Free Software Foundation; either version 2, or (at your option)any later version.GCC is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY; without even the implied warranty ofMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See theGNU General Public License for more details.You should have received a copy of the GNU General Public Licensealong with GCC; see the file COPYING.  If not, write tothe Free Software Foundation, 59 Temple Place - Suite 330,Boston, MA 02111-1307, USA.  *//* Names to predefine in the preprocessor for this target machine.  */#define TARGET_CPU_CPP_BUILTINS()		\  do						\    {						\      builtin_define_std ("AVR");		\      if (avr_base_arch_macro)			\	builtin_define (avr_base_arch_macro);	\      if (avr_extra_arch_macro)			\	builtin_define (avr_extra_arch_macro);	\      if (avr_asm_only_p)			\	builtin_define ("__AVR_ASM_ONLY__");	\      if (avr_enhanced_p)			\	builtin_define ("__AVR_ENHANCED__");	\      if (avr_mega_p)				\	builtin_define ("__AVR_MEGA__");	\      if (TARGET_NO_INTERRUPTS)			\	builtin_define ("__NO_INTERRUPTS__");	\    }						\  while (0)/* This declaration should be present.  */extern int target_flags;#define MASK_ALL_DEBUG		0x00000FE0#define MASK_ORDER_1		0x00001000#define MASK_INSN_SIZE_DUMP	0x00002000#define MASK_ORDER_2		0x00004000#define MASK_NO_TABLEJUMP	0x00008000#define MASK_INT8		0x00010000#define MASK_NO_INTERRUPTS	0x00020000#define MASK_CALL_PROLOGUES	0x00040000#define MASK_TINY_STACK		0x00080000#define MASK_SHORT_CALLS	0x00100000#define TARGET_ORDER_1		(target_flags & MASK_ORDER_1)#define TARGET_ORDER_2		(target_flags & MASK_ORDER_2)#define TARGET_INT8		(target_flags & MASK_INT8)#define TARGET_NO_INTERRUPTS	(target_flags & MASK_NO_INTERRUPTS)#define TARGET_INSN_SIZE_DUMP	(target_flags & MASK_INSN_SIZE_DUMP)#define TARGET_CALL_PROLOGUES	(target_flags & MASK_CALL_PROLOGUES)#define TARGET_TINY_STACK	(target_flags & MASK_TINY_STACK)#define TARGET_NO_TABLEJUMP	(target_flags & MASK_NO_TABLEJUMP)#define TARGET_SHORT_CALLS	(target_flags & MASK_SHORT_CALLS)#define TARGET_ALL_DEBUG	(target_flags & MASK_ALL_DEBUG)#define TARGET_SWITCHES {						\  { "order1", MASK_ORDER_1, NULL },					\  { "order2", MASK_ORDER_2, NULL },					\  { "int8", MASK_INT8, N_("Assume int to be 8 bit integer") },		\  { "no-interrupts", MASK_NO_INTERRUPTS,				\    N_("Change the stack pointer without disabling interrupts") },	\  { "call-prologues", MASK_CALL_PROLOGUES,				\    N_("Use subroutines for function prologue/epilogue") },		\  { "tiny-stack", MASK_TINY_STACK,					\    N_("Change only the low 8 bits of the stack pointer") },		\  { "no-tablejump", MASK_NO_TABLEJUMP,					\    N_("Do not generate tablejump insns") },				\  { "short-calls", MASK_SHORT_CALLS,					\    N_("Use rjmp/rcall (limited range) on >8K devices") },		\  { "size", MASK_INSN_SIZE_DUMP,					\    N_("Output instruction sizes to the asm file") },			\  { "deb", MASK_ALL_DEBUG, NULL },					\  { "", 0, NULL } }extern const char *avr_init_stack;extern const char *avr_mcu_name;extern const char *avr_base_arch_macro;extern const char *avr_extra_arch_macro;extern int avr_mega_p;extern int avr_enhanced_p;extern int avr_asm_only_p;#define AVR_MEGA (avr_mega_p && !TARGET_SHORT_CALLS)#define AVR_ENHANCED (avr_enhanced_p)#define TARGET_OPTIONS {						      \ { "init-stack=", &avr_init_stack, N_("Specify the initial stack address"), 0}, \ { "mcu=", &avr_mcu_name, N_("Specify the MCU name"), 0} }#define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");#define OVERRIDE_OPTIONS avr_override_options ()#define CAN_DEBUG_WITHOUT_FP#define BITS_BIG_ENDIAN 0#define BYTES_BIG_ENDIAN 0#define WORDS_BIG_ENDIAN 0#ifdef IN_LIBGCC2/* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */#define UNITS_PER_WORD 4#else/* Width of a word, in units (bytes).  */#define UNITS_PER_WORD 1#endif#define POINTER_SIZE 16/* Maximum sized of reasonable data type   DImode or Dfmode ...  */#define MAX_FIXED_MODE_SIZE 32#define PARM_BOUNDARY 8#define FUNCTION_BOUNDARY 8#define EMPTY_FIELD_BOUNDARY 8/* No data type wants to be aligned rounder than this.  */#define BIGGEST_ALIGNMENT 8#define STRICT_ALIGNMENT 0#define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)#define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)#define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)#define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)#define FLOAT_TYPE_SIZE 32#define DOUBLE_TYPE_SIZE 32#define LONG_DOUBLE_TYPE_SIZE 32#define DEFAULT_SIGNED_CHAR 1#define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")#define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")#define WCHAR_TYPE_SIZE 16#define FIRST_PSEUDO_REGISTER 36#define FIXED_REGISTERS {\  1,1,/* r0 r1 */\  0,0,/* r2 r3 */\  0,0,/* r4 r5 */\  0,0,/* r6 r7 */\  0,0,/* r8 r9 */\  0,0,/* r10 r11 */\  0,0,/* r12 r13 */\  0,0,/* r14 r15 */\  0,0,/* r16 r17 */\  0,0,/* r18 r19 */\  0,0,/* r20 r21 */\  0,0,/* r22 r23 */\  0,0,/* r24 r25 */\  0,0,/* r26 r27 */\  0,0,/* r28 r29 */\  0,0,/* r30 r31 */\  1,1,/*  STACK */\  1,1 /* arg pointer */  }#define CALL_USED_REGISTERS {			\  1,1,/* r0 r1 */				\    0,0,/* r2 r3 */				\    0,0,/* r4 r5 */				\    0,0,/* r6 r7 */				\    0,0,/* r8 r9 */				\    0,0,/* r10 r11 */				\    0,0,/* r12 r13 */				\    0,0,/* r14 r15 */				\    0,0,/* r16 r17 */				\    1,1,/* r18 r19 */				\    1,1,/* r20 r21 */				\    1,1,/* r22 r23 */				\    1,1,/* r24 r25 */				\    1,1,/* r26 r27 */				\    0,0,/* r28 r29 */				\    1,1,/* r30 r31 */				\    1,1,/*  STACK */				\    1,1 /* arg pointer */  }#define REG_ALLOC_ORDER {			\    24,25,					\    18,19,					\    20,21,					\    22,23,					\    30,31,					\    26,27,					\    28,29,					\    17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,	\    0,1,					\    32,33,34,35					\    }#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()#define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)#define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)#define MODES_TIEABLE_P(MODE1, MODE2) 1enum reg_class {  NO_REGS,  R0_REG,			/* r0 */  POINTER_X_REGS,		/* r26 - r27 */  POINTER_Y_REGS,		/* r28 - r29 */  POINTER_Z_REGS,		/* r30 - r31 */  STACK_REG,			/* STACK */  BASE_POINTER_REGS,		/* r28 - r31 */  POINTER_REGS,			/* r26 - r31 */  ADDW_REGS,			/* r24 - r31 */  SIMPLE_LD_REGS,		/* r16 - r23 */  LD_REGS,			/* r16 - r31 */  NO_LD_REGS,			/* r0 - r15 */  GENERAL_REGS,			/* r0 - r31 */  ALL_REGS, LIM_REG_CLASSES};#define N_REG_CLASSES (int)LIM_REG_CLASSES#define REG_CLASS_NAMES {					\		 "NO_REGS",					\		   "R0_REG",	/* r0 */                        \		   "POINTER_X_REGS", /* r26 - r27 */		\		   "POINTER_Y_REGS", /* r28 - r29 */		\		   "POINTER_Z_REGS", /* r30 - r31 */		\		   "STACK_REG",	/* STACK */			\		   "BASE_POINTER_REGS",	/* r28 - r31 */		\		   "POINTER_REGS", /* r26 - r31 */		\		   "ADDW_REGS",	/* r24 - r31 */			\                   "SIMPLE_LD_REGS", /* r16 - r23 */            \		   "LD_REGS",	/* r16 - r31 */			\                   "NO_LD_REGS", /* r0 - r15 */                 \		   "GENERAL_REGS", /* r0 - r31 */		\		   "ALL_REGS" }#define REG_X 26#define REG_Y 28#define REG_Z 30#define REG_W 24#define REG_CLASS_CONTENTS {						\  {0x00000000,0x00000000},	/* NO_REGS */				\  {0x00000001,0x00000000},	/* R0_REG */                            \  {3 << REG_X,0x00000000},      /* POINTER_X_REGS, r26 - r27 */		\  {3 << REG_Y,0x00000000},      /* POINTER_Y_REGS, r28 - r29 */		\  {3 << REG_Z,0x00000000},      /* POINTER_Z_REGS, r30 - r31 */		\  {0x00000000,0x00000003},	/* STACK_REG, STACK */			\  {(3 << REG_Y) | (3 << REG_Z),						\     0x00000000},		/* BASE_POINTER_REGS, r28 - r31 */	\  {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z),				\     0x00000000},		/* POINTER_REGS, r26 - r31 */		\  {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W),		\     0x00000000},		/* ADDW_REGS, r24 - r31 */		\  {0x00ff0000,0x00000000},	/* SIMPLE_LD_REGS r16 - r23 */          \  {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16),	\     0x00000000},	/* LD_REGS, r16 - r31 */			\  {0x0000ffff,0x00000000},	/* NO_LD_REGS  r0 - r15 */              \  {0xffffffff,0x00000000},	/* GENERAL_REGS, r0 - r31 */		\  {0xffffffff,0x00000003}	/* ALL_REGS */				\}#define REGNO_REG_CLASS(R) avr_regno_reg_class(R)#define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS)#define INDEX_REG_CLASS NO_REGS#define REG_CLASS_FROM_LETTER(C) avr_reg_class_from_letter(C)#define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER		\				 && ((r) == REG_X			\				     || (r) == REG_Y			\				     || (r) == REG_Z			\				     || (r) == ARG_POINTER_REGNUM))	\				|| (reg_renumber			\				    && (reg_renumber[r] == REG_X	\					|| reg_renumber[r] == REG_Y	\					|| reg_renumber[r] == REG_Z	\					|| (reg_renumber[r]		\					    == ARG_POINTER_REGNUM))))#define REGNO_OK_FOR_INDEX_P(NUM) 0#define PREFERRED_RELOAD_CLASS(X, CLASS) preferred_reload_class(X,CLASS)#define SMALL_REGISTER_CLASSES 1#define CLASS_LIKELY_SPILLED_P(c) class_likely_spilled_p(c)#define CLASS_MAX_NREGS(CLASS, MODE)   class_max_nregs (CLASS, MODE)#define CONST_OK_FOR_LETTER_P(VALUE, C)				\  ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 63 :			\   (C) == 'J' ? (VALUE) <= 0 && (VALUE) >= -63:			\   (C) == 'K' ? (VALUE) == 2 :					\   (C) == 'L' ? (VALUE) == 0 :					\   (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 0xff :		\   (C) == 'N' ? (VALUE) == -1:					\   (C) == 'O' ? (VALUE) == 8 || (VALUE) == 16 || (VALUE) == 24:	\   (C) == 'P' ? (VALUE) == 1 :					\   0)#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \  ((C) == 'G' ? (VALUE) == CONST0_RTX (SFmode)	\   : 0)#define EXTRA_CONSTRAINT(x, c) extra_constraint(x, c)#define STACK_PUSH_CODE POST_DEC#define STACK_GROWS_DOWNWARD#define STARTING_FRAME_OFFSET 1#define STACK_POINTER_OFFSET 1#define FIRST_PARM_OFFSET(FUNDECL) 0#define STACK_BOUNDARY 8#define STACK_POINTER_REGNUM 32#define FRAME_POINTER_REGNUM REG_Y#define ARG_POINTER_REGNUM 34#define STATIC_CHAIN_REGNUM 2#define FRAME_POINTER_REQUIRED frame_pointer_required_p()#define ELIMINABLE_REGS {					\      {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},		\	{FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}		\       ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}#define CAN_ELIMINATE(FROM, TO) (((FROM) == ARG_POINTER_REGNUM		   \				  && (TO) == FRAME_POINTER_REGNUM)	   \				 || (((FROM) == FRAME_POINTER_REGNUM	   \				      || (FROM) == FRAME_POINTER_REGNUM+1) \				     && ! FRAME_POINTER_REQUIRED	   \				     ))#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)			\     OFFSET = initial_elimination_offset (FROM, TO)#define RETURN_ADDR_RTX(count, x) \  gen_rtx_MEM (Pmode, memory_address (Pmode, plus_constant (tem, 1)))#define PUSH_ROUNDING(NPUSHED) (NPUSHED)#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) (function_arg (&(CUM), MODE, TYPE, NAMED))typedef struct avr_args {  int nregs;			/* # registers available for passing */  int regno;			/* next available register number */} CUMULATIVE_ARGS;#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \  init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)	\  (function_arg_advance (&CUM, MODE, TYPE, NAMED))#define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)extern int avr_reg_order[];#define RET_REGISTER avr_ret_register ()#define FUNCTION_VALUE(VALTYPE, FUNC) avr_function_value (VALTYPE, FUNC)#define LIBCALL_VALUE(MODE)  avr_libcall_value (MODE)#define FUNCTION_VALUE_REGNO_P(N) ((int) (N) == RET_REGISTER)#define DEFAULT_PCC_STRUCT_RETURN 0#define EPILOGUE_USES(REGNO) 0#define HAVE_POST_INCREMENT 1#define HAVE_PRE_DECREMENT 1#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)#define MAX_REGS_PER_ADDRESS 1#ifdef REG_OK_STRICT#  define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR)	\{							\  if (legitimate_address_p (mode, operand, 1))		\    goto ADDR;						\}#  else#  define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR)	\{							\  if (legitimate_address_p (mode, operand, 0))		\    goto ADDR;						\}#endif#define REG_OK_FOR_BASE_NOSTRICT_P(X) \  (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X))#define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))#ifdef REG_OK_STRICT#  define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)#else#  define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NOSTRICT_P (X)#endif#define REG_OK_FOR_INDEX_P(X) 0#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)				\{									\  (X) = legitimize_address (X, OLDX, MODE);				\  if (memory_address_p (MODE, X))					\    goto WIN;								\}#define XEXP_(X,Y) (X)#define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN)    \do {									    \  if (1&&(GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC))	    \    {									    \      push_reload (XEXP (X,0), XEXP (X,0), &XEXP (X,0), &XEXP (X,0),	    \	           POINTER_REGS, GET_MODE (X),GET_MODE (X) , 0, 0,	    \		   OPNUM, RELOAD_OTHER);				    \      goto WIN;								    \    }									    \  if (GET_CODE (X) == PLUS						    \      && REG_P (XEXP (X, 0))						    \      && GET_CODE (XEXP (X, 1)) == CONST_INT				    \      && INTVAL (XEXP (X, 1)) >= 1)					    \    {									    \      int fit = INTVAL (XEXP (X, 1)) <= (64 - GET_MODE_SIZE (MODE));	    \      if (fit)								    \

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