avr.md

Mac OS X 10.4.9 for x86 Source Code gcc 实现源代码

  [(set (cc0)
        (compare (match_operand:QI 0 "register_operand"  "r,d")
		 (match_operand:QI 1 "nonmemory_operand" "r,i")))]
  ""
  "@
	cp %0,%1
	cpi %0,lo8(%1)"
  [(set_attr "cc" "compare,compare")
   (set_attr "length" "1,1")])

(define_insn "*cmpqi_sign_extend"
  [(set (cc0)
        (compare (sign_extend:HI
		  (match_operand:QI 0 "register_operand"  "d"))
		 (match_operand:HI 1 "const_int_operand" "n")))]
  "INTVAL (operands[1]) >= -128 && INTVAL (operands[1]) <= 127"
  "cpi %0,lo8(%1)"
  [(set_attr "cc" "compare")
   (set_attr "length" "1")])

(define_insn "cmphi"
  [(set (cc0)
	(compare (match_operand:HI 0 "register_operand"  "r,d,d,r,r")
		 (match_operand:HI 1 "nonmemory_operand" "r,M,i,M,i")))
   (clobber (match_scratch:QI 2 "=X,X,&d,&d,&d"))]
  ""
  "*{
  switch (which_alternative)
    {
    case 0:
      return (AS2 (cp,%A0,%A1) CR_TAB
              AS2 (cpc,%B0,%B1));
    case 1:
      if (reg_unused_after (insn, operands[0])
          && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 63
          && test_hard_reg_class (ADDW_REGS, operands[0]))
        return AS2 (sbiw,%0,%1);
       else
        return (AS2 (cpi,%0,%1) CR_TAB
                AS2 (cpc,%B0,__zero_reg__));
    case 2:
      if (reg_unused_after (insn, operands[0]))
        return (AS2 (subi,%0,lo8(%1))  CR_TAB
                AS2 (sbci,%B0,hi8(%1)));
      else
        return (AS2 (ldi, %2,hi8(%1))  CR_TAB
	        AS2 (cpi, %A0,lo8(%1)) CR_TAB
	        AS2 (cpc, %B0,%2));
   case 3:
      return (AS2 (ldi, %2,lo8(%1))  CR_TAB
	      AS2 (cp, %A0,%2) CR_TAB
	      AS2 (cpc, %B0,__zero_reg__));

   case 4:
      return (AS2 (ldi, %2,lo8(%1))  CR_TAB
              AS2 (cp, %A0,%2)       CR_TAB
              AS2 (ldi, %2,hi8(%1)) CR_TAB
	      AS2 (cpc, %B0,%2));
    }
  return \"bug\";
}" 
  [(set_attr "cc" "compare,compare,compare,compare,compare")
   (set_attr "length" "2,2,3,3,4")])


(define_insn "cmpsi"
  [(set (cc0)
	(compare (match_operand:SI 0 "register_operand"  "r,d,d,r,r")
		 (match_operand:SI 1 "nonmemory_operand" "r,M,i,M,i")))
   (clobber (match_scratch:QI 2 "=X,X,&d,&d,&d"))]
  ""
  "*{
  switch (which_alternative)
    {
    case 0:
      return (AS2 (cp,%A0,%A1) CR_TAB
              AS2 (cpc,%B0,%B1) CR_TAB
	      AS2 (cpc,%C0,%C1) CR_TAB
	      AS2 (cpc,%D0,%D1));
    case 1:
      if (reg_unused_after (insn, operands[0])
          && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 63
          && test_hard_reg_class (ADDW_REGS, operands[0]))
        return (AS2 (sbiw,%0,%1) CR_TAB
                AS2 (cpc,%C0,__zero_reg__) CR_TAB
                AS2 (cpc,%D0,__zero_reg__));
      else
        return (AS2 (cpi,%A0,lo8(%1))  CR_TAB
                AS2 (cpc,%B0,__zero_reg__) CR_TAB
                AS2 (cpc,%C0,__zero_reg__) CR_TAB
                AS2 (cpc,%D0,__zero_reg__));
    case 2:
      if (reg_unused_after (insn, operands[0]))
        return (AS2 (subi,%A0,lo8(%1))  CR_TAB
                AS2 (sbci,%B0,hi8(%1))  CR_TAB
                AS2 (sbci,%C0,hlo8(%1))  CR_TAB
                AS2 (sbci,%D0,hhi8(%1)));
      else
       return (AS2 (cpi, %A0,lo8(%1))   CR_TAB
	       AS2 (ldi, %2,hi8(%1))  CR_TAB
	       AS2 (cpc, %B0,%2)       CR_TAB
	       AS2 (ldi, %2,hlo8(%1))  CR_TAB
	       AS2 (cpc, %C0,%2)       CR_TAB
	       AS2 (ldi, %2,hhi8(%1)) CR_TAB
	       AS2 (cpc, %D0,%2));
    case 3:
        return (AS2 (ldi,%2,lo8(%1))        CR_TAB
                AS2 (cp,%A0,%2)            CR_TAB
                AS2 (cpc,%B0,__zero_reg__) CR_TAB
                AS2 (cpc,%C0,__zero_reg__) CR_TAB
                AS2 (cpc,%D0,__zero_reg__));
    case 4:
       return (AS2 (ldi, %2,lo8(%1))   CR_TAB
               AS2 (cp, %A0,%2)        CR_TAB
	       AS2 (ldi, %2,hi8(%1))  CR_TAB
	       AS2 (cpc, %B0,%2)       CR_TAB
	       AS2 (ldi, %2,hlo8(%1))  CR_TAB
	       AS2 (cpc, %C0,%2)       CR_TAB
	       AS2 (ldi, %2,hhi8(%1)) CR_TAB
	       AS2 (cpc, %D0,%2));
    }
  return \"bug\";
}"
  [(set_attr "cc" "compare,compare,compare,compare,compare")
   (set_attr "length" "4,4,7,5,8")])

;; ----------------------------------------------------------------------
;; JUMP INSTRUCTIONS
;; ----------------------------------------------------------------------
;; Conditional jump instructions

(define_expand "beq"
  [(set (pc)
        (if_then_else (eq (cc0) (const_int 0))
                      (label_ref (match_operand 0 "" ""))
                      (pc)))]
  ""
  "")

(define_expand "bne"
  [(set (pc)
        (if_then_else (ne (cc0) (const_int 0))
                      (label_ref (match_operand 0 "" ""))
                      (pc)))]
  ""
  "")

(define_expand "bge"
  [(set (pc)
        (if_then_else (ge (cc0) (const_int 0))
                      (label_ref (match_operand 0 "" ""))
                      (pc)))]
  ""
  "")

(define_expand "bgeu"
  [(set (pc)
        (if_then_else (geu (cc0) (const_int 0))
                      (label_ref (match_operand 0 "" ""))
                      (pc)))]
  ""
  "")

(define_expand "blt"
  [(set (pc)
        (if_then_else (lt (cc0) (const_int 0))
                      (label_ref (match_operand 0 "" ""))
                      (pc)))]
  ""
  "")

(define_expand "bltu"
  [(set (pc)
        (if_then_else (ltu (cc0) (const_int 0))
                      (label_ref (match_operand 0 "" ""))
                      (pc)))]
  ""
  "")



/****************************************************************
 AVR not have following conditional jumps: LE,LEU,GT,GTU.
 Convert them all to proper jumps.
*****************************************************************/

(define_expand "ble"
  [(set (pc)
        (if_then_else (le (cc0) (const_int 0))
                      (label_ref (match_operand 0 "" ""))
                      (pc)))]
  ""
  "")

(define_expand "bleu"
  [(set (pc)
        (if_then_else (leu (cc0) (const_int 0))
                      (label_ref (match_operand 0 "" ""))
                      (pc)))]
  ""
  "")

(define_expand "bgt"
  [(set (pc)
        (if_then_else (gt (cc0) (const_int 0))
                      (label_ref (match_operand 0 "" ""))
                      (pc)))]
  ""
  "")

(define_expand "bgtu"
  [(set (pc)
        (if_then_else (gtu (cc0) (const_int 0))
                      (label_ref (match_operand 0 "" ""))
                      (pc)))]
  ""
  "")

;; Test a single bit in a QI/HI/SImode register.
(define_insn "*sbrx_branch"
  [(set (pc)
        (if_then_else
	 (match_operator 0 "comparison_operator"
			 [(zero_extract
			   (match_operand:QI 1 "register_operand" "r")
			   (const_int 1)
			   (match_operand 2 "const_int_operand" "n"))
			  (const_int 0)])
	 (label_ref (match_operand 3 "" ""))
	 (pc)))]
  "GET_CODE (operands[0]) == EQ || GET_CODE (operands[0]) == NE"
  "* return avr_out_sbxx_branch (insn, operands);"
  [(set (attr "length")
	(if_then_else (and (ge (minus (pc) (match_dup 3)) (const_int -2046))
			   (le (minus (pc) (match_dup 3)) (const_int 2046)))
		      (const_int 2)
		      (if_then_else (eq_attr "mcu_mega" "no")
				    (const_int 2)
				    (const_int 4))))
   (set_attr "cc" "clobber")])

(define_insn "*sbrx_and_branchhi"
  [(set (pc)
        (if_then_else
	 (match_operator 0 "comparison_operator"
			 [(and:HI
			   (match_operand:HI 1 "register_operand" "r")
			   (match_operand:HI 2 "const_int_operand" "n"))
			  (const_int 0)])
	 (label_ref (match_operand 3 "" ""))
	 (pc)))]
  "(GET_CODE (operands[0]) == EQ || GET_CODE (operands[0]) == NE)
   && exact_log2 (INTVAL (operands[2]) & 0xffff) >= 0"
  "* return avr_out_sbxx_branch (insn, operands);"
  [(set (attr "length")
	(if_then_else (and (ge (minus (pc) (match_dup 3)) (const_int -2046))
			   (le (minus (pc) (match_dup 3)) (const_int 2046)))
		      (const_int 2)
		      (if_then_else (eq_attr "mcu_mega" "no")
				    (const_int 2)
				    (const_int 4))))
   (set_attr "cc" "clobber")])

(define_insn "*sbrx_and_branchsi"
  [(set (pc)
        (if_then_else
	 (match_operator 0 "comparison_operator"
			 [(and:SI
			   (match_operand:SI 1 "register_operand" "r")
			   (match_operand:SI 2 "const_int_operand" "n"))
			  (const_int 0)])
	 (label_ref (match_operand 3 "" ""))
	 (pc)))]
  "(GET_CODE (operands[0]) == EQ || GET_CODE (operands[0]) == NE)
   && exact_log2 (INTVAL (operands[2]) & 0xffffffff) >= 0"
  "* return avr_out_sbxx_branch (insn, operands);"
  [(set (attr "length")
	(if_then_else (and (ge (minus (pc) (match_dup 3)) (const_int -2046))
			   (le (minus (pc) (match_dup 3)) (const_int 2046)))
		      (const_int 2)
		      (if_then_else (eq_attr "mcu_mega" "no")
				    (const_int 2)
				    (const_int 4))))
   (set_attr "cc" "clobber")])

;; Convert sign tests to bit 7/15/31 tests that match the above insns.
(define_peephole2
  [(set (cc0) (match_operand:QI 0 "register_operand" ""))
   (set (pc) (if_then_else (ge (cc0) (const_int 0))
			   (label_ref (match_operand 1 "" ""))
			   (pc)))]
  ""
  [(set (pc) (if_then_else (eq (zero_extract (match_dup 0)
					     (const_int 1)
					     (const_int 7))
			       (const_int 0))
			   (label_ref (match_dup 1))
			   (pc)))]
  "")

(define_peephole2
  [(set (cc0) (match_operand:QI 0 "register_operand" ""))
   (set (pc) (if_then_else (lt (cc0) (const_int 0))
			   (label_ref (match_operand 1 "" ""))
			   (pc)))]
  ""
  [(set (pc) (if_then_else (ne (zero_extract (match_dup 0)
					     (const_int 1)
					     (const_int 7))
			       (const_int 0))
			   (label_ref (match_dup 1))
			   (pc)))]
  "")

(define_peephole2
  [(set (cc0) (match_operand:HI 0 "register_operand" ""))
   (set (pc) (if_then_else (ge (cc0) (const_int 0))
			   (label_ref (match_operand 1 "" ""))
			   (pc)))]
  ""
  [(set (pc) (if_then_else (eq (and:HI (match_dup 0) (const_int -32768))
			       (const_int 0))
			   (label_ref (match_dup 1))
			   (pc)))]
  "")

(define_peephole2
  [(set (cc0) (match_operand:HI 0 "register_operand" ""))
   (set (pc) (if_then_else (lt (cc0) (const_int 0))
			   (label_ref (match_operand 1 "" ""))
			   (pc)))]
  ""
  [(set (pc) (if_then_else (ne (and:HI (match_dup 0) (const_int -32768))
			       (const_int 0))
			   (label_ref (match_dup 1))
			   (pc)))]
  "")

(define_peephole2
  [(set (cc0) (match_operand:SI 0 "register_operand" ""))
   (set (pc) (if_then_else (ge (cc0) (const_int 0))
			   (label_ref (match_operand 1 "" ""))
			   (pc)))]
  ""
  [(set (pc) (if_then_else (eq (and:SI (match_dup 0) (match_dup 2))
			       (const_int 0))
			   (label_ref (match_dup 1))
			   (pc)))]
  "operands[2] = GEN_INT (-2147483647 - 1);")

(define_peephole2
  [(set (cc0) (match_operand:SI 0 "register_operand" ""))
   (set (pc) (if_then_else (lt (cc0) (const_int 0))
			   (label_ref (match_operand 1 "" ""))
			   (pc)))]
  ""
  [(set (pc) (if_then_else (ne (and:SI (match_dup 0) (match_dup 2))
			       (const_int 0))
			   (label_ref (match_dup 1))
			   (pc)))]
  "operands[2] = GEN_INT (-2147483647 - 1);")

;; ************************************************************************
;; Implementation of conditional jumps here.
;;  Compare with 0 (test) jumps
;; ************************************************************************

(define_insn "branch"
  [(set (pc)
        (if_then_else (match_operator 1 "comparison_operator"
                        [(cc0)
                         (const_int 0)])
                      (label_ref (match_operand 0 "" ""))
                      (pc)))]
  "! (GET_CODE (operands[1]) == GT || GET_CODE (operands[1]) == GTU
      || GET_CODE (operands[1]) == LE || GET_CODE (operands[1]) == LEU)"
  "*
   return ret_cond_branch (operands[1], avr_jump_mode (operands[0],insn), 0);"
  [(set_attr "type" "branch")
   (set_attr "cc" "clobber")])

(define_insn "difficult_branch"
  [(set (pc)
        (if_then_else (match_operator 1 "comparison_operator"
                        [(cc0)
                         (const_int 0)])
                      (label_ref (match_operand 0 "" ""))
                      (pc)))]
  "(GET_CODE (operands[1]) == GT || GET_CODE (operands[1]) == GTU
    || GET_CODE (operands[1]) == LE || GET_CODE (operands[1]) == LEU)"
  "*
   return ret_cond_branch (operands[1], avr_jump_mode (operands[0],insn), 0);"
  [(set_attr "type" "branch1")
   (set_attr "cc" "clobber")])

;; revers branch

(define_insn "rvbranch"
  [(set (pc)
        (if_then_else (match_operator 1 "comparison_operator" [(cc0)
                                                               (const_int 0)])
                      (pc)
                      (label_ref (match_operand 0 "" ""))))]
  "! (GET_CODE (operands[1]) == GT ||