xtensa.h

Mac OS X 10.4.9 for x86 Source Code gcc 实现源代码

#define LEAF_REG_REMAP(REGNO) (REGNO)

/* This must be declared if LEAF_REGISTERS is set.  */
extern int leaf_function;

/* Internal macros to classify a register number.  */

/* 16 address registers + fake registers */
#define GP_REG_FIRST 0
#define GP_REG_LAST  17
#define GP_REG_NUM   (GP_REG_LAST - GP_REG_FIRST + 1)

/* Coprocessor registers */
#define BR_REG_FIRST 18
#define BR_REG_LAST  18 
#define BR_REG_NUM   (BR_REG_LAST - BR_REG_FIRST + 1)

/* 16 floating-point registers */
#define FP_REG_FIRST 19
#define FP_REG_LAST  34
#define FP_REG_NUM   (FP_REG_LAST - FP_REG_FIRST + 1)

/* MAC16 accumulator */
#define ACC_REG_FIRST 35
#define ACC_REG_LAST 35
#define ACC_REG_NUM  (ACC_REG_LAST - ACC_REG_FIRST + 1)

#define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM)
#define BR_REG_P(REGNO) ((unsigned) ((REGNO) - BR_REG_FIRST) < BR_REG_NUM)
#define FP_REG_P(REGNO) ((unsigned) ((REGNO) - FP_REG_FIRST) < FP_REG_NUM)
#define ACC_REG_P(REGNO) ((unsigned) ((REGNO) - ACC_REG_FIRST) < ACC_REG_NUM)

/* Return number of consecutive hard regs needed starting at reg REGNO
   to hold something of mode MODE.  */
#define HARD_REGNO_NREGS(REGNO, MODE)					\
  (FP_REG_P (REGNO) ?							\
	((GET_MODE_SIZE (MODE) + UNITS_PER_FPREG - 1) / UNITS_PER_FPREG) : \
	((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))

/* Value is 1 if hard register REGNO can hold a value of machine-mode
   MODE.  */
extern char xtensa_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER];

#define HARD_REGNO_MODE_OK(REGNO, MODE)					\
  xtensa_hard_regno_mode_ok[(int) (MODE)][(REGNO)]

/* Value is 1 if it is a good idea to tie two pseudo registers
   when one has mode MODE1 and one has mode MODE2.
   If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
   for any hard reg, then this must be 0 for correct output.  */
#define MODES_TIEABLE_P(MODE1, MODE2)					\
  ((GET_MODE_CLASS (MODE1) == MODE_FLOAT ||				\
    GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT)			\
   == (GET_MODE_CLASS (MODE2) == MODE_FLOAT ||				\
       GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))

/* Register to use for pushing function arguments.  */
#define STACK_POINTER_REGNUM (GP_REG_FIRST + 1)

/* Base register for access to local variables of the function.  */
#define HARD_FRAME_POINTER_REGNUM (GP_REG_FIRST + 7)

/* The register number of the frame pointer register, which is used to
   access automatic variables in the stack frame.  For Xtensa, this
   register never appears in the output.  It is always eliminated to
   either the stack pointer or the hard frame pointer.  */
#define FRAME_POINTER_REGNUM (GP_REG_FIRST + 16)

/* Value should be nonzero if functions must have frame pointers.
   Zero means the frame pointer need not be set up (and parms
   may be accessed via the stack pointer) in functions that seem suitable.
   This is computed in 'reload', in reload1.c.  */
#define FRAME_POINTER_REQUIRED xtensa_frame_pointer_required ()

/* Base register for access to arguments of the function.  */
#define ARG_POINTER_REGNUM (GP_REG_FIRST + 17)

/* If the static chain is passed in memory, these macros provide rtx
   giving 'mem' expressions that denote where they are stored.
   'STATIC_CHAIN' and 'STATIC_CHAIN_INCOMING' give the locations as
   seen by the calling and called functions, respectively.  */

#define STATIC_CHAIN							\
  gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, -5 * UNITS_PER_WORD))

#define STATIC_CHAIN_INCOMING						\
  gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -5 * UNITS_PER_WORD))

/* For now we don't try to use the full set of boolean registers.  Without
   software pipelining of FP operations, there's not much to gain and it's
   a real pain to get them reloaded.  */
#define FPCC_REGNUM (BR_REG_FIRST + 0)

/* It is as good or better to call a constant function address than to
   call an address kept in a register.  */
#define NO_FUNCTION_CSE 1

/* Xtensa processors have "register windows".  GCC does not currently
   take advantage of the possibility for variable-sized windows; instead,
   we use a fixed window size of 8.  */

#define INCOMING_REGNO(OUT)						\
  ((GP_REG_P (OUT) &&							\
    ((unsigned) ((OUT) - GP_REG_FIRST) >= WINDOW_SIZE)) ?		\
   (OUT) - WINDOW_SIZE : (OUT))

#define OUTGOING_REGNO(IN)						\
  ((GP_REG_P (IN) &&							\
    ((unsigned) ((IN) - GP_REG_FIRST) < WINDOW_SIZE)) ?			\
   (IN) + WINDOW_SIZE : (IN))


/* Define the classes of registers for register constraints in the
   machine description.  */
enum reg_class
{
  NO_REGS,			/* no registers in set */
  BR_REGS,			/* coprocessor boolean registers */
  FP_REGS,			/* floating point registers */
  ACC_REG,			/* MAC16 accumulator */
  SP_REG,			/* sp register (aka a1) */
  RL_REGS,			/* preferred reload regs (not sp or fp) */
  GR_REGS,			/* integer registers except sp */
  AR_REGS,			/* all integer registers */
  ALL_REGS,			/* all registers */
  LIM_REG_CLASSES		/* max value + 1 */
};

#define N_REG_CLASSES (int) LIM_REG_CLASSES

#define GENERAL_REGS AR_REGS

/* An initializer containing the names of the register classes as C
   string constants.  These names are used in writing some of the
   debugging dumps.  */
#define REG_CLASS_NAMES							\
{									\
  "NO_REGS",								\
  "BR_REGS",								\
  "FP_REGS",								\
  "ACC_REG",								\
  "SP_REG",								\
  "RL_REGS",								\
  "GR_REGS",								\
  "AR_REGS",								\
  "ALL_REGS"								\
}

/* Contents of the register classes.  The Nth integer specifies the
   contents of class N.  The way the integer MASK is interpreted is
   that register R is in the class if 'MASK & (1 << R)' is 1.  */
#define REG_CLASS_CONTENTS \
{ \
  { 0x00000000, 0x00000000 }, /* no registers */ \
  { 0x00040000, 0x00000000 }, /* coprocessor boolean registers */ \
  { 0xfff80000, 0x00000007 }, /* floating-point registers */ \
  { 0x00000000, 0x00000008 }, /* MAC16 accumulator */ \
  { 0x00000002, 0x00000000 }, /* stack pointer register */ \
  { 0x0000ff7d, 0x00000000 }, /* preferred reload registers */ \
  { 0x0000fffd, 0x00000000 }, /* general-purpose registers */ \
  { 0x0003ffff, 0x00000000 }, /* integer registers */ \
  { 0xffffffff, 0x0000000f }  /* all registers */ \
}

/* A C expression whose value is a register class containing hard
   register REGNO.  In general there is more that one such class;
   choose a class which is "minimal", meaning that no smaller class
   also contains the register.  */
extern const enum reg_class xtensa_regno_to_class[FIRST_PSEUDO_REGISTER];

#define REGNO_REG_CLASS(REGNO) xtensa_regno_to_class[ (REGNO) ]

/* Use the Xtensa AR register file for base registers.
   No index registers.  */
#define BASE_REG_CLASS AR_REGS
#define INDEX_REG_CLASS NO_REGS

/* SMALL_REGISTER_CLASSES is required for Xtensa, because all of the
   16 AR registers may be explicitly used in the RTL, as either
   incoming or outgoing arguments.  */
#define SMALL_REGISTER_CLASSES 1


/* REGISTER AND CONSTANT CLASSES */

/* Get reg_class from a letter such as appears in the machine
   description.

   Available letters: a-f,h,j-l,q,t-z,A-D,W,Y-Z

   DEFINED REGISTER CLASSES:

   'a'  general-purpose registers except sp
   'q'  sp (aka a1)
   'D'	general-purpose registers (only if density option enabled)
   'd'  general-purpose registers, including sp (only if density enabled)
   'A'	MAC16 accumulator (only if MAC16 option enabled)
   'B'	general-purpose registers (only if sext instruction enabled)
   'C'  general-purpose registers (only if mul16 option enabled)
   'W'  general-purpose registers (only if const16 option enabled)
   'b'	coprocessor boolean registers
   'f'	floating-point registers
*/

extern enum reg_class xtensa_char_to_class[256];

#define REG_CLASS_FROM_LETTER(C) xtensa_char_to_class[ (int) (C) ]

/* The letters I, J, K, L, M, N, O, and P in a register constraint
   string can be used to stand for particular ranges of immediate
   operands.  This macro defines what the ranges are.  C is the
   letter, and VALUE is a constant value.  Return 1 if VALUE is
   in the range specified by C.

   For Xtensa:

   I = 12-bit signed immediate for movi
   J = 8-bit signed immediate for addi
   K = 4-bit value in (b4const U {0})
   L = 4-bit value in b4constu
   M = 7-bit value in simm7
   N = 8-bit unsigned immediate shifted left by 8 bits for addmi
   O = 4-bit value in ai4const
   P = valid immediate mask value for extui */

#define CONST_OK_FOR_LETTER_P(VALUE, C)					\
  ((C) == 'I' ? (xtensa_simm12b (VALUE))				\
   : (C) == 'J' ? (xtensa_simm8 (VALUE))				\
   : (C) == 'K' ? (((VALUE) == 0) || xtensa_b4const (VALUE))		\
   : (C) == 'L' ? (xtensa_b4constu (VALUE))				\
   : (C) == 'M' ? (xtensa_simm7 (VALUE))				\
   : (C) == 'N' ? (xtensa_simm8x256 (VALUE))				\
   : (C) == 'O' ? (xtensa_ai4const (VALUE))				\
   : (C) == 'P' ? (xtensa_mask_immediate (VALUE))			\
   : FALSE)


/* Similar, but for floating constants, and defining letters G and H.
   Here VALUE is the CONST_DOUBLE rtx itself.  */
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) (0)


/* Other letters can be defined in a machine-dependent fashion to
   stand for particular classes of registers or other arbitrary
   operand types.

   R = memory that can be accessed with a 4-bit unsigned offset
   T = memory in a constant pool (addressable with a pc-relative load)
   U = memory *NOT* in a constant pool

   The offset range should not be checked here (except to distinguish
   denser versions of the instructions for which more general versions
   are available).  Doing so leads to problems in reloading: an
   argptr-relative address may become invalid when the phony argptr is
   eliminated in favor of the stack pointer (the offset becomes too
   large to fit in the instruction's immediate field); a reload is
   generated to fix this but the RTL is not immediately updated; in
   the meantime, the constraints are checked and none match.  The
   solution seems to be to simply skip the offset check here.  The
   address will be checked anyway because of the code in
   GO_IF_LEGITIMATE_ADDRESS.  */

#define EXTRA_CONSTRAINT(OP, CODE)					\
  ((GET_CODE (OP) != MEM) ?						\
       ((CODE) >= 'R' && (CODE) <= 'U'					\
	&& reload_in_progress && GET_CODE (OP) == REG			\
        && REGNO (OP) >= FIRST_PSEUDO_REGISTER)				\
   : ((CODE) == 'R') ? smalloffset_mem_p (OP)				\
   : ((CODE) == 'T') ? !TARGET_CONST16 && constantpool_mem_p (OP)	\
   : ((CODE) == 'U') ? !constantpool_mem_p (OP)				\
   : FALSE)

#define PREFERRED_RELOAD_CLASS(X, CLASS)				\
  xtensa_preferred_reload_class (X, CLASS, 0)

#define PREFERRED_OUTPUT_RELOAD_CLASS(X, CLASS)				\
  xtensa_preferred_reload_class (X, CLASS, 1)
  
#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X)			\
  xtensa_secondary_reload_class (CLASS, MODE, X, 0)

#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X)			\
  xtensa_secondary_reload_class (CLASS, MODE, X, 1)

/* Return the maximum number of consecutive registers
   needed to represent mode MODE in a register of class CLASS.  */
#define CLASS_UNITS(mode, size)						\
  ((GET_MODE_SIZE (mode) + (size) - 1) / (size))

#define CLASS_MAX_NREGS(CLASS, MODE)					\
  (CLASS_UNITS (MODE, UNITS_PER_WORD))


/* Stack layout; function entry, exit and calling.  */

#define STACK_GROWS_DOWNWARD

/* Offset within stack frame to start allocating local variables at.  */
#define STARTING_FRAME_OFFSET						\
  current_function_outgoing_args_size

/* The ARG_POINTER and FRAME_POINTER are not real Xtensa registers, so
   they are eliminated to either the stack pointer or hard frame pointer.  */
#define ELIMINABLE_REGS							\
{{ ARG_POINTER_REGNUM,		STACK_POINTER_REGNUM},			\
 { ARG_POINTER_REGNUM,		HARD_FRAME_POINTER_REGNUM},		\
 { FRAME_POINTER_REGNUM,	STACK_POINTER_REGNUM},			\
 { FRAME_POINTER_REGNUM,	HARD_FRAME_POINTER_REGNUM}}

#define CAN_ELIMINATE(FROM, TO) 1

/* Specify the initial difference between the specified pair of registers.  */
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)			\
  do {									\
    compute_frame_size (get_frame_size ());				\
    if ((FROM) == FRAME_POINTER_REGNUM)					\
      (OFFSET) = 0;							\
    else if ((FROM) == ARG_POINTER_REGNUM)				\
      (OFFSET) = xtensa_current_frame_size;				\
    else								\
      abort ();								\
  } while (0)

/* If defined, the maximum amount of space required for outgoing
   arguments will be computed and placed into the variable
   'current_function_outgoing_args_size'.  No space will be pushed
   onto the stack for each call; instead, the function prologue
   should increase the stack frame size by this amount.  */
#define ACCUMULATE_OUTGOING_ARGS 1

/* Offset from the argument pointer register to the first argument's