predicates.md

Mac OS X 10.4.9 for x86 Source Code gcc 实现源代码

    case CONST:
      {
	HOST_WIDE_INT addend;

	/* Accept only (plus (symbol_ref) (const_int)).  */
	op = XEXP (op, 0);
	if (GET_CODE (op) != PLUS
	    || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
            || GET_CODE (XEXP (op, 1)) != CONST_INT)
	  return false;

	addend = INTVAL (XEXP (op, 1));
	op = XEXP (op, 0);

	/* After reload, we want to allow any offset whatsoever.  This
	   allows reload the opportunity to avoid spilling addresses to
	   the stack, and instead simply substitute in the value from a
	   REG_EQUIV.  We'll split this up again when splitting the insn.  */
	if (reload_in_progress || reload_completed)
	  return true;

	/* Some symbol types we allow to use with any offset.  */
	if (any_offset_symbol_operand (op, mode))
	  return true;

	/* Some symbol types we allow offsets with the low 14 bits of the
	   constant forced to zero so that we do not use up so many GOT
	   entries.  We want to prevent cse from undoing this.  */
	if (aligned_offset_symbol_operand (op, mode))
	  return (addend & 0x3fff) == 0;

	/* The remaining symbol types may never be used with an offset.  */
	return false;
      }

    default:
      return true;
    }
})

;; True if OP is a register operand that is (or could be) a GR reg.
(define_predicate "gr_register_operand"
  (match_operand 0 "register_operand")
{
  unsigned int regno;
  if (GET_CODE (op) == SUBREG)
    op = SUBREG_REG (op);

  regno = REGNO (op);
  return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno));
})

;; True if OP is a register operand that is (or could be) an FR reg.
(define_predicate "fr_register_operand"
  (match_operand 0 "register_operand")
{
  unsigned int regno;
  if (GET_CODE (op) == SUBREG)
    op = SUBREG_REG (op);

  regno = REGNO (op);
  return (regno >= FIRST_PSEUDO_REGISTER || FR_REGNO_P (regno));
})

;; True if OP is a register operand that is (or could be) a GR/FR reg.
(define_predicate "grfr_register_operand"
  (match_operand 0 "register_operand")
{
  unsigned int regno;
  if (GET_CODE (op) == SUBREG)
    op = SUBREG_REG (op);

  regno = REGNO (op);
  return (regno >= FIRST_PSEUDO_REGISTER
	  || GENERAL_REGNO_P (regno)
	  || FR_REGNO_P (regno));
})

;; True if OP is a nonimmediate operand that is (or could be) a GR reg.
(define_predicate "gr_nonimmediate_operand"
  (match_operand 0 "nonimmediate_operand")
{
  unsigned int regno;

  if (GET_CODE (op) == MEM)
    return true;
  if (GET_CODE (op) == SUBREG)
    op = SUBREG_REG (op);

  regno = REGNO (op);
  return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno));
})

;; True if OP is a nonimmediate operand that is (or could be) a FR reg.
(define_predicate "fr_nonimmediate_operand"
  (match_operand 0 "nonimmediate_operand")
{
  unsigned int regno;

  if (GET_CODE (op) == MEM)
    return true;
  if (GET_CODE (op) == SUBREG)
    op = SUBREG_REG (op);

  regno = REGNO (op);
  return (regno >= FIRST_PSEUDO_REGISTER || FR_REGNO_P (regno));
})

;; True if OP is a nonimmediate operand that is (or could be) a GR/FR reg.
(define_predicate "grfr_nonimmediate_operand"
  (match_operand 0 "nonimmediate_operand")
{
  unsigned int regno;

  if (GET_CODE (op) == MEM)
    return true;
  if (GET_CODE (op) == SUBREG)
    op = SUBREG_REG (op);

  regno = REGNO (op);
  return (regno >= FIRST_PSEUDO_REGISTER
	  || GENERAL_REGNO_P (regno)
	  || FR_REGNO_P (regno));
})

;; True if OP is a GR register operand, or zero.
(define_predicate "gr_reg_or_0_operand"
  (ior (match_operand 0 "gr_register_operand")
       (and (match_code "const_int,const_double,const_vector")
	    (match_test "op == CONST0_RTX (GET_MODE (op))"))))

;; True if OP is a GR register operand, or a 5 bit immediate operand.
(define_predicate "gr_reg_or_5bit_operand"
  (ior (match_operand 0 "gr_register_operand")
       (and (match_code "const_int")
	    (match_test "INTVAL (op) >= 0 && INTVAL (op) < 32"))))

;; True if OP is a GR register operand, or a 6 bit immediate operand.
(define_predicate "gr_reg_or_6bit_operand"
  (ior (match_operand 0 "gr_register_operand")
       (and (match_code "const_int")
	    (match_test "CONST_OK_FOR_M (INTVAL (op))"))))

;; True if OP is a GR register operand, or an 8 bit immediate operand.
(define_predicate "gr_reg_or_8bit_operand"
  (ior (match_operand 0 "gr_register_operand")
       (and (match_code "const_int")
	    (match_test "CONST_OK_FOR_K (INTVAL (op))"))))

;; True if OP is a GR/FR register operand, or an 8 bit immediate operand.
(define_predicate "grfr_reg_or_8bit_operand"
  (ior (match_operand 0 "grfr_register_operand")
       (and (match_code "const_int")
	    (match_test "CONST_OK_FOR_K (INTVAL (op))"))))

;; True if OP is a register operand, or an 8 bit adjusted immediate operand.
(define_predicate "gr_reg_or_8bit_adjusted_operand"
  (ior (match_operand 0 "gr_register_operand")
       (and (match_code "const_int")
	    (match_test "CONST_OK_FOR_L (INTVAL (op))"))))

;; True if OP is a register operand, or is valid for both an 8 bit
;; immediate and an 8 bit adjusted immediate operand.  This is necessary
;; because when we emit a compare, we don't know what the condition will be,
;; so we need the union of the immediates accepted by GT and LT.
(define_predicate "gr_reg_or_8bit_and_adjusted_operand"
  (ior (match_operand 0 "gr_register_operand")
       (and (match_code "const_int")
	    (match_test "CONST_OK_FOR_K (INTVAL (op))
                         && CONST_OK_FOR_L (INTVAL (op))"))))

;; True if OP is a register operand, or a 14 bit immediate operand.
(define_predicate "gr_reg_or_14bit_operand"
  (ior (match_operand 0 "gr_register_operand")
       (and (match_code "const_int")
	    (match_test "CONST_OK_FOR_I (INTVAL (op))"))))

;;  True if OP is a register operand, or a 22 bit immediate operand.
(define_predicate "gr_reg_or_22bit_operand"
  (ior (match_operand 0 "gr_register_operand")
       (and (match_code "const_int")
	    (match_test "CONST_OK_FOR_J (INTVAL (op))"))))

;; True if OP is a 7 bit immediate operand.
(define_predicate "dshift_count_operand"
  (and (match_code "const_int")
       (match_test "INTVAL (op) >= 0 && INTVAL (op) < 128")))

;; True if OP is a 6 bit immediate operand.
(define_predicate "shift_count_operand"
  (and (match_code "const_int")
       (match_test "CONST_OK_FOR_M (INTVAL (op))")))

;; True if OP is a 5 bit immediate operand.
(define_predicate "shift_32bit_count_operand"
   (and (match_code "const_int")
        (match_test "INTVAL (op) >= 0 && INTVAL (op) < 32")))

;; True if OP is one of the immediate values 2, 4, 8, or 16.
(define_predicate "shladd_operand"
  (and (match_code "const_int")
       (match_test "INTVAL (op) == 2 || INTVAL (op) == 4 ||
	            INTVAL (op) == 8 || INTVAL (op) == 16")))

;; True if OP is one of the immediate values 1, 2, 3, or 4.
(define_predicate "shladd_log2_operand"
  (and (match_code "const_int")
       (match_test "INTVAL (op) >= 1 && INTVAL (op) <= 4")))

;; True if OP is one of the immediate values  -16, -8, -4, -1, 1, 4, 8, 16.
(define_predicate "fetchadd_operand"
  (and (match_code "const_int")
       (match_test "INTVAL (op) == -16 || INTVAL (op) == -8 ||
                    INTVAL (op) == -4  || INTVAL (op) == -1 ||
                    INTVAL (op) == 1   || INTVAL (op) == 4  ||
                    INTVAL (op) == 8   || INTVAL (op) == 16")))

;; True if OP is 0..3.
(define_predicate "const_int_2bit_operand"
  (and (match_code "const_int")
        (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 3")))

;; True if OP is a floating-point constant zero, one, or a register.
(define_predicate "fr_reg_or_fp01_operand"
  (ior (match_operand 0 "fr_register_operand")
       (and (match_code "const_double")
	    (match_test "CONST_DOUBLE_OK_FOR_G (op)"))))

;; Like fr_reg_or_fp01_operand, but don't allow any SUBREGs.
(define_predicate "xfreg_or_fp01_operand"
  (and (match_operand 0 "fr_reg_or_fp01_operand")
       (not (match_code "subreg"))))

;; True if OP is a constant zero, or a register.
(define_predicate "fr_reg_or_0_operand"
  (ior (match_operand 0 "fr_register_operand")
       (and (match_code "const_double,const_vector")
	    (match_test "op == CONST0_RTX (GET_MODE (op))"))))

;; True if this is a comparison operator, which accepts a normal 8-bit
;; signed immediate operand.
(define_predicate "normal_comparison_operator"
  (match_code "eq,ne,gt,le,gtu,leu"))

;; True if this is a comparison operator, which accepts an adjusted 8-bit
;; signed immediate operand.
(define_predicate "adjusted_comparison_operator"
  (match_code "lt,ge,ltu,geu"))

;; True if this is a signed inequality operator.
(define_predicate "signed_inequality_operator"
  (match_code "ge,gt,le,lt"))

;; True if this operator is valid for predication.
(define_predicate "predicate_operator"
  (match_code "eq,ne"))

;; True if this operator can be used in a conditional operation.
(define_predicate "condop_operator"
  (match_code "plus,minus,ior,xor,and"))

;; These three are hardware registers that can only be addressed in
;; DImode.  It's not strictly necessary to test mode == DImode here,
;; but it makes decent insurance against someone writing a
;; match_operand wrong.

;; True if this is the ar.lc register.
(define_predicate "ar_lc_reg_operand"
  (and (match_code "reg")
       (match_test "mode == DImode && REGNO (op) == AR_LC_REGNUM")))

;; True if this is the ar.ccv register.
(define_predicate "ar_ccv_reg_operand"
  (and (match_code "reg")
       (match_test "mode == DImode && REGNO (op) == AR_CCV_REGNUM")))

;; True if this is the ar.pfs register.
(define_predicate "ar_pfs_reg_operand"
  (and (match_code "reg")
       (match_test "mode == DImode && REGNO (op) == AR_PFS_REGNUM")))

;; True if OP is valid as a base register in a reg + offset address.
;; ??? Should I copy the flag_omit_frame_pointer and cse_not_expected
;; checks from pa.c basereg_operand as well?  Seems to be OK without them
;; in test runs.
(define_predicate "basereg_operand"
  (match_operand 0 "register_operand")
{
  if (GET_CODE (op) == SUBREG)
    op = SUBREG_REG (op);
  return REG_POINTER (op);
})