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📄 ns32k.h

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#define ADDITIONAL_REGISTER_NAMES \{{"l0", 8}, {"l2", 10}, {"l4", 12}, {"l6", 14}}/* l0-7 are not recognized by the assembler. These are the names to use, * but we don't want ambiguous names in REGISTER_NAMES */#define OUTPUT_REGISTER_NAMES \{"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ "f1", "l1h","f3", "l3h","f5", "l5h","f7", "f7h", \ "fp", "sp"}#define REG_ALLOC_ORDER \{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 16, 10, 11, 18, 12, 13, 20, 14, 15, 22, 24, 25, 17, 19, 23}/* How to renumber registers for dbx and gdb.   NS32000 may need more change in the numeration. XXX */#define DBX_REGISTER_NUMBER(REGNO) \  ((REGNO) < L1_REGNUM? (REGNO) \   : (REGNO) < FRAME_POINTER_REGNUM? (REGNO) - L1_REGNUM + 22 \   : (REGNO) == FRAME_POINTER_REGNUM? 17 \   : 16)/* dwarf2out.c can't understand the funny DBX register numbering. * We use dwarf2out.c for exception handling even though we use DBX * for debugging */#define DWARF_FRAME_REGNUM(REGNO) (REGNO)#define R0_REGNUM 0#define F0_REGNUM 8#define L1_REGNUM 16/* Specify the registers used for certain standard purposes.   The values of these macros are register numbers.  *//* NS32000 pc is not overloaded on a register.  *//* #define PC_REGNUM *//* Register to use for pushing function arguments.  */#define STACK_POINTER_REGNUM 25/* Base register for access to local variables of the function.  */#define FRAME_POINTER_REGNUM 24/* Return number of consecutive hard regs needed starting at reg REGNO   to hold something of mode MODE.   This is ordinarily the length in words of a value of mode MODE   but can be less for certain modes in special long registers.   On the ns32k, all registers are 32 bits long except for the 32381 "long"   registers but we treat those as pairs  */#define LONG_FP_REGS_P(REGNO) ((REGNO) >= L1_REGNUM && (REGNO) < L1_REGNUM + 8)#define HARD_REGNO_NREGS(REGNO, MODE)   \ ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */#define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok (REGNO, MODE)/* Value is 1 if it is a good idea to tie two pseudo registers   when one has mode MODE1 and one has mode MODE2.   If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,   for any hard reg, then this must be 0 for correct output.  */#define MODES_TIEABLE_P(MODE1, MODE2)					\  ((FLOAT_MODE_P(MODE1) && FLOAT_MODE_P(MODE2)				\    && (GET_MODE_UNIT_SIZE(MODE1) == GET_MODE_UNIT_SIZE(MODE2)))	\   || (!FLOAT_MODE_P(MODE1) && !FLOAT_MODE_P(MODE2)))/* Value should be nonzero if functions must have frame pointers.   Zero means the frame pointer need not be set up (and parms   may be accessed via the stack pointer) in functions that seem suitable.   This is computed in `reload', in reload1.c.  */#define FRAME_POINTER_REQUIRED 0/* Base register for access to arguments of the function.  */#define ARG_POINTER_REGNUM 24/* Register in which static-chain is passed to a function.  */#define STATIC_CHAIN_REGNUM 1/* Register in which address to store a structure value   is passed to a function.  */#define NS32K_STRUCT_VALUE_REGNUM 2/* Define the classes of registers for register constraints in the   machine description.  Also define ranges of constants.   One of the classes must always be named ALL_REGS and include all hard regs.   If there is more than one class, another class must be named NO_REGS   and contain no registers.   The name GENERAL_REGS must be the name of a class (or an alias for   another name such as ALL_REGS).  This is the class of registers   that is allowed by "g" or "r" in a register constraint.   Also, registers outside this class are allocated only when   instructions express preferences for them.   The classes must be numbered in nondecreasing order; that is,   a larger-numbered class must never be contained completely   in a smaller-numbered class.   For any two classes, it is very desirable that there be another   class that represents their union.  */enum reg_class{ NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0, FLOAT_REGS,  LONG_REGS, FP_REGS, GEN_AND_FP_REGS, FRAME_POINTER_REG,  STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES };#define N_REG_CLASSES (int) LIM_REG_CLASSES/* Give names of register classes as strings for dump file.  */#define REG_CLASS_NAMES							    \ {"NO_REGS", "GENERAL_REGS", "FLOAT_REG0", "LONG_FLOAT_REG0", "FLOAT_REGS", \  "LONG_REGS", "FP_REGS", "GEN_AND_FP_REGS", "FRAME_POINTER_REG", 	    \  "STACK_POINTER_REG", "GEN_AND_MEM_REGS", "ALL_REGS" }/* Define which registers fit in which classes.   This is an initializer for a vector of HARD_REG_SET   of length N_REG_CLASSES.  */#define REG_CLASS_CONTENTS				\	{{0},			/* NO_REGS */		\	 {0x00ff},		/* GENERAL_REGS */	\	 {0x100},		/* FLOAT_REG0 */	\	 {0x300},		/* LONG_FLOAT_REG0 */	\	 {0xff00},		/* FLOAT_REGS */	\         {0xff0000},            /* LONG_REGS */         \         {0xffff00},		/* FP_REGS */		\         {0xffffff},		/* GEN_AND_FP_REGS */	\         {0x1000000},		/* FRAME_POINTER_REG */	\         {0x2000000},		/* STACK_POINTER_REG */	\         {0x30000ff},		/* GEN_AND_MEM_REGS */	\	 {0x3ffffff}		/* ALL_REGS */		\	}#define SUBSET_P(CLASS1, CLASS2)			\   ((ns32k_reg_class_contents[CLASS1][0]		\     & ~ns32k_reg_class_contents[CLASS2][0]) == 0)/* LONG_REGS are registers which can only hold double precision floats * and can only be accessible by long float instructions. */#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)	\  (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)		\   ? reg_classes_intersect_p (LONG_REGS, CLASS) : 0)/* The same information, inverted:   Return the class number of the smallest class containing   reg number REGNO.  This could be a conditional expression   or could index an array.  */#define REGNO_REG_CLASS(REGNO)  (regclass_map[REGNO])/* The class value for index registers, and the one for base regs.  */#define INDEX_REG_CLASS GENERAL_REGS#define BASE_REG_CLASS  GEN_AND_MEM_REGS/* Get reg_class from a letter such as appears in the machine description.  */#define REG_CLASS_FROM_LETTER(C)		\ ((C) == 'u' ? FLOAT_REG0			\  : (C) == 'v' ? LONG_FLOAT_REG0		\  : (C) == 'f' ? FLOAT_REGS			\  : (C) == 'l' ? FP_REGS			\  : (C) == 'x' ? FRAME_POINTER_REG		\  : (C) == 'y' ? STACK_POINTER_REG		\  : NO_REGS)/* The letters I, J, K, L and M in a register constraint string   can be used to stand for particular ranges of immediate operands.   This macro defines what the ranges are.   C is the letter, and VALUE is a constant value.   Return 1 if VALUE is in the range specified by C.   On the ns32k, these letters are used as follows:   I : Matches integers which are valid shift amounts for scaled indexing.       These are 0, 1, 2, 3 for byte, word, double, and quadword.       Used for matching arithmetic shifts only on 32032 & 32332.   J : Matches integers which fit a "quick" operand.   K : Matches integers 0 to 7 (for inss and exts instructions).  */#define CONST_OK_FOR_LETTER_P(VALUE, C)  \  ((VALUE) < 8 && (VALUE) + 8 >= 0 ?		\   ((C) == 'I' ? (!TARGET_32532 && 0 <= (VALUE) && (VALUE) <= 3) : \    (C) == 'J' ? (VALUE) <= 7 :			\    (C) == 'K' ? 0 <= (VALUE) : 0) : 0)/* Similar, but for floating constants, and defining letters G and H.   Here VALUE is the CONST_DOUBLE rtx itself.  */#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1/* Given an rtx X being reloaded into a reg required to be   in class CLASS, return the class of reg to actually use.   In general this is just CLASS; but on some machines   in some cases it is preferable to use a more restrictive class.  *//* We return GENERAL_REGS instead of GEN_AND_MEM_REGS.   The latter offers no real additional possibilities   and can cause spurious secondary reloading.  */#define PREFERRED_RELOAD_CLASS(X,CLASS) \ ((CLASS) == GEN_AND_MEM_REGS ? GENERAL_REGS : (CLASS))/* Return the maximum number of consecutive registers   needed to represent mode MODE in a register of class CLASS.  *//* On the 32000, this is the size of MODE in words */#define CLASS_MAX_NREGS(CLASS, MODE) \  ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)/* Stack layout; function entry, exit and calling.  *//* Define this if pushing a word on the stack   makes the stack pointer a smaller address.  */#define STACK_GROWS_DOWNWARD/* Define this if the nominal address of the stack frame   is at the high-address end of the local variables;   that is, each additional local variable allocated   goes at a more negative offset in the frame.  */#define FRAME_GROWS_DOWNWARD/* Offset within stack frame to start allocating local variables at.   If FRAME_GROWS_DOWNWARD, this is the offset to the END of the   first local allocated.  Otherwise, it is the offset to the BEGINNING   of the first local allocated.  */#define STARTING_FRAME_OFFSET 0/* A C expression whose value is RTL representing the location of the   incoming return address at the beginning of any function, before   the prologue.  This RTL is either a `REG', indicating that the   return value is saved in `REG', or a `MEM' representing a location   in the stack.   You only need to define this macro if you want to support call   frame debugging information like that provided by DWARF 2.   Before the prologue, RA is at 0(sp).  */#define INCOMING_RETURN_ADDR_RTX \  gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))/* A C expression whose value is RTL representing the value of the   return address for the frame COUNT steps up from the current frame,   after the prologue.  FRAMEADDR is the frame pointer of the COUNT   frame, or the frame pointer of the COUNT - 1 frame if   `RETURN_ADDR_IN_PREVIOUS_FRAME' is defined.   After the prologue, RA is at 4(fp) in the current frame.  */#define RETURN_ADDR_RTX(COUNT, FRAME)					\  ((COUNT> 0 && flag_omit_frame_pointer)? NULL_RTX			\   : gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, (FRAME), GEN_INT(4))))/* A C expression whose value is an integer giving the offset, in   bytes, from the value of the stack pointer register to the top of   the stack frame at the beginning of any function, before the   prologue.  The top of the frame is defined to be the value of the   stack pointer in the previous frame, just before the call   instruction.   You only need to define this macro if you want to support call   frame debugging information like that provided by DWARF 2. */#define INCOMING_FRAME_SP_OFFSET 4/* If we generate an insn to push BYTES bytes,   this says how many the stack pointer really advances by.   On the 32000, sp@- in a byte insn really pushes a BYTE.  */#define PUSH_ROUNDING(BYTES) (BYTES)/* Offset of first parameter from the argument pointer register value.  */#define FIRST_PARM_OFFSET(FNDECL) 8/* Value is the number of byte of arguments automatically   popped when returning from a subroutine call.   FUNDECL is the declaration node of the function (as a tree),   FUNTYPE is the data type of the function (as a tree),   or for a library call it is an identifier node for the subroutine name.   SIZE is the number of bytes of arguments passed on the stack.   On the 32000, the RET insn may be used to pop them if the number     of args is fixed, but if the number is variable then the caller     must pop them all.  RET can't be used for library calls now     because the library is compiled with the Unix compiler.   Use of RET is a selectable option, since it is incompatible with   standard Unix calling sequences.  If the option is not selected,   the caller must always pop the args.   The attribute stdcall is equivalent to RTD on a per module basis.  */#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \  (ns32k_return_pops_args (FUNDECL, FUNTYPE, SIZE))/* Define how to find the value returned by a function.   VALTYPE is the data type of the value (as a tree).   If the precise function being called is known, FUNC is its FUNCTION_DECL;   otherwise, FUNC is 0.  *//* On the 32000 the return value is in R0,   or perhaps in F0 if there is fp support.  */#define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE(TYPE_MODE (VALTYPE))/* Define how to find the value returned by a library function   assuming the value has mode MODE.  */

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