📄 trian_vhd.sdo
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(ABSOLUTE
(PORT datac (539:539:539) (539:539:539))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[9\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT datain (654:654:654) (654:654:654))
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (5350:5350:5350) (5350:5350:5350))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[10\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datad (516:516:516) (516:516:516))
(IOPATH datad regin (309:309:309) (309:309:309))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[10\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (5350:5350:5350) (5350:5350:5350))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[11\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datad (1269:1269:1269) (1269:1269:1269))
(IOPATH datad regin (309:309:309) (309:309:309))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[11\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (5350:5350:5350) (5350:5350:5350))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[12\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datac (543:543:543) (543:543:543))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[12\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT datain (658:658:658) (658:658:658))
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (5350:5350:5350) (5350:5350:5350))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[13\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datad (529:529:529) (529:529:529))
(IOPATH datad regin (309:309:309) (309:309:309))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[13\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (5350:5350:5350) (5350:5350:5350))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[14\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datad (523:523:523) (523:523:523))
(IOPATH datad regin (309:309:309) (309:309:309))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[14\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (5350:5350:5350) (5350:5350:5350))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[15\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datac (544:544:544) (544:544:544))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[15\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT datain (659:659:659) (659:659:659))
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (5350:5350:5350) (5350:5350:5350))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[16\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datac (541:541:541) (541:541:541))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[16\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT datain (656:656:656) (656:656:656))
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (5350:5350:5350) (5350:5350:5350))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[17\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datad (526:526:526) (526:526:526))
(IOPATH datad regin (309:309:309) (309:309:309))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[17\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (5350:5350:5350) (5350:5350:5350))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[18\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datac (543:543:543) (543:543:543))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[18\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT datain (658:658:658) (658:658:658))
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (5350:5350:5350) (5350:5350:5350))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[19\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datad (523:523:523) (523:523:523))
(IOPATH datad regin (309:309:309) (309:309:309))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[19\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (5350:5350:5350) (5350:5350:5350))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[20\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT datad (526:526:526) (526:526:526))
(IOPATH datad regin (309:309:309) (309:309:309))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\inst16\|lpm_shiftreg_component\|dffs\[20\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (5350:5350:5350) (5350:5350:5350))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\inst3\|counter\[0\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (1261:1261:1261) (1261:1261:1261))
(PORT datab (510:510:510) (510:510:510))
(IOPATH dataa regin (738:738:738) (738:738:738))
(IOPATH datab regin (607:607:607) (607:607:607))
(IOPATH dataa cout0 (564:564:564) (564:564:564))
(IOPATH datab cout0 (423:423:423) (423:423:423))
(IOPATH dataa cout1 (575:575:575) (575:575:575))
(IOPATH datab cout1 (432:432:432) (432:432:432))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\inst3\|counter\[0\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (4158:4158:4158) (4158:4158:4158))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\inst3\|counter\[1\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (534:534:534) (534:534:534))
(PORT datab (1258:1258:1258) (1258:1258:1258))
(IOPATH dataa regin (738:738:738) (738:738:738))
(IOPATH datab regin (607:607:607) (607:607:607))
(IOPATH cin0 regin (783:783:783) (783:783:783))
(IOPATH cin1 regin (787:787:787) (787:787:787))
(IOPATH dataa cout0 (564:564:564) (564:564:564))
(IOPATH datab cout0 (423:423:423) (423:423:423))
(IOPATH cin0 cout0 (78:78:78) (78:78:78))
(IOPATH dataa cout1 (575:575:575) (575:575:575))
(IOPATH datab cout1 (432:432:432) (432:432:432))
(IOPATH cin1 cout1 (80:80:80) (80:80:80))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\inst3\|counter\[1\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (4158:4158:4158) (4158:4158:4158))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
(HOLD datain (posedge clk) (15:15:15))
)
)
(CELL
(CELLTYPE "cyclone_asynch_lcell")
(INSTANCE \\inst3\|counter\[2\]\~I\\.lecomb)
(DELAY
(ABSOLUTE
(PORT dataa (533:533:533) (533:533:533))
(PORT datab (1255:1255:1255) (1255:1255:1255))
(IOPATH dataa regin (738:738:738) (738:738:738))
(IOPATH datab regin (607:607:607) (607:607:607))
(IOPATH cin0 regin (783:783:783) (783:783:783))
(IOPATH cin1 regin (787:787:787) (787:787:787))
(IOPATH dataa cout0 (564:564:564) (564:564:564))
(IOPATH datab cout0 (423:423:423) (423:423:423))
(IOPATH cin0 cout0 (78:78:78) (78:78:78))
(IOPATH dataa cout1 (575:575:575) (575:575:575))
(IOPATH datab cout1 (432:432:432) (432:432:432))
(IOPATH cin1 cout1 (80:80:80) (80:80:80))
)
)
)
(CELL
(CELLTYPE "cyclone_lcell_register")
(INSTANCE \\inst3\|counter\[2\]\~I\\.lereg)
(DELAY
(ABSOLUTE
(PORT aclr (898:898:898) (898:898:898))
(PORT clk (4158:4158:4158) (4158:4158:4158))
(IOPATH (posedge clk) regout (224:224:224) (224:224:224))
(IOPATH (posedge aclr) regout (283:283:283) (283:283:283))
)
)
(TIMINGCHECK
(SETUP datain (posedge clk) (37:37:37))
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