📄 dlctx.c
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/*********************************************************************
* Filename: DLCTX.c
*
* Description: Illustrates the operation of DLC field for a Transmit mailbox.
*
* Various values of DLC field are tried for mailbox 22
*
* Last update: 12/24/2002
*********************************************************************/
#include "DSP28_Device.h"
void error(int);
int j; // j is used to store the incrementing DLC values..
long i;
void InitECan(void);
main()
{
/* Create a shadow register structure for the CAN control registers. This is
needed, since, only 32-bit access is allowed to these registers. 16-bit access
to these registers could potentially corrupt the register contents. This is
especially true while writing to a bit (or group of bits) among bits 16 - 31 */
struct ECAN_REGS ECanaShadow;
/* Initialize the CAN module */
InitECan();
/* Write to the MSGID field */
ECanaMboxes.MBOX22.MSGID.all = 0x80000022; // Ext Identifier (ID = 22)
/* Configure Mailbox under test as a Transmit mailbox */
ECanaShadow.CANMD.all = ECanaRegs.CANMD.all;
ECanaShadow.CANMD.bit.MD22 = 0;
ECanaRegs.CANMD.all = ECanaShadow.CANMD.all;
/* Enable Mailbox under test */
ECanaShadow.CANME.all = ECanaRegs.CANME.all;
ECanaShadow.CANME.bit.ME22 = 1;
ECanaRegs.CANME.all = ECanaShadow.CANME.all;
/* Write to the mailbox RAM field */
ECanaMboxes.MBOX22.MDRL.all = 0x01234567;
ECanaMboxes.MBOX22.MDRH.all = 0x89ABCDEF;
/* Begin transmitting */
for(j=0; j < 9; j++) // The DLC value is incremented every time
{ // the loop is run
ECanaMboxes.MBOX22.MCF.bit.DLC = j;
ECanaShadow.CANTRS.all = 0; // Set TRS bit
ECanaShadow.CANTRS.bit.TRS22 = 1;
ECanaRegs.CANTRS.all = ECanaShadow.CANTRS.all;
while(ECanaRegs.CANTA.bit.TA22 == 0 ) {} // Wait for TA22 bit to be set..
ECanaShadow.CANTA.all = 0; // See Note 1
ECanaShadow.CANTA.bit.TA22 = 1; // Clear TA22
ECanaRegs.CANTA.all = ECanaShadow.CANTA.all;
asm (" NOP");
}
asm(" ESTOP0");
}
void error(int ErrorFlag)
{
asm(" ESTOP0");
for (;;);
}
/*
Note 1: Initialize the "shadow-TA register" to zero before setting any bit(s)
in order to clear it (them) in the TA register. Otherwise, some other TAn bit(s) that is (are)
set could be inadvertently cleared.
Note 2: If DLC values > than 8 are written, those values do get stored in
the DLC field. However, only a DLC value of 8 (and hence 8 bytes) are
transmited on the bus.
A total of nine transmissions progressing from 0 to 8 bytes can be monitored
on the CAN bus.
CANalyzer configuration file: 1M80spRx.cfg
*/
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