2410iic.c

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//====================================================================
// File Name : 2410IIC.c
// Function  : S3C2410 IIC-bus Master Tx/Rx mode Test Program
//             (Interrupt / Non Interrupt (Polling))
// Program   : Shin, On Pil (SOP)
// Date      : May 21, 2002
// Version   : 0.0
// History
//   0.0 : Programming start (March 11, 2002) -> SOP
//====================================================================

#include <string.h>
#include "2410addr.h"
#include "2410lib.h"
#include "def.h"
#include "2410IIC.h"

static U8 _iicData[IICBUFSIZE];
static volatile int _iicDataCount;
static volatile int _iicStatus;
static volatile int _iicMode;
static int _iicPt;

//=========================
//名称：Test_Iic
//功能：验证IIC读写功能
//返回值:void
//参数: void
//=========================
void Test_Iic(void)
{
    unsigned int i,j,save_E,save_PE;
    static U8 data[256];

    Uart_Printf("[ IIC Test(Interrupt) using KS24C080 ]\n");

	//保护现场
    save_E   = rGPECON;
    save_PE  = rGPEUP;

	//GPEUP  [15:14] = 11 : Pull-up disable
	rGPEUP  |= 0xc000;                  //Pull-up disable

	//GPECON [15:14] = 1010 : GPE15:IICSDA
	//                        GPE14:IICSCL
	rGPECON |= 0xa00000;               


    pISR_IIC = (unsigned)IicInt;
    rINTMSK &= ~(BIT_IIC);

	//Enable ACK, Prescaler IICCLK=PCLK/16, Enable interrupt, Transmit clock 	value Tx clock=IICCLK/16
	//IICCON  Transmit clockvalue        [3:0]  = 1111 : Tx clock = IICCLK/(IICCON[3:0]+1).
	//IICCON  Interrupt pending flag     [4  ]  = 0    : 1) No interrupt pending (when read).
	//													 2) Clear pending condition & Resume the operation (when write).
	//IICCON  Tx/Rx Interrupt            [5  ]  = 1    : Enable
	//IICCON  Tx clock source selection  [6  ]  = 1    : IICCLK = fPCLK /512
	//IICCON  Acknowledge generation     [7  ]  = 1    : Enable
    rIICCON = (1<<7) | (0<<6) | (1<<5) | (0xf);

    //IICADD Slave address [7:0] = 00010000 : 2410 slave address = [7:1]
    rIICADD  = 0x10;                  
    
	//IICSTAT Last-received bit status flag [0  ] = 0 : Last-received bit is 0 (ACK was received).
	//IICSTAT Address zero status flag      [1  ] = 0 : Cleared when START/STOP condition was detected.
    //IICSTAT Address-as-slavestatus flag   [2  ] = 0 : Cleared when START/STOP condition was detected
    //IICSTAT Arbitration status flag       [3  ] = 0 : Bus arbitration successful
    //IICSTAT Serial output                 [4  ] = 1 : Enable Rx/Tx
    //IICSTAT Busy signal status /START STOP condition
    //                                      [5  ] = 0 : read) Not busy (when read) write) STOP signal generation
    //IICSTAT Mode selection                [7:6] = 00: Slave receive mode
    rIICSTAT = 0x10;                  
    Uart_Printf("Write test data into KS24C080\n");

    for(i=0;i<256;i++)
	    Wr24C080(0xa0,(U8)i,i);//写入数据
         
    for(i=0;i<256;i++)
        data[i] = 1;//清空数组保证读数的可靠

    Uart_Printf("Read test data from KS24C080\n");
    
    for(i=0;i<256;i++)
        Rd24C080(0xa0,(U8)i,&(data[i])); //读出数据

        //Line changed 0 ~ f
    for(i=0;i<16;i++)
    {
        for(j=0;j<16;j++)
        Uart_Printf("%2x ",data[i*16+j]);
        Uart_Printf("\n");
    }
	// 恢复现场
    rINTMSK |= BIT_IIC;    
    rGPEUP  = save_PE;
    rGPECON = save_E;
	Uart_Printf("TEST FINISHED!!");
}


//==============================        
//名称：Wr24C080（） 
//功能：向24c080中写入数据
//返回值:void
//参数: slvAddr, addr,data
//==============================
void Wr24C080(U32 slvAddr,U32 addr,U8 data)//芯片地址，片内地址，数据
{
    _iicMode      = WRDATA;    //通信模式
    _iicPt        = 0;         //通信指针
    _iicData[0]   = (U8)addr;  //通信数据
    _iicData[1]   = data;
    _iicDataCount = 2;         //通信计数

	//IICDS 数据寄存器 [7:0] slvAddr 24c0800芯片的地址
    rIICDS   = slvAddr;                 //0xa0

	//IICSTAT Serial output                 [4  ] = 1 : Enable Rx/Tx
    //IICSTAT Busy signal status /START STOP condition
    //                                      [5  ] = 1 : read) Busy (when read) write) START signal generation.
    //IICSTAT Mode selection                [7:6] = 11: Master transmit mode    
    rIICSTAT = 0xf0;                    //MasTx,Start

	//Clearing the pending bit isn't needed because the pending bit has been cleared.
    while(_iicDataCount!=-1);//当数据没有全部传递结束
    _iicMode = POLLACK;//送出ACK信号

    while(1)
    {
    	//IICDS 数据寄存器 [7:0] slvAddr 24c0800芯片的地址
        rIICDS     = slvAddr;
		_iicStatus = 0x100;

		//IICSTAT Serial output                 [4  ] = 1 : Enable Rx/Tx
	    //IICSTAT Busy signal status /START STOP condition
	    //                                      [5  ] = 1 : read) Busy (when read) write) START signal generation.
	    //IICSTAT Mode selection                [7:6] = 11: Master transmit mode    	
        rIICSTAT   = 0xf0;              //MasTx,Start

		//Enable ACK, Prescaler IICCLK=PCLK/16, Enable interrupt, Transmit clock 	value Tx clock=IICCLK/16
		//IICCON  Transmit clockvalue        [3:0]  = 1111 : Tx clock = IICCLK/(IICCON[3:0]+1).
		//IICCON  Interrupt pending flag     [4  ]  = 0    : 1) No interrupt pending (when read).
		//													 2) Clear pending condition & Resume the operation (when write).
		//IICCON  Tx/Rx Interrupt            [5  ]  = 1    : Enable
		//IICCON  Tx clock source selection  [6  ]  = 0    : IICCLK = fPCLK /16
		//IICCON  Acknowledge generation     [7  ]  = 1    : Enable
        rIICCON    = 0xaf;              //Resumes IIC operation. 
           
        while(_iicStatus==0x100);
           
        if(!(_iicStatus&0x1))
            break;                      //When ACK is received
    }
	//IICSTAT Last-received bit status flag [0  ] = 0 : Last-received bit is 0 (ACK was received).
	//IICSTAT Address zero status flag      [1  ] = 0 : Cleared when START/STOP condition was detected.
	//IICSTAT Address-as-slavestatus flag   [2  ] = 0 : Cleared when START/STOP condition was detected
	//IICSTAT Arbitration status flag       [3  ] = 0 : Bus arbitration successful
    //IICSTAT Serial output                 [4  ] = 1 : Enable Rx/Tx
    //IICSTAT Busy signal status /START STOP condition
    //                                      [5  ] = 0 : read) Not busy (when read) 
    //                                                  write) STOP signal generation
    //IICSTAT Mode selection 
    rIICSTAT = 0xd0;                    //Stop MasTx condition 

	//IICCON  Transmit clockvalue        [3:0]  = 1111 : Tx clock = IICCLK/(IICCON[3:0]+1).
	//IICCON  Interrupt pending flag     [4  ]  = 0    : 1) No interrupt pending (when read).
	//													 2) Clear pending condition &
	//													 Resume the operation (when write).
	//IICCON  Tx/Rx Interrupt            [5  ]  = 1    : Enable
	//IICCON  Tx clock source selection  [6  ]  = 0    : IICCLK = fPCLK /16
	//IICCON  Acknowledge generation     [7  ]  = 1    : Enable
    rIICCON  = 0xaf;                    //Resumes IIC operation. 
    Delay(1);                           //Wait until stop condtion is in effect.
       //Write is completed.
}
//==============================        
//名称：Rd24C080（） 
//功能：从24c080中读取数据
//返回值:void