fet140_i2c_slav.s43

基于IAR Workbench for MSP430 的汇编语言例程

;******************************************************************************
;   MSP-FET430P140 Demo - I2C Slave Read from MSP430 Master
;
;   Description: This demo connects two MSP430's via the I2C bus.  The master 
;   reads from the slave. This is the slave code. The master code is called
;   fet140_i2c_06M - interrupt.s43. The TX data begins at 0 and is incremented 
;   each time it is sent. The master checks the data it receives for validity.
;   If it is incorrect, it stops communicating and the P1.0 LED will stay on.
;   The TXRDYIFG interrupt is used to know when to TX.
;   
;                                 /|\  /|\
;                  MSP430F169     10k  10k     MSP430F169
;                    slave         |    |        master           
;              -----------------|  |    |  ----------------- 
;             |             P3.1|<-|---+->|P3.1             |
;             |                 |  |      |             P1.0|-->LED
;             |                 |  |      |                 |
;             |             P3.3|<-+----->|P3.3             |
;             |                 |         |                 |
;
;
;   M.Mitchell
;   Texas Instruments, Inc
;   January 2004
;******************************************************************************
#include  "msp430x16x.h"
;------------------------------------------------------------------------------ 
            ORG     01100h                  ; Progam Start 
;------------------------------------------------------------------------------ 
RESET       mov.w   #0A00h,SP               ; Initialize 'F169 stackpointer
StopWDT     mov.w   #WDTPW+WDTHOLD,&WDTCTL  ; Stop WDT
            bis.b   #0Ah,&P3SEL             ; Select I2C pins
            
I2C_init    bis.b   #I2C+SYNC,&U0CTL        ; Recommended init procedure
            bic.b   #I2CEN,&U0CTL           ; Recommended init procedure
            bis.b   #I2CSSEL1,&I2CTCTL      ; SMCLK
            mov     #0048h,&I2COA           ; Own Address is 048h
            bis.b   #TXRDYIE,&I2CIE         ; Enable TXRDYIFG interrupt
            bis.b   #I2CEN,&U0CTL           ; Enable I2C
            
            clr     R5                      ; Use R5 to hold TX data
            
            eint                            ; enable interrupts
            
Mainloop    bis.b   #LPM0,SR                ; Enter LPM0
            nop                             ; Required only for debugger

;------------------------------------------------------------------------------ 
I2C_ISR;    Common ISR for I2C Module         
;------------------------------------------------------------------------------ 
            add     &I2CIV,PC               ; Add I2C offset vector
            reti                            ; No Interrupt
            reti                            ; Arbitration lost
            reti                            ; No Acknowledge
            reti                            ; Own Address
            reti                            ; Register Access Ready
            reti                            ; Receive Ready
            jmp     TXRDY_ISR               ; Transmit Ready
            reti                            ; General Call
            reti                            ; Start Condition
                                    
TXRDY_ISR   mov.b   R5,&I2CDRB              ; Load I2CDRB
            inc.b   R5                      ; Increment data
            reti
            
;------------------------------------------------------------------------------ 
;           Interrupt Vectors Used MSP430x16x         
;------------------------------------------------------------------------------ 
            ORG     0FFFEh                  ; MSP430 RESET vector
            DW      RESET                   ;
            ORG     0FFF0h                  ; I2C interrupt vector
            DW      I2C_ISR                  
            END