📄 mpc8272.h
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uword ExtTctBase; /* Extrnal TCT base address */
uword ExtTcteBase; /* Extrnal ACT base address */
ushort VUeadOffset; /* The offset in half-wordunits of the VUEAD
entry in the VUDC extra header. Should be
even address. If little-endian format is
used, the VUeadOffset is of the little-endian
format. */
uchar reserved2[2]; /* Reserved */
ushort PmtBase; /* Performance monitoring table base address*/
ushort ApcParamBase; /* APC Parameters table base address */
ushort FbpParamBase; /* Free buffer pool parameters base address */
ushort IntQParamBase; /* Interrupt queue parameters table base */
uchar reserved3[2];
ushort VUniStatTableBase; /* VUNI statistics table base */
uword BdBaseExt; /* BD ring base address extension */
union
{
struct AddressCompressionPram AddrCompression;
struct ExtCamPram ExtCam;
} AddrMapping; /* Address look-up mechanism */
ushort VciFiltering; /* VCI filtering enable bits. If bit i is set,
the cell with VCI=i will be sent to the
raw cell queue. The bits 0-2 and 5 should
be zero. */
ushort Gmode; /* Global mode */
ushort CommInfo1; /* The information field associated with the*/
uword CommInfo2; /* last host command */
uchar reserved4[4]; /* Reserved */
uword CRC32Preset; /* Preset for CRC32 */
uword CRC32Mask; /* Constant mask for CRC32 */
ushort AAL1SnpTableBase; /* AAl1 SNP protection look-up table base */
ushort reserved5; /* Reserved */
uword SrtsBase; /* External SRTS logic base address. For AAL1
only. Should be 16 bytes aligned */
ushort IdleBase; /* Idle cell base address */
ushort IdleSize; /* Idle cell size: 52, 56, 60, 64 */
uword EmptyCellPayload; /* Empty cell payload (little-indian) */
/* ABR specific only */
uword Trm; /* VUpper bound on time between F-RM cells for active source */
ushort Nrm; /* Controls the maximum data cells sent for each F-RM cell. */
ushort Mrm; /* Controls bandwidth between F-RM, B-RM and user data cell */
ushort Tcr; /* Tag cell rate */
ushort AbrRxTcte; /* ABR reserved area address (2-UHWORD aligned)*/
uchar reserved7[76]; /* Reserved */
} _PackedType t_Atm_Pram;
/*----------------------------*/
/* AAL2 */
/*----------------------------*/
typedef _Packed struct
{
uchar reserved0[64]; /* Reserved area */
ushort rcell_tmp_base; /* Rx cell temp address */
ushort tcell_tmp_base; /* Tx cell temp address */
ushort udc_tmp_base; /* UDC mode only */
ushort int_rct_base; /* Internal Rx connection table base */
ushort int_tct_base; /* Internal Tx connection table base */
ushort int_tcte_base; /* Internal Tx connection table extension base */
uword ras_timer_dur; /* RAS timer duration in useconds */
uword ext_rct_base; /* External Rx connection table base */
uword ext_tct_base; /* External Tx connection table base */
uword ext_tcte_base; /* External Tx connection table extension base */
ushort uead_offest; /* Offset of UEAD entry in UDC extra header */
ushort rxqd_base; /* Pointer to base address of internal RxQD */
ushort pmt_base; /* Performance monitoring table */
ushort apcp_base; /* APC parameters table base */
ushort fbt_base; /* Free buffer pool parameters table base */
ushort intt_base; /* Interrupt queue parameters table base */
ushort reserved1; /* Reserved; should be cleared during init */
ushort uni_statt_base; /* UNI statistics table base */
uword bd_base_ext; /* BD table base address extension */
uword vpt_base; /* VP table/external CAM base address */
uword vct_base; /* VC table base address */
uword vpt1_base; /* VP1/EXT CAM1 base address */
uword vct1_base; /* VC1 base address */
ushort vp_mask; /* VP mask for address compression lookup */
ushort vci_filter; /* VCI filtering enable bits */
ushort gmode; /* Global mode */
ushort comm_info[3]; /* Information field for last host command */
uword reserved2; /* Reserved; clear during init */
uword crc32_pres; /* Preset for CRC32 */
uword crc32_mask; /* Constant mask for CRC32 */
ushort aal1_snpt_base; /* AAL1 SN protection lookup table base */
ushort reserved3; /* Reserved; clear during init */
uword srts_base; /* External SRTS logic base */
ushort idle_base; /* Idle/unassign cell base */
ushort idle_size; /* Idle/unassign cell size */
uword epayload; /* Reserved payload; init to 0x6A6A6A6A */
uword trm; /* Upper bound on time between F-RM cells */
ushort nrm; /* Controls max cells source may transmit */
ushort mrm; /* Controls BW between F-RM, B-RM cells */
ushort tcr; /* Tag cell rate */
ushort abr_rx_tcte; /* Pointer to 16B reserved DPRAM area */
uword rxqd_base_ext; /* Points to base address of ext RxQD table */
uword rx_udc_base; /* Points to base of RxUDC header table */
uword tx_udc_base; /* Points to base of TxUDC header table */
uchar reserved4[16]; /* Reserved; clear at init */
uword tcell_tmp_ext; /* Tx cell temp base */
uchar reserved5[12]; /* Reserved; clear at init */
ushort pad_tmp_base; /* PAD template base */
uchar reserved6[28]; /* Reserved; clear at init */
}_PackedType t_AAL2_Pram;
/*---------------------------------------------------------------------------*/
/* SERIAL MANAGEMENT CHANNEL (SMC) */
/*---------------------------------------------------------------------------*/
typedef _Packed struct
{
ushort rbase; /* Rx BD Base Address */
ushort tbase; /* Tx BD Base Address */
uchar rfcr; /* Rx function code */
uchar tfcr; /* Tx function code */
ushort mrblr; /* Rx buffer length */
uword rstate; /* Rx internal state */
uword rptr; /* Rx internal data pointer */
ushort rbptr; /* rb BD Pointer */
ushort rcount; /* Rx internal byte count */
uword rtemp; /* Rx temp */
uword tstate; /* Tx internal state */
uword tptr; /* Tx internal data pointer */
ushort tbptr; /* Tx BD pointer */
ushort tcount; /* Tx byte count */
uword ttemp; /* Tx temp */
/* SMC VUART-specific PRAM */
ushort max_idl; /* Maximum IDLE Characters */
ushort idlc; /* Temporary IDLE Counter */
ushort brkln; /* Last Rx Break Length */
ushort brkec; /* Rx Break Condition Counter */
ushort brkcr; /* Break Count Register (Tx) */
ushort r_mask; /* Temporary bit mask */
uword reserved; /* SDMA temp */
} _PackedType t_Smc_Pram;
/*---------------------------------------------------------------------------*/
/* IDMA PARAMETER RAM */
/*---------------------------------------------------------------------------*/
typedef _Packed struct
{
ushort ibase; /* IDMA BD Base Address */
ushort dcm; /* DMA channel mode register */
ushort ibdptr; /* next bd ptr */
ushort DPR_buf; /* ptr to internal 64 byte buffer */
ushort BUF_inv; /* The quantity of data in DPR_buf */
ushort SS_max; /* Steady State Max. transfer size */
ushort DPR_in_ptr; /* write ptr for the internal buffer */
ushort sts; /* Source Transfer Size */
ushort DPR_out_ptr; /* read ptr for the internal buffer */
ushort seob; /* Source end of burst */
ushort deob; /* Destination end of burst */
ushort dts; /* Destination Transfer Size */
ushort RetAdd; /* return address when ERM==1 */
ushort Reserved; /* reserved */
uword BD_cnt; /* Internal byte count */
uword S_ptr; /* source internal data ptr */
uword D_ptr; /* destination internal data ptr */
uword istate; /* Internal state */
} _PackedType t_Idma_Pram;
/*-------------------------------------------------------------------*/
/* INTER-INTEGRATED CIRCUIT (I2C) */
/*-------------------------------------------------------------------*/
typedef _Packed struct
{
ushort rbase; /* RX BD base address */
ushort tbase; /* TX BD base address */
uchar rfcr; /* Rx function code */
uchar tfcr; /* Tx function code */
ushort mrblr; /* Rx buffer length */
uword rstate; /* Rx internal state */
uword rptr; /* Rx internal data pointer */
ushort rbptr; /* rb BD Pointer */
ushort rcount; /* Rx internal byte count */
uword rtemp; /* Rx temp */
uword tstate; /* Tx internal state */
uword tptr; /* Tx internal data pointer */
ushort tbptr; /* Tx BD pointer */
ushort tcount; /* Tx byte count */
uword ttemp; /* Tx temp */
uword sdmatmp; /* SDMA temp */
} _PackedType t_I2c_Pram;
/*---------------------------------------------------------------------------*/
/* SERIAL PERIPHERAL INTERFACE (SPI) */
/*---------------------------------------------------------------------------*/
typedef _Packed struct
{
ushort rbase; /* Rx BD Base Address */
ushort tbase; /* Tx BD Base Address */
uchar rfcr; /* Rx function code */
uchar tfcr; /* Tx function code */
ushort mrblr; /* Rx buffer length */
uword rstate; /* Rx internal state */
uword rptr; /* Rx internal data pointer */
ushort rbptr; /* Rx BD Pointer */
ushort rcount; /* Rx internal byte count */
uword rtemp; /* Rx temp */
uword tstate; /* Tx internal state */
uword tptr; /* Tx internal data pointer */
ushort tbptr; /* Tx BD pointer */
ushort tcount; /* Tx byte count */
uword ttemp; /* Tx temp */
uword reserved; /* SDMA temp */
} _PackedType t_Spi_Pram;
/*---------------------------------------------------------------------------*/
/* RISC TIMER PARAMETER RAM */
/*---------------------------------------------------------------------------*/
typedef _Packed struct
{
ushort tm_base; /* RISC timer table base adr */
ushort tm_ptr; /* RISC timer table pointer */
ushort r_tmr; /* RISC timer mode register */
ushort r_tmv; /* RISC timer valid register */
uword tm_cmd; /* RISC timer cmd register */
uword tm_cnt; /* RISC timer internal cnt */
} _PackedType t_timer_pram;
/*--------------------------------------------------------------------------*/
/* ROM MICROCODE PARAMETER RAM AREA */
/*--------------------------------------------------------------------------*/
typedef _Packed struct
{
ushort rev_num; /* VUcode Revision Number */
ushort d_ptr; /* MISC Dump area pointer */
} _PackedType t_ucode_pram;
/*--------------------------------------------------------------------------*/
/* MAIN DEFINITION OF MPC8272 INTERNAL MEMORY MAP */
/*--------------------------------------------------------------------------*/
typedef _Packed struct
{
/* cpm_ram */
t_Qch_Pram qmc_pram[128]; /* QMC logical channels parameter ram */
uchar reserved0[0x6000]; /* Reserved area */
/* DPR_BASE+0x8000*/
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