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📄 mpc8272.h

📁 mpc2872系列的usb controller产生sof源码
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    uword  stat_buf;       		/* Internal use buffer. 		*/
    uword  cam_ptr;        		/* CAM address. 				*/
    uword  c_mask;         		/* CRC constant mask			*/
    uword  c_pres;         		/* CRC preset 					*/
    uword  crcec;          		/* CRC error counter 			*/
    uword  alec;           		/* alignment error counter 		*/
    uword  disfc;          		/* discarded frame counter 		*/
    ushort ret_lim;        		/* Retry limit threshold. 		*/
    ushort ret_cnt;        		/* Retry limit counter. 		*/
    ushort p_per;          		/* persistence 					*/
    ushort boff_cnt;       		/* back-off counter 			*/
    uword  gaddr_h;        		/* group address filter, high 	*/
    uword  gaddr_l;        		/* group address filter, low 	*/
    ushort tfcstat;        		/* out of sequece Tx BD staus. 	*/
    ushort tfclen;         		/* out of sequece Tx BD length. */
    uword  tfcptr;         		/* out of sequece Tx BD data pointer. */
    ushort mflr;           		/* maximum frame length reg 	*/
    ushort paddr1_h;       		/* physical address (MSB) 		*/
    ushort paddr1_m;       		/* physical address 			*/
    ushort paddr1_l;       		/* physical address (LSB) 		*/
    ushort ibd_cnt;        		/* internal BD counter. 		*/
    ushort ibd_start;      		/* internal BD start pointer. 	*/
    ushort ibd_end;        		/* internal BD end pointer. 	*/
    ushort tx_len;         		/* tx frame length counter 		*/
    uchar  ibd_base[0x20]; 		/* internal micro code usage. 	*/
    uword  iaddr_h;        		/* individual address filter, high 	*/
    uword  iaddr_l;        		/* individual address filter, low 	*/
    ushort minflr;         		/* minimum frame length reg 	*/
    ushort taddr_h;        		/* temp address (MSB) 			*/
    ushort taddr_m;        		/* temp address 				*/
    ushort taddr_l;        		/* temp address (LSB) 			*/
    ushort pad_ptr;        		/* pad_ptr. 					*/
    ushort cf_type;        		/* RESERVED (flow control frame type coding) */
    ushort cf_range;       		/* flow control frame range. 	*/
    ushort max_b;          		/* max buffer descriptor byte count. */
    ushort maxd1;          		/* max DMA1 length register. 	*/
    ushort maxd2;          		/* max DMA2 length register. 	*/
    ushort maxd;           		/* Rx max DMA. 					*/
    ushort dma_cnt;        		/* Rx DMA counter. 				*/
    
    /* counter: */
    uword  octc;           		/* received octets counter. 	*/
    uword  colc;           		/* estimated number of collisions */
    uword  broc;           		/* received good packets of broadcast address 	*/
    uword  mulc;           		/* received good packets of multicast address 	*/
    uword  uspc;           		/* received packets shorter then 64 octets. 	*/
    uword  frgc;           		/* as uspc + bad packets 		*/
    uword  ospc;           		/* received packets longer then 1518 octets. 	*/
    uword  jbrc;           		/* as ospc + bad packets  		*/
    uword  p64c;           		/* received packets of 64 octets*/
    uword  p65c;           		/* received packets of 65-128 octets. 	*/
    uword  p128c;          		/* received packets of 128-255 octets. 	*/
    uword  p256c;          		/* received packets of 256-511 octets. 	*/
    uword  p512c;          		/* received packets of 512-1023 octets. */
    uword  p1024c;         		/* received packets of 1024-1518 octets.*/
    uword  cam_buf;        		/* cam respond internal buffer. */
    uword  reserved0;	   		/* reserved, should be cleared  */
} _PackedType t_EnetFcc_Pram;


/*-----------------*/
/* FCC Common PRAM */
/*-----------------*/

typedef _Packed struct 
{
    ushort riptr;          		/* Rx internal temporary data pointer. */
    ushort tiptr;          		/* Tx internal temporary data pointer. */
    ushort reserved0;      		/* Reserved 					*/
    ushort mrblr;          		/* Rx buffer length 			*/
    uword  rstate;         		/* Rx internal state 			*/
    uword  rbase;          		/* RX BD base address 			*/
    ushort rbdstat;        		/* Rx BD status and control 	*/
    ushort rbdlen;         		/* Rx BD data length 			*/
    uword  rdptr;          		/* rx BD data pointer 			*/
    uword  tstate;         		/* Tx internal state 			*/
    uword  tbase;          		/* TX BD base address 			*/
    ushort tbdstat;        		/* Tx BD status and control 	*/
    ushort tbdlen;         		/* Tx BD data length 			*/
    uword  tdptr;          		/* Tx  data pointer 			*/
    uword  rbptr;          		/* rx BD pointer 				*/
    uword  tbptr;          		/* Tx BD pointer 				*/
    uword  rcrc;           		/* Temp receive CRC 			*/
    uword  reserved_1[0x1];
    uword  tcrc;           		/* Temp transmit CRC 			*/
    union                   	/* Protocol-Specific parameter ram */
    {
        t_HdlcFcc_Pram    h;
        t_EnetFcc_Pram    e;
    } SpecificProtocol;      
} _PackedType t_Fcc_Pram;



/*---------------------------------------------------------------------------*/
/*                  UNIVERSAL SERIAL BUS (USB)					             */
/*---------------------------------------------------------------------------*/


/*------------------------*/
/* USB Host/Function PRAM */
/*------------------------*/

typedef _Packed struct
{
    ushort  ep1ptr;         	/* Endpoint 1 pointer register 	*/ 
    ushort  ep2ptr;         	/* Endpoint 2 pointer register 	*/
    ushort  ep3ptr;         	/* Endpoint 3 pointer register 	*/
    ushort  ep4ptr;         	/* Endpoint 4 pointer register 	*/
    uword   rstate;         	/* Rx internal state           	*/
    uword   rptr;           	/* Rx internal data pointer    	*/
    ushort  frame_n;        	/* Frame number                	*/
    ushort  rbcnt;          	/* Rx internal byte count      	*/
    uword   rtemp;          	/* Rx temp 					  	*/
    uword   rxusb_data;     	/* Rx data temp 			   	*/
    ushort  rxuptr;				/* Rx ucode return address temp	*/            
    
} _PackedType t_USB_Pram;


/*------------------*/
/* Endpoint PRAM	*/
/*------------------*/

typedef _Packed struct
{
    ushort rbase;          		/* Rx base address          	*/
    ushort tbase;          		/* Tx base address          	*/
    uchar  rfcr;           		/* Rx function code         	*/
    uchar  tfcr;           		/* Tx function code         	*/
    ushort mrblr;		   		/* Max. Rx buffer length    	*/
    ushort rbptr;		   		/* RxBD pointer			   		*/
    ushort tbptr;		   		/* TxBD pointer 		       	*/
    uword  tstate;		   		/* Tx internal state        	*/
    uword  tptr; 		   		/* Tx internal data pointer 	*/
    ushort tcrc;		   		/* Tx temp CRC 		       		*/
    ushort tbcnt;		   		/* Tx internal byte count   	*/
    uword  ttemp;		   		/* Tx temp				   		*/
    ushort txusbu_ptr;	   		/* Tx ucode return add temp 	*/
    ushort himmr;		   		/* IMMR val (transaction-   	*/
    					   		/* level interface only)	   	*/
} _PackedType t_endpt_Pram;


/*----------------------------------------------------------------------*/
/* 					QUICC MULTICHANNEL CONTROLLER (QMC)					*/
/*----------------------------------------------------------------------*/

/******************************************************************************
* Note that each QMC uses multiple logical channels.  We first define the     *
* PRAM for a logical channel (which can be used in either HDLC or Transparent *
* mode;  wherever there are differences, it is specified), followed by the    *
* PRAM for an QMC itself.                                                     *
******************************************************************************/

/*---------------------*/
/* QMC Logical Channel */
/*---------------------*/

typedef _Packed struct
{
	ushort tbase;		    	/* TxBD base address 		     */
	ushort chamr;		    	/* Channel mode register		 */
	uword  tstate;				/* Tx internal state			 */
	uword  reserved0;			/* Reserved area				 */
	ushort tbptr;				/* TxBD pointer					 */
	ushort reserved1;			/* Reserved						 */
	uword  tupack;				/* Tx temp for unpacking		 */
	uword  zistate;				/* Zero-insertion state			 */
	uword  tcrc;				/* HDLC:  Temp Tx CRC			 */
								/* TRANS:  Reserved				 */
	ushort intmsk;				/* Channel's interrupt mask flag */
	ushort bdflags;				/* Temp							 */
	ushort rbase;				/* RxBD offset					 */
	ushort mflr;				/* HDLC:  Max frame length register*/
								/* TRANS:  Max Rx buffer length	 */
	uword  rstate;				/* Rx internal state  			 */
	uword  reserved2;			/* Reserved						 */
	ushort rbptr;				/* RxBD pointer					 */
	ushort reserved3;			/* Reserved						 */
	uword  rpack;				/* Rx temp for packing			 */
	uword  zdstate;				/* Zero deletion machine state	 */
	uword  rcrc;				/* HDLC:  Temp Rx CRC			 */
								/* TRANS:  Reserved				 */
	ushort max_cnt;				/* HDLC:  Max length counter	 */
								/* TRANS:  Transparent SYNC		 */
	ushort tmp_mp;				/* HDLC:  Temp					 */
								/* TRANS:  Resevered			 */
} _PackedType t_Qch_Pram;

/*-------------------*/
/* Global PRAM       */
/*-------------------*/
typedef _Packed struct
{
    uword  mcbase;         		/* A pointer to starting address of BD rings. 	*/
    ushort qmcstate;       		/* Controller state. 				*/
    ushort mrblr;          		/* Maximum receive buffer length. 	*/
    ushort tx_s_ptr;       		/* Tx time slot assignment table pointer 		*/
    ushort rxptr;          		/* Rx pointer 						*/
    ushort grfthr;         		/* Global Rx frame threshold 		*/                            
    ushort grfcnt;         		/* Global Rx frame count 			*/
    uword  intbase;        		/* Multichannel interrupt base pointer 			*/
    uword  intptr;         		/* Multichannel interrupt next pointer 			*/
    ushort rx_s_ptr;       		/* Rx time slot assignment table pointer 		*/ 
    ushort txptr;          		/* Points to current transmitter time slot 		*/
    uword  c_mask32;       		/* CRC constant 					*/
    ushort tsatrx[0x20];   		/* Time slot assignment table Rx 	*/
    ushort tsattx[0x20];   		/* Time slot assignment table Tx 	*/
    ushort c_mask16;       		/* CRC constant. 					*/
    uword  temp_rba;       		/* Temp Rx buffer address 			*/                            
    uword  temp_crc;       		/* Temp CRC 						*/
    ushort rx_frm_base;    		/* Temp location for Rx framer parameters 		*/
    ushort tx_frm_base;    		/* Temp location for Tx framer parameters 		*/
    
} _PackedType t_qmc_glob_Pram;

/*---------------------------------------------------------------------------*/
/*                              ATM PARAMETER RAM                            */
/*---------------------------------------------------------------------------*/


/*--------------------------------------*/
/* Address Compression parameters table */
/*--------------------------------------*/

_Packed struct AddressCompressionPram 
{
    uword  VptBase;        		/* VP-level addressing table base address 	*/
    uword  VctBase;        		/* VC-level addressing table base address 	*/
    uword  Vpt1Base;       		/* VP1-level addressing table base address 	*/ 
    uword  Vct1Base;       		/* VC1-level addressing table base address 	*/
    ushort VpMask;         		/* VP mask for address compression look-up 	*/
} _PackedType;


/*-------------------------------*/
/* External CAM parameters table */
/*-------------------------------*/

_Packed struct ExtCamPram 
{
    uword  ExtCamBase;     		/* Base address of the external CAM 		*/
    uchar  reserved00[4];  		/* Reserved 								*/
    uword  ExtCam1Base;    		/* Base address of the external CAM1 		*/
    uchar  reserved01[6];  		/* Reserved 								*/
} _PackedType;


/*---------------------------*/
/* ATM mode parameters table */
/*---------------------------*/

typedef _Packed struct AtmPram 
{
    uchar  reserved0[64];  		/* Reserved 								*/
    ushort RxCellTmpBase;  		/* Rx cell temporary base address 			*/
    ushort TxCellTmpBase;  		/* Tx cell temporary base address 			*/
    ushort VUdcTmpBase;    		/* VUDC temp base address (in VUDC mode only) */
    ushort IntRctBase;     		/* Internal RTC base address 				*/
    ushort IntTctBase;     		/* Internal TCT base address 				*/
    ushort IntTcteBase;    		/* Internal ACT base address 				*/
    uchar  reserved1[4];   		/* reserved four bytes 						*/
    uword  ExtRctBase;     		/* Extrnal RTC base address 				*/

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