board.c

嵌入式系统mcf5272华恒光盘开发板附源代码

#include "arch.h"
#include "mcfuart.h"

char	ident[] = "Motorola 5282 C3";
char	copyright[] = "(C) 1999, Moreton Bay Ventures, Rob Scott, Roland Seuhs";

extern unsigned long consoleBase;

void configureConsole()
{
	consoleBase = MCFUART_BASE1;
	configureSerial(consoleBase, 19200, MCF_CLK);
}

void configureAuxSerial()
{
	configureSerial(MCFUART_BASE2, 115200, MCF_CLK);
}

void setLED(int state)
{
	unsigned char bits;
	return;
	switch(state) {
		case 0:
			bits = 0x00;
			break;
		case 1:
			bits = 0x06;
			break;
		case 2:
			bits = 0x5b;
			break;
		case 3:
			bits = 0x4f;
			break;
		case 4:
			bits = 0x66;
			break;
		case 5:
			bits = 0x6d;
			break;
		case 6:
			bits = 0x7d;
			break;
		case 7:
			bits = 0x07;
			break;
		case 8:
			bits = 0x7f;
			break;
		case 10:
			bits = 0x77;
			break;
		case 11:
			bits = 0x7C;
			break;
		case 12:
			bits = 0x39;
			break;
		case 13:
			bits = 0x5e;
			break;
		case 14:
			bits = 0x79;
			break;
		case 15:
			bits = 0x71;
			break;
		default:
			return;
	}
//	*((volatile unsigned short *) 0x40000000) = (unsigned short) (bits << 8);
}

extern unsigned int downloadPort;
extern unsigned int image_size;
extern unsigned char *xfer_addr;
extern unsigned char *down_addr;
extern unsigned char *dest_addr;
extern unsigned char *source_addr;

void setImageParams()
{
	downloadPort = 1;
	image_size  = *(volatile unsigned long *)(0xffe20004);//0x80000;
	xfer_addr   = (unsigned char *)0x20000;
	down_addr   = (unsigned char *)0xffe20000;	//0xfff40000
	dest_addr   = (unsigned char *)0xf1000000;
	source_addr = (unsigned char *)0xffe20000;	//0xfff40000
}

void setupBoard_back()
{
	volatile unsigned char	*mbar;
	mbar = (volatile unsigned char *) MCF_MBAR;

	*((volatile unsigned char *)(mbar+MCF5282_EPORT_EPIER))= MCF5282_EPORT_EPIER_EPIE7;
	*((volatile unsigned char *)(mbar+MCF5282_INTC0_ICR7)) = MCF5282_INTC_ICR_IL(7);
	*((volatile unsigned long *)(mbar+MCF5282_INTC0_IMRL )) &= 	~(MCF5282_INTC_INTFRCL_INT7 
							| MCF5282_INTC_IMRL_MASKALL);
	/* Enable FEC Rx Frame interrupts to ColdFire core */
	*((volatile unsigned char *)(mbar+MCF5282_INTC0_ICR27)) = MCF5282_INTC_ICR_IL(4);
		
		/* Set Timer Interrupt Mask Register */	

	*((volatile unsigned long *)(mbar+MCF5282_INTC0_IMRL ))&=~(
			MCF5282_INTC_IMRL_INT27 | MCF5282_INTC_IMRL_MASKALL);



#if 0
	// stuff that was added for dbug compliance (sim_init)
	mbar_writeShort(MCFSIM_SCR, 0x0003);
	mbar_writeShort(MCFSIM_SPR, 0xFFFF);
	mbar_writeLong(MCFSIM_ICR1, 0x88888888);
	mbar_writeLong(MCFSIM_ICR2, 0x88888888);
	mbar_writeLong(MCFSIM_ICR3, 0x88888888);
	mbar_writeLong(MCFSIM_ICR4, 0x88880000);
	mbar_writeLong(MCFSIM_PITR, 0x00000000);
	mbar_writeByte(MCFSIM_PIVR, 0x00000040);

	mbar_writeLong(MCFSIM_PACNT, 0x00000000);
	// more stuff from dbug (gpio_init)
	mbar_writeShort(MCFSIM_PADDR, 0x0000);
	mbar_writeLong(MCFSIM_PBCNT, 0x55554155);	// PBCNT allows the console to work
	mbar_writeShort(MCFSIM_PBDDR, 0x0000);
	mbar_writeLong(MCFSIM_PDCNT, 0x00000000);
#endif

	
}

void setupDRAM()
{
	volatile unsigned char *mbar = (unsigned char *)MCF_MBAR;

	/*
	
	DCTR definition:

     <15>: DAEM, 1 = Drive Multiplexed Address During External Master DRAM xfer
     <14>: EDO,  1 = EDO, 0 = Normal
     <12>: RCD,  1 = 2 clk RAS-to-CAS, 0 = 1.0 clk RAS-to-CAS
  <10:09>: RSH,  10 = 3.5 clk RAS low, 01 = 2.5 clk, 00 = 1.5 clk
  <06:05>: RP,   10 = 3.5 clk RAS Precharge, 01 = 2.5 clk, 00 = 1.5 clk
     <03>: CAS,  1 = 2.5 clk CAS assertion, 0 = 1.5 clk
     <01>: CP,   1 = 1.5 CAS clk precharge, 0 = .5 clk
     <00>: CSR,  1 = 2.0 clk CAS before RAS setup, 0 = 1.0 clk

	*/

	*((volatile unsigned short *) (mbar + MCFSIM_DCR)) = 0x0034;
//?????	*((volatile unsigned short *) (mbar + MCFSIM_DCTR)) = 0x144B;
	*((volatile unsigned long *) (mbar + MCFSIM_DACR0)) = 0x00000007;
	*((volatile unsigned long *) (mbar + MCFSIM_DMR0)) = 0x003e0000;
//	*((volatile unsigned char *) (mbar + MCFSIM_DCCR0)) = 0x07;
}