dma.h

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/*
 *	ApOS (Another Project software for s3c2410)
 *	
 *	This program is free software; you can redistribute it and/or modify
 *	it under the terms of the GNU General Public License version 2 as
 *	published by the Free Software Foundation.
 *			
 *						Copyright caiyuqing
 *
 */
#ifndef _DMA_H
#define _DMA_H
#include "cpu.h"

/*
 *	dma chanel structure,we can visit all the registers of the 
 *	chanel in dma block througth this structure
 *	dma 通道结构体，通过该结构体可以访问到每个dma通道
 *	中的所有寄存器
 */
struct dma_chanel
{
	
	/*
	 *	DMA INITIAL SOURCE (DISRC) REGISTER
	 *	
	 *	该寄存器包含了 DMA数据源首地址
	 */
	volatile unsigned int *disrc;
	/*
	 *	DMA INITIAL SOURCE CONTROL (DISRCC) REGISTER
	 *
	 *	数据源控制寄存器含有两个控制位，分别是LOC和INC
	 *
	 *	LOC: 选择数据源位置(system bus/peripheral bus)
	 *
	 *		0: the source is in the system bus (AHB).
	 *		1: the source is in the peripheral bus (APB).
	 *
	 *	INC: 选择地址的增长模式
	 *		0:Increment
	 *		1:Fixed
	 */	
	volatile unsigned int *disrcc;
	/*
	 *	DMA INITIAL DESTINATION (DIDST) REGISTER
	 *
	 *	该寄存器包含了DMA传送目的地首地址
	 */
	volatile unsigned int *didst;
	/*
	 *	DMA INITIAL DESTINATION CONTROL (DIDSTC) REGISTER
	 *	数据目的地控制寄存器，含有两个控制位 LOC和INC(同DISRCCs)
	 */
	volatile unsigned int *didstc;
	/*
	 *	DMA CONTROL (DCON) REGISTER(详细请查看s3c2410用户手册)
	 *	DMA控制寄存器
	 */
	volatile unsigned int *dcon;
	/*
	 *	DMA STATUS (DSTAT) REGISTER
	 *
	 *	DMA状态寄存器.包含两个部分 STAT和CURR_TC
	 *	STAT:当前状态
	 *	CURR_TC:当前传送计数器
	 */
	volatile unsigned int *dstat;
	/*
	 *	DMA CURRENT SOURCE (DCSRC) REGISTER
	 *	当前传送的数据源地址寄存器.
	 */
	volatile unsigned int *dcsrc;
	/*
	 *	CURRENT DESTINATION (DCDST) REGISTER
	 *	当前传送的数据目的地址寄存器.
	 */
	volatile unsigned int *dcdst;
	//DMA MASK TRIGGER (DMASKTRIG) REGISTER(详细请查看s3c2410用户手册)
	volatile unsigned int *dmasktrig;
	
	//DCON寄存器中的DSZ与TSZ来确定tc_opt，而tc_opt则确定DCON寄存器中TC部分
	unsigned int tc_opt;
};

/*
 *	dma blocks structure,including 4 chanel structures. we can 
 *	control each chanel of the dma block throught this struct.
 *	s3c2410 dma模块结构体，包含4个通道。通过该结构体可以控制dma模块中
 *	的每个通道
 */
struct dma_ctrl_object
{
	struct dma_chanel chanel0;
	struct dma_chanel chanel1;
	struct dma_chanel chanel2;
	struct dma_chanel chanel3;
};


/*
 *	the offset about DISRCC and DIDSTC 's control bit
 *
 *	关于DISRCC和DIDSTC的控制位位移
 */
#define LOC_OFFSET	1
#define INC_OFFSET	0
#define AHB		0
#define APB		1
#define INCREMENT	0
#define FIXED		1

/*
 *	the offset about DCON's control bit
 *	关于DCON的控制位位移
 */
#define DMD_HS_OFFSET	31
#define SYNC_OFFSET	30
#define INT_OFFSET	29
#define TSZ_OFFSET	28
#define SERVMODE_OFFSET 27
#define HWSRCSEL_OFFSET	24
#define SWHW_SEL_OFFSET	23
#define RELOAD_OFFSET	22
#define DSZ_OFFSET	20
#define TC_OFFSET	0

#define DEMAND 		0
#define HANDSHAKE	1

#define SYNC_PCLK	0
#define SYNC_HCLK	1

#define INT_OFF		0
#define INT_ON		1

#define UNIT_MODE	0
#define BURST_MODE	1

#define SINGLE		0
#define WHOLE		1

/*
 *	dma trigger mode select
 *	
 *	dma触发源模式选择，每个通道有四种模式可以选择
 *
 *		REQ_SRC_MODE0	REQ_SRC_MODE1	REQ_SRC_MODE2	REQ_SRC_MODE3	REQ_SRC_MODE4
 *	DCON0: 	000:nXDREQ0   	001:UART0    	010:SDI       	011:Timer    	100:USB device EP1
 *	DCON1: 	000:nXDREQ1   	001:UART1    	010:I2SSDI   	011:SPI      	100:USB device EP2
 *	DCON2: 	000:I2SSDO    	001:I2SSDI   	010:SDI      	011:Timer    	100:USB device EP3
 *	DCON3: 	000:UART2     	001:SDI      	010:SPI       	011:Timer    	100:USB device EP4
 */
#define REQ_SRC_MODE0	0x0
#define REQ_SRC_MODE1	0x1
#define REQ_SRC_MODE2	0x2
#define REQ_SRC_MODE3	0x3
#define REQ_SRC_MODE4	0x4

#define SW		0
#define HW		1

#define RELAOD_ON	0
#define RELAOD_OFF	1

#define BYTE		0
#define HWORD		1
#define WORD		2

/*
 *	the offset about DSTAT's control bit
 *	关于DSTAT的控制位位移
 */
#define STAT_OFFSET	20
#define CURR_TC_OFFSET	0

/*
 *	the offset about DMASKTRIG's control bit
 *	关于DMASKTRIG的控制位位移
 */
#define STOP_OFFSET	2
#define ON_OFF_OFFSET	1
#define SW_TRIG_OFFSET	0

#define DMA_CHANEL_0	0
#define DMA_CHANEL_1	1
#define DMA_CHANEL_2	2
#define DMA_CHANEL_3	3

#endif