uart.c

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/*
 *	ApOS (Another Project software for s3c2410)
 *	
 *	This program is free software; you can redistribute it and/or modify
 *	it under the terms of the GNU General Public License version 2 as
 *	published by the Free Software Foundation.
 *			
 *						Copyright caiyuqing
 *
 */
#include "../include/s3c2410/serial.h"
#include "../include/s3c2410/s3c2410.h"
#include "../include/s3c2410/cpu.h"
#include "../include/s3c2410/lcd.h"
#include "../include/kernel/irq.h"
void uart0_interrupt_routine(struct cpu_registers *regs);
extern irq_ptr irq_rotunie[32];
extern PCLK;


char uart_char;
int uart0_config()
{
	/*
	 *	Word Length 		:8-bits
	 *	Number of Stop Bit	:1-bit
	 *	No parity
	 *	Normal mode operation(another mode is  Infra-Red Tx/Rx mode)
	 */
	rULCON0=0x03;
	/*
	 *	R/T mode 			:interrupt
	 *	Rx Error Status Interrupt	:Disbale
	 *	Rx Time Out 			:Disbale
	 *	Rx Interrupt Type		:Pulse
	 *	Tx Interrupt Type		:Pulse
	 *	Clock Selection			:PCLK:UBRDIVn=(int)(PCLK / (bps x 16) )-1
	 */
	rUCON0=0x5;
	/*
	 *	Clock Selection		:PCLK
	 *	FIFO 			:Disbale
	 *	Rx FIFO Reset		:Auto-cleared after resetting FIFO
	 *	Tx FIFO Reset		:Auto-cleared after resetting FIFO
	 *	Rx FIFO Trigger Level	:no function because FIFO is disbale
	 *	Tx FIFO Trigger Level	:no function because FIFO is disbale
	 */
	rUFCON0=0x00;
	/*
		Auto Flow Control (AFC)	:Disbale
		Inactivate nRTS
	*/
	rUMCON0=0x00;
	/*
	 *	rUBRDIVn=(int)(PCLK/(bps*16))-1
	 *	FCLK=202.8MHz so PCLK=50.7MHz(FCLK:HCLK:PCLK =1:2:4)
	 *	bps=115200
	 *	rUBRDIVn=(int)(50700000/(115200*16))-1=27-1=26=0x1a
	 */
	rUBRDIV0=(int)(50700000/(115200*16))-1;
	return 1;
}

void uart0_interrupt_enabele()
{
	//设置UART0中断服务例程
	irq_rotunie[INT_UART0]=&uart0_interrupt_routine;
	
	rINTMSK &=INT_UART0_ENABLE;	//Enable the UART0 interrupt
	rINTSUBMSK &=(INT_RXD0_ENABLE|INT_TXD0_ENABLE);
}

void uart0_interrupt_disabele()
{
	rINTMSK |=INT_UART0_DISABLE;	//Disable the UART0 interrupt
	rINTSUBMSK |=(INT_RXD0_DISABLE|INT_TXD0_DISABLE);
}

//UART0中断服务例程
void uart0_interrupt_routine(struct cpu_registers *regs)
{
	uart0_interrupt_disabele();
	if(rSUBSRCPND & 1)	//read data
	{
		printk("uart0 receive ");
	}
	else if(rSUBSRCPND & 2)
	{
		printk("uart0 send ");
	}
	rSUBSRCPND&=~((1<<0)|(1<<1));
	rSRCPND=(1<<28);
	rINTPND=(1<<28);
	uart0_interrupt_enabele();
}

void uart0_send_byte(char data)
{
	if(data=='\n')
        {
		while(!(rUTRSTAT0 & TXDREADY));
		delay(10);
		rUTXH0='\r';
        }
        while(!(rUTRSTAT0 & TXDREADY));   //Wait until THR is empty.
        delay(10);
	rUTXH0=data;
}               

void uart0_send_string(char *pt)
{
    while(*pt)
        uart0_send_byte(*pt++);
}