csl_legacyhal.h

SEED的VPM642测试程序-板级支持库

    HCRFIELD_GET(CrReg,HCHIP_IRP_IRP)

  #define HCHIP_IRP_IRP_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_IRP_IRP,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_IRP
\*----------------------------------------------------------------------------*/
  #define HCHIP_IRP_GET(CrReg) HCRREG32_GET(CrReg)

  #define HCHIP_IRP_SET(CrReg,Val) HCRREG32_SET(CrReg,Val)

  #define HCHIP_IRP_CFG(CrReg,irp) CrReg=(UINT32)( \
    HCRFIELD_SHIFT(HCHIP_IRP_IRP,irp) \
  )

/******************************************************************************\
* HCHIP_NRP - nonmaskable interrupt return pointer
*
* Fields: 
*   (RW) HCHIP_NRP_NRP
*
\******************************************************************************/
  extern far cregister volatile unsigned int NRP;
  #define HCHIP_NRP NRP

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_NRP_NRP
\*----------------------------------------------------------------------------*/
  #define HCHIP_NRP_NRP_MASK                     (0xFFFFFFFF)
  #define HCHIP_NRP_NRP_SHIFT                    (0x00000000)

  #define HCHIP_NRP_NRP_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_NRP_NRP)

  #define HCHIP_NRP_NRP_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_NRP_NRP,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_NRP
\*----------------------------------------------------------------------------*/
  #define HCHIP_NRP_GET(CrReg) HCRREG32_GET(CrReg)

  #define HCHIP_NRP_SET(CrReg,Val) HCRREG32_SET(CrReg,Val)

  #define HCHIP_NRP_CFG(CrReg,nrp) CrReg=(UINT32)( \
    HCRFIELD_SHIFT(HCHIP_NRP_NRP,nrp) \
  )

/******************************************************************************\
* HCHIP_AMR - addressing mode register
*
* Fields: 
*   (RW) HCHIP_AMR_A4MODE
*   (RW) HCHIP_AMR_A5MODE
*   (RW) HCHIP_AMR_A6MODE
*   (RW) HCHIP_AMR_A7MODE
*   (RW) HCHIP_AMR_B4MODE
*   (RW) HCHIP_AMR_B5MODE
*   (RW) HCHIP_AMR_B6MODE
*   (RW) HCHIP_AMR_B7MODE
*   (RW) HCHIP_AMR_BK0
*   (RW) HCHIP_AMR_BK1
*
\******************************************************************************/
  extern far cregister volatile unsigned int AMR;
  #define HCHIP_AMR AMR

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_AMR_A4MODE
\*----------------------------------------------------------------------------*/
  #define HCHIP_AMR_A4MODE_MASK                  (0x00000003)
  #define HCHIP_AMR_A4MODE_SHIFT                 (0x00000000)

  #define HCHIP_AMR_A4MODE_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_AMR_A4MODE)

  #define HCHIP_AMR_A4MODE_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_AMR_A4MODE,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_AMR_A5MODE
\*----------------------------------------------------------------------------*/
  #define HCHIP_AMR_A5MODE_MASK                  (0x0000000C)
  #define HCHIP_AMR_A5MODE_SHIFT                 (0x00000002)

  #define HCHIP_AMR_A5MODE_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_AMR_A5MODE)

  #define HCHIP_AMR_A5MODE_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_AMR_A5MODE,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_AMR_A6MODE
\*----------------------------------------------------------------------------*/
  #define HCHIP_AMR_A6MODE_MASK                  (0x00000030)
  #define HCHIP_AMR_A6MODE_SHIFT                 (0x00000004)

  #define HCHIP_AMR_A6MODE_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_AMR_A6MODE)

  #define HCHIP_AMR_A6MODE_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_AMR_A6MODE,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_AMR_A7MODE
\*----------------------------------------------------------------------------*/
  #define HCHIP_AMR_A7MODE_MASK                  (0x000000C0)
  #define HCHIP_AMR_A7MODE_SHIFT                 (0x00000006)

  #define HCHIP_AMR_A7MODE_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_AMR_A7MODE)

  #define HCHIP_AMR_A7MODE_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_AMR_A7MODE,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_AMR_B4MODE
\*----------------------------------------------------------------------------*/
  #define HCHIP_AMR_B4MODE_MASK                  (0x00000300)
  #define HCHIP_AMR_B4MODE_SHIFT                 (0x00000008)

  #define HCHIP_AMR_B4MODE_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_AMR_B4MODE)

  #define HCHIP_AMR_B4MODE_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_AMR_B4MODE,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_AMR_B5MODE
\*----------------------------------------------------------------------------*/
  #define HCHIP_AMR_B5MODE_MASK                  (0x00000C00)
  #define HCHIP_AMR_B5MODE_SHIFT                 (0x0000000A)

  #define HCHIP_AMR_B5MODE_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_AMR_B5MODE)

  #define HCHIP_AMR_B5MODE_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_AMR_B5MODE,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_AMR_B6MODE
\*----------------------------------------------------------------------------*/
  #define HCHIP_AMR_B6MODE_MASK                  (0x00003000)
  #define HCHIP_AMR_B6MODE_SHIFT                 (0x0000000C)

  #define HCHIP_AMR_B6MODE_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_AMR_B6MODE)

  #define HCHIP_AMR_B6MODE_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_AMR_B6MODE,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_AMR_B7MODE
\*----------------------------------------------------------------------------*/
  #define HCHIP_AMR_B7MODE_MASK                  (0x0000C000)
  #define HCHIP_AMR_B7MODE_SHIFT                 (0x0000000E)

  #define HCHIP_AMR_B7MODE_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_AMR_B7MODE)

  #define HCHIP_AMR_B7MODE_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_AMR_B7MODE,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_AMR_BK0
\*----------------------------------------------------------------------------*/
  #define HCHIP_AMR_BK0_MASK                     (0x001F0000)
  #define HCHIP_AMR_BK0_SHIFT                    (0x00000010)

  #define HCHIP_AMR_BK0_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_AMR_BK0)

  #define HCHIP_AMR_BK0_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_AMR_BK0,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_AMR_BK1
\*----------------------------------------------------------------------------*/
  #define HCHIP_AMR_BK1_MASK                     (0x001F0000)
  #define HCHIP_AMR_BK1_SHIFT                    (0x00000010)

  #define HCHIP_AMR_BK1_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_AMR_BK1)

  #define HCHIP_AMR_BK1_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_AMR_BK1,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_AMR
\*----------------------------------------------------------------------------*/
  #define HCHIP_AMR_GET(CrReg) HCRREG32_GET(CrReg)

  #define HCHIP_AMR_SET(CrReg,Val) HCRREG32_SET(CrReg,Val)

  #define HCHIP_AMR_CFG(CrReg,a4mode,a5mode,a6mode,a7mode,b4mode,b5mode,b6mode,\
  b7mode,bk0,bk1) CrReg=(UINT32)( \
    HCRFIELD_SHIFT(HCHIP_AMR_A4MODE,a4mode)| \
    HCRFIELD_SHIFT(HCHIP_AMR_A5MODE,a5mode)| \
    HCRFIELD_SHIFT(HCHIP_AMR_A6MODE,a6mode)| \
    HCRFIELD_SHIFT(HCHIP_AMR_A7MODE,a7mode)| \
    HCRFIELD_SHIFT(HCHIP_AMR_B4MODE,b4mode)| \
    HCRFIELD_SHIFT(HCHIP_AMR_B5MODE,b5mode)| \
    HCRFIELD_SHIFT(HCHIP_AMR_B6MODE,b6mode)| \
    HCRFIELD_SHIFT(HCHIP_AMR_B7MODE,b7mode)| \
    HCRFIELD_SHIFT(HCHIP_AMR_BK0,bk0)| \
    HCRFIELD_SHIFT(HCHIP_AMR_BK1,bk1) \
  )

#if (FPU_SUPPORT)
/******************************************************************************\
* HCHIP_FADCR - floating-point adder config register (1)
*
* (1) only supported on devices with floating point unit
*
* Fields: 
*   (RW) HCHIP_FADCR_L1NAN1
*   (RW) HCHIP_FADCR_L1NAN2
*   (RW) HCHIP_FADCR_L1DEN1
*   (RW) HCHIP_FADCR_L1DEN2
*   (RW) HCHIP_FADCR_L1INVAL
*   (RW) HCHIP_FADCR_L1INFO
*   (RW) HCHIP_FADCR_L1OVER
*   (RW) HCHIP_FADCR_L1INEX
*   (RW) HCHIP_FADCR_L1UNDER
*   (RW) HCHIP_FADCR_L1RMODE
*   (RW) HCHIP_FADCR_L2NAN1
*   (RW) HCHIP_FADCR_L2NAN2
*   (RW) HCHIP_FADCR_L2DEN1
*   (RW) HCHIP_FADCR_L2DEN2
*   (RW) HCHIP_FADCR_L2INVAL
*   (RW) HCHIP_FADCR_L2INFO
*   (RW) HCHIP_FADCR_L2OVER
*   (RW) HCHIP_FADCR_L2INEX
*   (RW) HCHIP_FADCR_L2UNDER
*   (RW) HCHIP_FADCR_L2RMODE
*
\******************************************************************************/
  extern far cregister volatile unsigned int FADCR;
  #define HCHIP_FADCR FADCR

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L1NAN1
\*----------------------------------------------------------------------------*/
  #define HCHIP_FADCR_L1NAN1_MASK               (0x00000001)
  #define HCHIP_FADCR_L1NAN1_SHIFT              (0x00000000)

  #define HCHIP_FADCR_L1NAN1_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_FADCR_L1NAN1)

  #define HCHIP_FADCR_L1NAN1_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_FADCR_L1NAN1,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L1NAN2
\*----------------------------------------------------------------------------*/
  #define HCHIP_FADCR_L1NAN2_MASK               (0x00000002)
  #define HCHIP_FADCR_L1NAN2_SHIFT              (0x00000001)

  #define HCHIP_FADCR_L1NAN2_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_FADCR_L1NAN2)

  #define HCHIP_FADCR_L1NAN2_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_FADCR_L1NAN2,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L1DEN1
\*----------------------------------------------------------------------------*/
  #define HCHIP_FADCR_L1DEN1_MASK               (0x00000004)
  #define HCHIP_FADCR_L1DEN1_SHIFT              (0x00000002)

  #define HCHIP_FADCR_L1DEN1_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_FADCR_L1DEN1)

  #define HCHIP_FADCR_L1DEN1_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_FADCR_L1DEN1,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L1DEN2
\*----------------------------------------------------------------------------*/
  #define HCHIP_FADCR_L1DEN2_MASK               (0x00000008)
  #define HCHIP_FADCR_L1DEN2_SHIFT              (0x00000003)

  #define HCHIP_FADCR_L1DEN2_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_FADCR_L1DEN2)

  #define HCHIP_FADCR_L1DEN2_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_FADCR_L1DEN2,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L1INVAL
\*----------------------------------------------------------------------------*/
  #define HCHIP_FADCR_L1INVAL_MASK              (0x00000010)
  #define HCHIP_FADCR_L1INVAL_SHIFT             (0x00000004)

  #define HCHIP_FADCR_L1INVAL_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_FADCR_L1INVAL)

  #define HCHIP_FADCR_L1INVAL_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_FADCR_L1INVAL,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L1INFO
\*----------------------------------------------------------------------------*/
  #define HCHIP_FADCR_L1INFO_MASK               (0x00000020)
  #define HCHIP_FADCR_L1INFO_SHIFT              (0x00000005)

  #define HCHIP_FADCR_L1INFO_GET(CrReg) \
    HCRFIELD_GET(CrReg,HCHIP_FADCR_L1INFO)

  #define HCHIP_FADCR_L1INFO_SET(CrReg,Val) \
    HCRFIELD_SET(CrReg,HCHIP_FADCR_L1INFO,Val)

/*----------------------------------------------------------------------------*\
* (RW) HCHIP_FADCR_L1OVER
\*----------------------------------------------------------------------------*/
  #define HCHIP_FADCR_L1OVER_MASK               (0x00000040)
  #define HCHIP_FADCR_L1OVER_SHIFT              (0x00000006)