gbl.h62

SEED的VPM642测试程序-板级支持库

;
;  Copyright 2003 by Texas Instruments Incorporated.
;  All rights reserved. Property of Texas Instruments Incorporated.
;  Restricted rights to use, duplicate or disclose this code are
;  granted through contract.
;  
;
; "@(#) DSP/BIOS 4.90.270 12-18-03 (barracuda-o04)"
;
;  ======== gbl.h62 ========
;
;

	.if ($isdefed("GBL_") = 0)    ; prevent multiple includes of this file

GBL_		.set	1

        .global GBL_A_VERSION
GBL_A_VERSION	.set	490h	; Major BIOS version number used 
				; by GBL_F_version and GBL_init.

	.include std.h62
	.include c62.h62
	.include chk.h62
	.include trc.h62

	.global GBL_R_sysdp
	.global GBL_A_SYSDP, GBL_A_SYSPAGE
	.global GBL_stackend, GBL_stackbeg
	.global GBL_CACHE
;
; Changed below .global from .ref since .ref was producing a warning
; for the C55 (which probably shouldn't be happening anyway).
; .global GBL_TRCMASKVALUE doesn't need to be here at all since the
; symbol is .set in the cfg.h62 file.  It's left here for consistency
; with other targets and "not to rock the boat".
;
	.global GBL_TRCMASKVALUE

	.global GBL_initdone
	.global GBL_F_version


;
;# ======== GBL_Obj ========
;  Allocate "size" words in section sect and give it the name "name".
;
;  Both the section and the alignFlag arguments are optional; section
;  defaults to ".bss" and alignFlag defaults to no alignment.
;
;  Objects created in the ".data" section are initialized to 0.
;
;#
;# Preconditions:
;#      none
;#
;# Postconditions:
;#      none
;#
;
        .asg    "", GBL_Obj$regs
GBL_Obj .macro name, size, section, alignFlag, fillValue, alignValue
        CHK_domain "GBL_Obj", alignFlag, "noalign,align", "noalign"
        .if ($symcmp(":CHK_status:", "error") = 0)
            .emsg "GBL_Obj align parameter error."
        .endif
        .asg ":CHK_status:", alignFlag

        CHK_nargs "GBL_Obj", size
        .if ($symcmp(":CHK_status:", "error") = 0)
            .emsg "GBL_Obj size parameter error."
        .endif

        .if ($symlen(section) = 0)
            .asg ".bss", section
        .endif

        .if ($symlen(fillValue) != 0)
	    .sect ".gblinit"
	    .word :size:
	    .word :name:
	    .word :fillValue:
        .endif

        .if (($symcmp(section, ".data") = 0) | ($symcmp(alignFlag, "align") = 0))
            .sect ":section:"
            .if ($symcmp(alignFlag, "align") = 0)
                .align	:alignValue:
            .endif
:name::
	    ;
	    ; Can't use .space directive here because it reserves
	    ; bits for some processors and bytes for others.
	    ;
	    .loop	:size:
		.word 0
	    .endloop

        .elseif ($symcmp(":section:", ".bss") = 0)
            .bss :name:, :size: * (STD_TARGWORDMAUS / STD_TARGCHARMAUS), (STD_TARGWORDMAUS / STD_TARGCHARMAUS)
        .else
:name::     .usect ":section:", :size: * (STD_TARGWORDMAUS / STD_TARGCHARMAUS), (STD_TARGWORDMAUS / STD_TARGCHARMAUS)
        .endif

        .endm

;
;# ======== GBL_config ========
;  Static configuration of the GBL module
;
;#
;# Preconditions:
;#      none
;#
;# Postconditions:
;#      none
;#
	.asg    "", GBL_config$regs
GBL_config .macro _rom, _bigendian, _userinit, _userinitfxn, _enableinst, _cache, _l2configure, _l2mode, _l2priority, _l2marmask, _supportcsl, _trcmaskvalue, _callcslcfginit, _c641xl2priority, _l2marmask1, _l2marmask2, _l2marmask3, _l2marmask4, _l2marmask5, _l2configalloc, _l2alloc
	
	; reference special symbol GBL_boot defined in BIOS boot file to make sure
        ; we are linking correct boot file (workaround for SDSsq24217)
        .ref GBL_boot

	.def TRC_cinit
	.def _TRC_R_mask
	.asg	:_userinitfxn:, USERINITFXN	; used by GBL_init

	;
	; print a warning message if project build options do not match
	; global configuration options.
	;
	.if .BIG_ENDIAN
	    .if (GBL_BIGENDIAN == 0)
		.emsg "Project build options do not match Global configuration settings.  Compiler options specify Big Endian, configuration set for Little Endian."
	    .endif
	.else
	    .if (GBL_BIGENDIAN == 1)
		.emsg "Project build options do not match Global configuration settings.  Compiler options specify Little Endian, configuration set for Big Endian."
	    .endif
	.endif

	; initialize 'gblinit' variable, used in GBL_init
gblinit .sect ".gblinit"

	;
	; fill stack with '0xc0ffee'
	;
	; Don't overwrite the bottom 16 words to avoid trashing
	; valid stack data. (Only one of these words contains
	; valid data, but just to be safe we leave 16 untouched).
	;
	; (stacksize / wordsize) since size is in words
	;
	.word ( (GBL_stackend-GBL_stackbeg+1) / STD_TARGWORDMAUS ) - 16 ; nwords
	.word GBL_stackbeg			; addr
	.word 0xc0ffee				; value

	;
	;  DEFINE A SPECIAL WORD THAT WILL BE COPIED TO TRC_R_mask
	;  AT PROGRAM INITIALIZATION, INSTEAD OF PUTTING TRC_cinit
	;  INTO THE .cinit SECTION.
	;  THIS WAY WE CAN WRITE TO BOTH TRC_R_mask AND TRC_cinit
	;  AND APPLICATION PROGRAMS CAN STILL USE THE .cinit SECTION
	;  AFTER INITIALIZATION IS DONE.
	;
	.sect ".trcdata"

TRC_cinit:
	.align 4
	.word GBL_TRCMASKVALUE		; defined by configuration tool

	; We need to initialize TRC_R_mask, but can't use a .cinit
	; record, so it can't go into .bss as it was before since
	; the initialization below causes the whole .bss section to
	; become initialized and filled.
	;
TRC_R_mask:
	.align 4
	.word GBL_TRCMASKVALUE		; defined by configuration tool

_TRC_R_mask     .set    TRC_R_mask

GBL_initdone
	.sect ".trcdata"
	.word 0

	.endm

;
;# ======== GBL_end ========
;  Invoked at the end of all other configuration
;  declarations.
;
;#
;# Preconditions:
;#	none
;#
;# Postconditions:
;#	none
;#
	.asg    "", GBL_end$regs
GBL_end .macro

	.sect ".gblinit"
	.word 0			; end of gblinit table marker

	.endm

;
;# ======== GBL_init ========
;  Runtime initialization of the GBL module
;
;# Preconditions
;#	none
;#
;# Postconditions
;#	none
;#
;
	.asg    "", GBL_init$regs
GBL_init	.macro

	; call GBL_F_version
	mvkl	GBL_F_version, b3
	mvkh	GBL_F_version, b3
	b b3
	mvkl versret?,b3
	mvkh versret?,b3
	nop 3 
versret?:
	mvkl	GBL_A_VERSION, a1
	mvkh	GBL_A_VERSION, a1
 
        sub a4,a1,a1
        cmpeq a1,0,a1

selfspin? 

 [!a1]	b selfspin? 

	; only call user init function if non-zero
	.if (GBL_USERINIT != 0)
	; USERINITFXN below is defined in GBL_config
	    mvkl :USERINITFXN:, b3
	    mvkh :USERINITFXN:, b3
	    b b3
	    mvkl ginit?, b3
	    mvkh ginit?, b3
	    nop 3
ginit?:
	.endif

	.global HWI_A_VECS

	mvkl HWI_A_VECS,a0
	mvkh HWI_A_VECS,a0
        mvc a0,istp                 ; load interrupt service table pointer

	mvkl HWI_REGS,a0            ; load addr of Interrupt Selector Regs
        mvkh HWI_REGS,a0

	mvkl HWI_INTRMULTHIGH,b1    ; Value for Interrupt Multiplexer High
        mvkh HWI_INTRMULTHIGH,b1
	stw b1,*a0++                ; Store into Interrupt Multiplexer High

        mvkl HWI_INTRMULTLOW,b1     ; Value for Interrupt Multiplexer Low
	mvkh HWI_INTRMULTLOW,b1
        stw b1,*a0++                ; Store into Interrupt Multiplexer Low

	mvkl HWI_POLARITYMASK,b1    ; Value for External Interrupt Polarity
        mvkh HWI_POLARITYMASK,b1
	stw b1,*a0                  ; Store into External Interrupt Polarity

        nop 5                       ; allow settling for possible spurious
	nop 5                       ; interrupts (10 cycles, per TI)

        mvk 0xffffffff,b1           ; clear any bits in IFR using ICR
	mvc b1,icr

        mvc ier,b1
	or 2,b1,b1
        mvc b1,ier                  ; set NMIE bit (required to enable ISRs)

	.if GBL_SUPPORTCSL
	    .ref    _GBL_cslInit

	    mvkl    _GBL_cslInit, b0
	    mvkh    _GBL_cslInit, b0
	    b       b0
	    mvkl    hwi_init_ret?, b3
	    mvkh    hwi_init_ret?, b3
	    nop 3

hwi_init_ret?:
	    .if GBL_CALLCSLCFGINIT
		.ref        _CSL_cfgInit

		mvkl        _CSL_cfgInit, b1
		mvkh        _CSL_cfgInit, b1
		b b1
		mvkl        hwi_cslcfg_init_ret?, b3
		mvkh        hwi_cslcfg_init_ret?, b3
		nop 3
	    .endif
hwi_cslcfg_init_ret?:

	.endif

	; 
	; L2 CACHE initialization
	;
	
	.if (GBL_L2CONFIGURE != 0)
	    .ref  _GBL_cslCacheInit

	    mvkl  _GBL_cslCacheInit, b0
	    mvkh  _GBL_cslCacheInit, b0

	    .if .TMS320C6400
		mvkl GBL_L2MODE, a4
||		mvkl GBL_C641XL2PRIORITY, b4
		mvkh GBL_L2MODE, a4
||		mvkh GBL_C641XL2PRIORITY, b4
		mvkl GBL_L2MARMASK1, a6
||		mvkl GBL_L2MARMASK2, b6
		mvkh GBL_L2MARMASK1, a6
||		mvkh GBL_L2MARMASK2, b6
		mvkl GBL_L2MARMASK3, a8
||		mvkl GBL_L2MARMASK4, b8
	        b	b0
		mvkh GBL_L2MARMASK3, a8
||		mvkh GBL_L2MARMASK4, b8
		mvkl GBL_L2MARMASK5, a10
||		mvkl GBL_L2CONFIGALLOC, b10
		mvkh GBL_L2MARMASK5, a10
||		mvkh GBL_L2CONFIGALLOC, b10
		mvkl GBL_L2ALLOC, a12
||              mvkl  gbl_cslcacheinit_ret?, b3
		mvkh GBL_L2ALLOC, a12
||              mvkh  gbl_cslcacheinit_ret?, b3
	    .else
	        b	b0
	        mvkl  GBL_L2MODE, a4
||	        mvkl  GBL_L2MARMASK, b4
	        mvkh  GBL_L2MODE, a4
||	        mvkh  GBL_L2MARMASK, b4
                mvkl  gbl_cslcacheinit_ret?, b3
                mvkh  gbl_cslcacheinit_ret?, b3
                nop 2
	    .endif

	
	.endif	; GBL_L2CONFIGURE

gbl_cslcacheinit_ret?:

	;
	; CACHE initialization
	;

	mvc	csr, b0			; get CSR

	mvk	GBL_CACHE, b2		; get cache bits from configuration

	mvk	C62_CCFIELDS, b1
	and	b1, b0, b1		; extract pcc+dcc fields of csr
	xor	b1, b0, b0		; clear pcc+dcc fields of csr
	or	b2, b0, b0		; change pcc and dcc fields

	mvc	b0, csr			; save CSR with new cache state

	;
	;  Calling TRC_init from here until there is at trc.cdb file.
	;
	TRC_init

	;
	;  fill memory using triples (nwords, addr, value) from 
	;  gblinit table.
	;
	mvkl	gblinit, a4
	mvkh	gblinit, a4

loop0?:
	ldw	*a4++[1], b0		; nwords
 	ldw	*a4++[1], a0		; address
 	ldw	*a4++[1], b2		; value
	nop	3
 [!b0]	b	done?
	nop	5

loop1?:
	stw	b2, *a0++[1]
	sub	b0, 1, b0
 [b0]	b	loop1?
	nop	5

	b	loop0?
	nop	5
done?:
	mvk	1, a2
 ||	mvkl	GBL_initdone, b2
 	mvkh	GBL_initdone, b2
	stw	a2, *b2

	.endm

;
;# ======== GBL_preamble ========
;
;  This macro is called by the generated *cfg.s62 files at the beginning
;  of the <OS>_init and <OS>_start routines.  It stores the subroutine
;  return address register (b3) onto the stack.
;
GBL_preamble    .macro
	stw	b3, *SP--[2]

	.endm

;
;# ======== GBL_postamble ========
;
;  This macro is called by the generated *cfg.s62 files at the end 
;  of the <OS>_init and <OS>_start routines, to effect a return from
;  the routines.  It includes restoring the return address into
;  Register b3 from the stack.
;
GBL_postamble    .macro
	ldw	*++SP[2], b3
	nop	4
	b       b3
	nop     5

	.endm

;
;# ======== GBL_startup ========
;
;#
;# Preconditions:
;#      none
;#
;# Postconditions:
;#      none
;#
        .asg    "", GBL_startup$regs
GBL_startup        .macro
        .endm

;
;# ======== GBL_variable ========
;
;#
;# Preconditions:
;#      none
;#
;# Postconditions:
;#      none
;#
	.asg	"", GBL_varaible$regs
GBL_variable	.macro name, value

	.bss	:name:,4,4
	.global	:name:
	
	.sect ".cinit"
	.align 8
	.field 4
	.field :name:
	.field :value:
	.endm

	.endif		; if GBL_ is not defined