📄 csl_chiphal.h

📁 SEED的VPM642测试程序-板级支持库
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  extern far cregister volatile unsigned int NRP;



  #define _CHIP_NRP_NRP_MASK           0xFFFFFFFFu

  #define _CHIP_NRP_NRP_SHIFT          0x00000000u

  #define  CHIP_NRP_NRP_DEFAULT        0x00000000u

  #define  CHIP_NRP_NRP_OF(x)          _VALUEOF(x)



  #define  CHIP_NRP_OF(x)              _VALUEOF(x)



  #define CHIP_NRP_DEFAULT (Uint32)( \

     _PER_FDEFAULT(CHIP,NRP,NRP)\

  )



  #define CHIP_NRP_RMK(nrp) (Uint32)( \

     _PER_FMK(CHIP,NRP,NRP,nrp)\

  )



  #define _CHIP_NRP_FGET(FIELD)\

    _PER_CFGET(CHIP,NRP,##FIELD)



  #define _CHIP_NRP_FSET(FIELD,field)\

    _PER_CFSET(CHIP,NRP,##FIELD,field)



  #define _CHIP_NRP_FSETS(FIELD,SYM)\

    _PER_CFSETS(CHIP,NRP,##FIELD,##SYM)





/******************************************************************************\

* _____________________

* |                   |

* |  A M R            |

* |___________________|

*

* AMR - addressing mode register

*

* FIELDS (msb -> lsb)

* (rw) BK1

* (rw) BK0

* (rw) B7MODE

* (rw) B6MODE

* (rw) B5MODE

* (rw) B4MODE

* (rw) A7MODE

* (rw) A6MODE

* (rw) A5MODE

* (rw) A4MODE

*

\******************************************************************************/

  extern far cregister volatile unsigned int AMR;



  #define _CHIP_AMR_BK1_MASK           0x02E00000u

  #define _CHIP_AMR_BK1_SHIFT          0x00000015u

  #define  CHIP_AMR_BK1_DEFAULT        0x00000000u

  #define  CHIP_AMR_BK1_OF(x)          _VALUEOF(x)

  #define  CHIP_AMR_BK1_2              0x00000000u

  #define  CHIP_AMR_BK1_4              0x00000001u

  #define  CHIP_AMR_BK1_8              0x00000002u

  #define  CHIP_AMR_BK1_16             0x00000003u

  #define  CHIP_AMR_BK1_32             0x00000004u

  #define  CHIP_AMR_BK1_64             0x00000005u

  #define  CHIP_AMR_BK1_128            0x00000006u

  #define  CHIP_AMR_BK1_256            0x00000007u

  #define  CHIP_AMR_BK1_512            0x00000008u

  #define  CHIP_AMR_BK1_1K             0x00000009u

  #define  CHIP_AMR_BK1_2K             0x0000000Au

  #define  CHIP_AMR_BK1_4K             0x0000000Bu

  #define  CHIP_AMR_BK1_8K             0x0000000Cu

  #define  CHIP_AMR_BK1_16K            0x0000000Du

  #define  CHIP_AMR_BK1_32K            0x0000000Eu

  #define  CHIP_AMR_BK1_64K            0x0000000Fu

  #define  CHIP_AMR_BK1_128K           0x00000010u

  #define  CHIP_AMR_BK1_256K           0x00000011u

  #define  CHIP_AMR_BK1_512K           0x00000012u

  #define  CHIP_AMR_BK1_1M             0x00000013u

  #define  CHIP_AMR_BK1_2M             0x00000014u

  #define  CHIP_AMR_BK1_4M             0x00000015u

  #define  CHIP_AMR_BK1_8M             0x00000016u

  #define  CHIP_AMR_BK1_16M            0x00000017u

  #define  CHIP_AMR_BK1_32M            0x00000018u

  #define  CHIP_AMR_BK1_64M            0x00000019u

  #define  CHIP_AMR_BK1_128M           0x0000001Au

  #define  CHIP_AMR_BK1_256M           0x0000001Bu

  #define  CHIP_AMR_BK1_512M           0x0000001Cu

  #define  CHIP_AMR_BK1_1G             0x0000001Du

  #define  CHIP_AMR_BK1_2G             0x0000001Eu

  #define  CHIP_AMR_BK1_4G             0x0000001Fu



  #define _CHIP_AMR_BK0_MASK           0x001F0000u

  #define _CHIP_AMR_BK0_SHIFT          0x00000010u

  #define  CHIP_AMR_BK0_DEFAULT        0x00000000u

  #define  CHIP_AMR_BK0_OF(x)          _VALUEOF(x)

  #define  CHIP_AMR_BK0_2              0x00000000u

  #define  CHIP_AMR_BK0_4              0x00000001u

  #define  CHIP_AMR_BK0_8              0x00000002u

  #define  CHIP_AMR_BK0_16             0x00000003u

  #define  CHIP_AMR_BK0_32             0x00000004u

  #define  CHIP_AMR_BK0_64             0x00000005u

  #define  CHIP_AMR_BK0_128            0x00000006u

  #define  CHIP_AMR_BK0_256            0x00000007u

  #define  CHIP_AMR_BK0_512            0x00000008u

  #define  CHIP_AMR_BK0_1K             0x00000009u

  #define  CHIP_AMR_BK0_2K             0x0000000Au

  #define  CHIP_AMR_BK0_4K             0x0000000Bu

  #define  CHIP_AMR_BK0_8K             0x0000000Cu

  #define  CHIP_AMR_BK0_16K            0x0000000Du

  #define  CHIP_AMR_BK0_32K            0x0000000Eu

  #define  CHIP_AMR_BK0_64K            0x0000000Fu

  #define  CHIP_AMR_BK0_128K           0x00000010u

  #define  CHIP_AMR_BK0_256K           0x00000011u

  #define  CHIP_AMR_BK0_512K           0x00000012u

  #define  CHIP_AMR_BK0_1M             0x00000013u

  #define  CHIP_AMR_BK0_2M             0x00000014u

  #define  CHIP_AMR_BK0_4M             0x00000015u

  #define  CHIP_AMR_BK0_8M             0x00000016u

  #define  CHIP_AMR_BK0_16M            0x00000017u

  #define  CHIP_AMR_BK0_32M            0x00000018u

  #define  CHIP_AMR_BK0_64M            0x00000019u

  #define  CHIP_AMR_BK0_128M           0x0000001Au

  #define  CHIP_AMR_BK0_256M           0x0000001Bu

  #define  CHIP_AMR_BK0_512M           0x0000001Cu

  #define  CHIP_AMR_BK0_1G             0x0000001Du

  #define  CHIP_AMR_BK0_2G             0x0000001Eu

  #define  CHIP_AMR_BK0_4G             0x0000001Fu





  #define _CHIP_AMR_B7MODE_MASK        0x0000C000u

  #define _CHIP_AMR_B7MODE_SHIFT       0x0000000Eu

  #define  CHIP_AMR_B7MODE_DEFAULT     0x00000000u

  #define  CHIP_AMR_B7MODE_OF(x)       _VALUEOF(x)

  #define  CHIP_AMR_B7MODE_LINEAR      0x00000000u

  #define  CHIP_AMR_B7MODE_CIRCULAR0   0x00000001u

  #define  CHIP_AMR_B7MODE_CIRCULAR1   0x00000002u



  #define _CHIP_AMR_B6MODE_MASK        0x00003000u

  #define _CHIP_AMR_B6MODE_SHIFT       0x0000000Cu

  #define  CHIP_AMR_B6MODE_DEFAULT     0x00000000u

  #define  CHIP_AMR_B6MODE_OF(x)       _VALUEOF(x)

  #define  CHIP_AMR_B6MODE_LINEAR      0x00000000u

  #define  CHIP_AMR_B6MODE_CIRCULAR0   0x00000001u

  #define  CHIP_AMR_B6MODE_CIRCULAR1   0x00000002u



  #define _CHIP_AMR_B5MODE_MASK        0x00000C00u

  #define _CHIP_AMR_B5MODE_SHIFT       0x0000000Au

  #define  CHIP_AMR_B5MODE_DEFAULT     0x00000000u

  #define  CHIP_AMR_B5MODE_OF(x)       _VALUEOF(x)

  #define  CHIP_AMR_B5MODE_LINEAR      0x00000000u

  #define  CHIP_AMR_B5MODE_CIRCULAR0   0x00000001u

  #define  CHIP_AMR_B5MODE_CIRCULAR1   0x00000002u



  #define _CHIP_AMR_B4MODE_MASK        0x00000300u

  #define _CHIP_AMR_B4MODE_SHIFT       0x00000008u

  #define  CHIP_AMR_B4MODE_DEFAULT     0x00000000u

  #define  CHIP_AMR_B4MODE_OF(x)       _VALUEOF(x)

  #define  CHIP_AMR_B4MODE_LINEAR      0x00000000u

  #define  CHIP_AMR_B4MODE_CIRCULAR0   0x00000001u

  #define  CHIP_AMR_B4MODE_CIRCULAR1   0x00000002u



  #define _CHIP_AMR_A7MODE_MASK        0x000000C0u

  #define _CHIP_AMR_A7MODE_SHIFT       0x00000006u

  #define  CHIP_AMR_A7MODE_DEFAULT     0x00000000u

  #define  CHIP_AMR_A7MODE_OF(x)       _VALUEOF(x)

  #define  CHIP_AMR_A7MODE_LINEAR      0x00000000u

  #define  CHIP_AMR_A7MODE_CIRCULAR0   0x00000001u

  #define  CHIP_AMR_A7MODE_CIRCULAR1   0x00000002u



  #define _CHIP_AMR_A6MODE_MASK        0x00000030u

  #define _CHIP_AMR_A6MODE_SHIFT       0x00000004u

  #define  CHIP_AMR_A6MODE_DEFAULT     0x00000000u

  #define  CHIP_AMR_A6MODE_OF(x)       _VALUEOF(x)

  #define  CHIP_AMR_A6MODE_LINEAR      0x00000000u

  #define  CHIP_AMR_A6MODE_CIRCULAR0   0x00000001u

  #define  CHIP_AMR_A6MODE_CIRCULAR1   0x00000002u



  #define _CHIP_AMR_A5MODE_MASK        0x0000000Cu

  #define _CHIP_AMR_A5MODE_SHIFT       0x00000002u

  #define  CHIP_AMR_A5MODE_DEFAULT     0x00000000u

  #define  CHIP_AMR_A5MODE_OF(x)       _VALUEOF(x)

  #define  CHIP_AMR_A5MODE_LINEAR      0x00000000u

  #define  CHIP_AMR_A5MODE_CIRCULAR0   0x00000001u

  #define  CHIP_AMR_A5MODE_CIRCULAR1   0x00000002u



  #define _CHIP_AMR_A4MODE_MASK        0x00000003u

  #define _CHIP_AMR_A4MODE_SHIFT       0x00000000u

  #define  CHIP_AMR_A4MODE_DEFAULT     0x00000000u

  #define  CHIP_AMR_A4MODE_OF(x)       _VALUEOF(x)

  #define  CHIP_AMR_A4MODE_LINEAR      0x00000000u

  #define  CHIP_AMR_A4MODE_CIRCULAR0   0x00000001u

  #define  CHIP_AMR_A4MODE_CIRCULAR1   0x00000002u



  #define  CHIP_AMR_OF(x)              _VALUEOF(x)



  #define CHIP_AMR_DEFAULT (Uint32)( \

     _PER_FDEFAULT(CHIP,AMR,BK1)\

    |_PER_FDEFAULT(CHIP,AMR,BK0)\

    |_PER_FDEFAULT(CHIP,AMR,B7MODE)\

    |_PER_FDEFAULT(CHIP,AMR,B6MODE)\

    |_PER_FDEFAULT(CHIP,AMR,B5MODE)\

    |_PER_FDEFAULT(CHIP,AMR,B4MODE)\

    |_PER_FDEFAULT(CHIP,AMR,A7MODE)\

    |_PER_FDEFAULT(CHIP,AMR,A6MODE)\

    |_PER_FDEFAULT(CHIP,AMR,A5MODE)\

    |_PER_FDEFAULT(CHIP,AMR,A4MODE)\

  )



  #define CHIP_AMR_RMK(bk1,bk0,b7mode,b6mode,b5mode,b4mode,a7,ode,\

    a6mode,a5mode,a4mode) (Uint32)( \

     _PER_FMK(CHIP,AMR,BK1,bk1)\

    |_PER_FMK(CHIP,AMR,BK0,bk0)\

    |_PER_FMK(CHIP,AMR,B7MODE,b7mode)\

    |_PER_FMK(CHIP,AMR,B6MODE,b6mode)\

    |_PER_FMK(CHIP,AMR,B5MODE,b5mode)\

    |_PER_FMK(CHIP,AMR,B4MODE,b4mode)\

    |_PER_FMK(CHIP,AMR,A7MODE,a7mode)\

    |_PER_FMK(CHIP,AMR,A6MODE,a6mode)\

    |_PER_FMK(CHIP,AMR,A5MODE,a5mode)\

    |_PER_FMK(CHIP,AMR,A4MODE,a4mode)\

  )



  #define _CHIP_AMR_FGET(FIELD)\

    _PER_CFGET(CHIP,AMR,##FIELD)



  #define _CHIP_AMR_FSET(FIELD,field)\

    _PER_CFSET(CHIP,AMR,##FIELD,field)



  #define _CHIP_AMR_FSETS(FIELD,SYM)\

    _PER_CFSETS(CHIP,AMR,##FIELD,##SYM)

/******************************************************************************\

* _____________________

* |                   |

* |  F A D C R        |

* |___________________|

*

* FADCR - floating-point adder config register (1)

*

* FIELDS (msb -> lsb)

* (rw) L2RMODE

* (rw) L2UNDER

* (rw) L2INEX

* (rw) L2OVER

* (rw) L2INFO

* (rw) L2INVAL

* (rw) L2DEN2

* (rw) L2DEN1

* (rw) L2NAN2

* (rw) L2NAN1

* (rw) L1RMODE

* (rw) L1UNDER

* (rw) L1INEX

* (rw) L1OVER

* (rw) L1INFO

* (rw) L1INVAL

* (rw) L1DEN2

* (rw) L1DEN1

* (rw) L1NAN2

* (rw) L1NAN1

*

* (1) only supported on devices with floating point unit

*

\******************************************************************************/

#if (FPU_SUPPORT)

  extern far cregister volatile unsigned int FADCR;



  #define _CHIP_FADCR_L2RMODE_MASK    0x06000000u

  #define _CHIP_FADCR_L2RMODE_SHIFT   0x00000019u

  #define  CHIP_FADCR_L2RMODE_DEFAULT 0x00000000u

  #define  CHIP_FADCR_L2RMODE_OF(x)   _VALUEOF(x)



  #define _CHIP_FADCR_L2UNDER_MASK    0x01000000u

  #define _CHIP_FADCR_L2UNDER_SHIFT   0x00000018u

  #define  CHIP_FADCR_L2UNDER_DEFAULT 0x00000000u

  #define  CHIP_FADCR_L2UNDER_OF(x)   _VALUEOF(x)



  #define _CHIP_FADCR_L2INEX_MASK     0x00800000u

  #define _CHIP_FADCR_L2INEX_SHIFT    0x00000017u

  #define  CHIP_FADCR_L2INEX_DEFAULT  0x00000000u

  #define  CHIP_FADCR_L2INEX_OF(x)    _VALUEOF(x)



  #define _CHIP_FADCR_L2OVER_MASK     0x00400000u

  #define _CHIP_FADCR_L2OVER_SHIFT    0x00000016u

  #define  CHIP_FADCR_L2OVER_DEFAULT  0x00000000u

  #define  CHIP_FADCR_L2OVER_OF(x)    _VALUEOF(x)



  #define _CHIP_FADCR_L2INFO_MASK     0x00200000u

  #define _CHIP_FADCR_L2INFO_SHIFT    0x00000015u

  #define  CHIP_FADCR_L2INFO_DEFAULT  0x00000000u

  #define  CHIP_FADCR_L2INFO_OF(x)    _VALUEOF(x)



  #define _CHIP_FADCR_L2INVAL_MASK    0x00100000u

  #define _CHIP_FADCR_L2INVAL_SHIFT   0x00000014u

  #define  CHIP_FADCR_L2INVAL_DEFAULT 0x00000000u

  #define  CHIP_FADCR_L2INVAL_OF(x)   _VALUEOF(x)



  #define _CHIP_FADCR_L2DEN2_MASK     0x00080000u

  #define _CHIP_FADCR_L2DEN2_SHIFT    0x00000013u

  #define  CHIP_FADCR_L2DEN2_DEFAULT  0x00000000u

  #define  CHIP_FADCR_L2DEN2_OF(x)    _VALUEOF(x)



  #define _CHIP_FADCR_L2DEN1_MASK     0x00040000u

  #define _CHIP_FADCR_L2DEN1_SHIFT    0x00000012u

  #define  CHIP_FADCR_L2DEN1_DEFAULT  0x00000000u

  #define  CHIP_FADCR_L2DEN1_OF(x)    _VALUEOF(x)



  #define _CHIP_FADCR_L2NAN2_MASK     0x00020000u

  #define _CHIP_FADCR_L2NAN2_SHIFT    0x00000011u

  #define  CHIP_FADCR_L2NAN2_DEFAULT  0x00000000u

  #define  CHIP_FADCR_L2NAN2_OF(x)    _VALUEOF(x)



  #define _CHIP_FADCR_L2NAN1_MASK     0x00010000u

  #define _CHIP_FADCR_L2NAN1_SHIFT    0x00000010u

  #define  CHIP_FADCR_L2NAN1_DEFAULT  0x00000000u

  #define  CHIP_FADCR_L2NAN1_OF(x)    _VALUEOF(x)



  #define _CHIP_FADCR_L1RMODE_MASK    0x00000600u

  #define _CHIP_FADCR_L1RMODE_SHIFT   0x00000009u

  #define  CHIP_FADCR_L1RMODE_DEFAULT 0x00000000u

  #define  CHIP_FADCR_L1RMODE_OF(x)   _VALUEOF(x)



  #define _CHIP_FADCR_L1UNDER_MASK    0x00000100u

  #define _CHIP_FADCR_L1UNDER_SHIFT   0x00000008u

  #define  CHIP_FADCR_L1UNDER_DEFAULT 0x00000000u

  #define  CHIP_FADCR_L1UNDER_OF(x)   _VALUEOF(x)



  #define _CHIP_FADCR_L1INEX_MASK     0x00000080u

  #define _CHIP_FADCR_L1INEX_SHIFT    0x00000007u

  #define  CHIP_FADCR_L1INEX_DEFAULT  0x00000000u

  #define  CHIP_FADCR_L1INEX_OF(x)    _VALUEOF(x)



  #define _CHIP_FADCR_L1OVER_MASK     0x00000040u

  #define _CHIP_FADCR_L1OVER_SHIFT    0x00000006u

  #define  CHIP_FADCR_L1OVER_DEFAULT  0x00000000u

  #define  CHIP_FADCR_L1OVER_OF(x)    _VALUEOF(x)



  #define _CHIP_FADCR_L1INFO_MASK     0x00000020u

  #define _CHIP_FADCR_L1INFO_SHIFT    0x00000005u

  #define  CHIP_FADCR_L1INFO_DEFAULT  0x00000000u

  #define  CHIP_FADCR_L1INFO_OF(x)    _VALUEOF(x)



  #define _CHIP_FADCR_L1INVAL_MASK    0x00000010u

  #define _CHIP_FADCR_L1INVAL_SHIFT   0x00000004u

  #define  CHIP_FADCR_L1INVAL_DEFAULT 0x00000000u

  #define  CHIP_FADCR_L1INVAL_OF(x)   _VALUEOF(x)



  #define _CHIP_FADCR_L1DEN2_MASK     0x00000008u

  #define _CHIP_FADCR_L1DEN2_SHIFT    0x00000003u

  #define  CHIP_FADCR_L1DEN2_DEFAULT  0x00000000u

  #define  CHIP_FADCR_L1DEN2_OF(x)    _VALUEOF(x)



  #define _CHIP_FADCR_L1DEN1_MASK     0x00000004u

  #define _CHIP_FADCR_L1DEN1_SHIFT    0x00000002u

  #define  CHIP_FADCR_L1DEN1_DEFAULT  0x00000000u

  #define  CHIP_FADCR_L1DEN1_OF(x)    _VALUEOF(x)



  #define _CHIP_FADCR_L1NAN2_MASK     0x00000002u

  #define _CHIP_FADCR_L1NAN2_SHIFT    0x00000001u

  #define  CHIP_FADCR_L1NAN2_DEFAULT  0x00000000u

  #define  CHIP_FADCR_L1NAN2_OF(x)    _VALUEOF(x)



  #define _CHIP_FADCR_L1NAN1_MASK     0x00000001u

  #define _CHIP_FADCR_L1NAN1_SHIFT    0x00000000u

  #define  CHIP_FADCR_L1NAN1_DEFAULT  0x00000000u

  #define  CHIP_FADCR_L1NAN1_OF(x)    _VALUEOF(x)



  #define  CHIP_FADCR_OF(x)           _VALUEOF(x)



  #define CHIP_FADCR_DEFAULT (Uint32)( \
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