csl_i2c.h

SEED的VPM642测试程序-板级支持库

/******************************************************************************\
*           Copyright (C) 1999-2000 Texas Instruments Incorporated.
*                           All Rights Reserved
*------------------------------------------------------------------------------
* FILENAME...... csl_i2c.h
* DATE CREATED.. 06/11/1999 
* LAST MODIFIED. 13/03/2002 - added I2C_outOfReset()
\******************************************************************************/
#ifndef _CSL_I2C_H_
#define _CSL_I2C_H_

#include <csl_chip.h>
#include <csl_irq.h>
#include <csl_i2chal.h>


#if (I2C_SUPPORT)
/******************************************************************************\
* scope and inline control macros
\******************************************************************************/
#ifdef __cplusplus
#define CSLAPI extern "C" far
#else
#define CSLAPI extern far
#endif

#undef  USEDEFS
#undef  IDECL
#undef  IDEF

#ifdef  _I2C_MOD_
  #define IDECL CSLAPI
  #define USEDEFS
  #define IDEF
#else
  #ifdef  _INLINE
    #define IDECL static inline
    #define USEDEFS
    #define IDEF  static inline
  #else
    #define IDECL CSLAPI
  #endif
#endif


/******************************************************************************\
* global macro declarations
\******************************************************************************/

/* I2C_open() flags */
#define I2C_OPEN_RESET     (0x00000001)

/* device identifiers for I2C_open() */

#if (CHIP_6713 || CHIP_DA610)
#define I2C_DEV0           (0)
#define I2C_DEV1           (1)
#endif

#if (CHIP_DM642 | CHIP_6412)
#define I2C_DEV0           (0)
#endif

/* device identifiers for I2C_open() */

#if (CHIP_6713 || CHIP_DA610)
#define I2C_PORT0          I2C_DEV0
#define I2C_PORT1          I2C_DEV1
#endif

#if (CHIP_DM642 | CHIP_6412)
#define I2C_PORT0           I2C_DEV0
#endif

/* error codes */
#define I2C_ERR_ALLOC	        (0x00000000) 
#define I2C_ERR_INVALID_HANDLE  (0x00000001) 

#define I2C_EVT_AL      0x01     // Arbitration win/lose
#define I2C_EVT_NACK    0x02     // No acknowledgement 
#define I2C_EVT_ARDY    0x03     // register access ready
#define I2C_EVT_ICRRDY  0x04     // receive data ready
#define I2C_EVT_ICXRDY  0x05     // transmit data ready

/******************************************************************************\
* global typedef declarations
\******************************************************************************/

/* device handle object */
typedef struct {
  Uint32 allocated;
  Uint32 eventId;
  volatile Uint32 *baseAddr;
  Uint32 i2cdrrAddr;
  Uint32 i2cdxrAddr;
} I2C_Obj, *I2C_Handle;

/* device configuration structure */
typedef struct {
	Uint32 i2coar;
	Uint32 i2cimr;
	Uint32 i2cclkl;
	Uint32 i2cclkh;
	Uint32 i2ccnt;
	Uint32 i2csar;
	Uint32 i2cmdr;
	Uint32 i2cpsc;
} I2C_Config;

typedef struct {
	Uint32 addrmode;        /* 7 or 10 bit address mode */
	Uint32 ownaddr;         /* don't care if master */
	Uint32 sysinclock;      /* clkout value (Mhz)  */
	Uint32 rate;            /* a number between 10 and 400 in kbps*/
	Uint32 bitbyte;         /* number of bits/byte to be received or transmitted */
	Uint32 dlb;             /* digital loopback mode */
	Uint32 free;	        /* free mode */
} I2C_Init;


/******************************************************************************\
* global variable declarations
\******************************************************************************/
static Uint32 I2C_isrDispatchTable[6];

/******************************************************************************\
* global function declarations
\******************************************************************************/
CSLAPI void I2C_reset(I2C_Handle hI2c);
CSLAPI void I2C_resetAll();
CSLAPI I2C_Handle I2C_open(int devNum, Uint32 flags);
CSLAPI void I2C_close(I2C_Handle hI2c);
//CSLAPI void I2C_init(I2C_Init *init);

/******************************************************************************\
* inline function declarations
\******************************************************************************/
IDECL Uint32 I2C_getXmtAddr(I2C_Handle hI2c);
IDECL Uint32 I2C_getRcvAddr(I2C_Handle hI2c);
IDECL Uint32 I2C_getEventId(I2C_Handle hI2c);
IDECL Uint32 I2C_rfull(I2C_Handle hI2c);
IDECL Uint32 I2C_rrdy(I2C_Handle hI2c);
IDECL Uint32 I2C_xempty(I2C_Handle hI2c);
IDECL Uint32 I2C_xrdy(I2C_Handle hI2c);
IDECL Uint32 I2C_bb(I2C_Handle hI2c);

IDECL void I2C_writeByte(I2C_Handle hI2c, Uint8 val);
IDECL Uint8 I2C_readByte(I2C_Handle hI2c);

IDECL void I2C_sendStop(I2C_Handle hI2c);
IDECL void I2C_start(I2C_Handle hI2c);
IDECL void I2C_outOfReset(I2C_Handle hI2c);

IDECL Uint32 I2C_intClear(I2C_Handle hI2c);
IDECL void I2C_intClearAll(I2C_Handle hI2c);
IDECL void I2C_intEvtEnable(I2C_Handle hI2c,Uint32 maskFlag);
IDECL void I2C_intEvtDisable(I2C_Handle hI2c,Uint32 unmaskFlag);

IDECL void I2C_config(I2C_Handle hI2c,I2C_Config *config);
IDECL void I2C_configArgs(I2C_Handle hI2c,Uint32 i2coar,Uint32 i2cimr,
           Uint32 i2cclkl,Uint32 i2cclkh,Uint32 i2ccnt,
		   Uint32 i2csar,Uint32 i2cmdr,Uint32 i2cpsc);
IDECL void I2C_getConfig(I2C_Handle hI2c,I2C_Config *config);


/******************************************************************************\
* inline function definitions
\******************************************************************************/
#ifdef USEDEFS
/*----------------------------------------------------------------------------*/
IDEF Uint32 I2C_getXmtAddr(I2C_Handle hI2c) {
  return (Uint32)(hI2c->i2cdxrAddr);
}
/*----------------------------------------------------------------------------*/
IDEF Uint32 I2C_getRcvAddr(I2C_Handle hI2c) {
  return (Uint32)(hI2c->i2cdrrAddr);
}
/*----------------------------------------------------------------------------*/
IDEF Uint32 I2C_getEventId(I2C_Handle hI2c) {
  return (hI2c->eventId);
}
/*----------------------------------------------------------------------------*/
IDEF Uint32 I2C_rfull(I2C_Handle hI2c){
 return	I2C_FGETH(hI2c,I2CSTR,RSFULL);
}
/*----------------------------------------------------------------------------*/
IDEF Uint32 I2C_rrdy(I2C_Handle hI2c){
 return	I2C_FGETH(hI2c,I2CSTR,ICRRDY);
}
/*----------------------------------------------------------------------------*/
IDEF Uint32 I2C_xempty(I2C_Handle hI2c){
 return I2C_FGETH(hI2c,I2CSTR,XSMT);
}
/*----------------------------------------------------------------------------*/
IDEF Uint32 I2C_xrdy(I2C_Handle hI2c){
 return	I2C_FGETH(hI2c,I2CSTR,ICXRDY);
}
/*----------------------------------------------------------------------------*/
IDEF Uint32 I2C_bb(I2C_Handle hI2c){
 return	I2C_FGETH(hI2c,I2CSTR,BB);
}
/*----------------------------------------------------------------------------*/
IDEF Uint8 I2C_readByte(I2C_Handle hI2c) {
  return (*(volatile Uint8 *)(hI2c->i2cdrrAddr));
}
/*----------------------------------------------------------------------------*/
IDEF void I2C_writeByte(I2C_Handle hI2c, Uint8 val) {
  (*(volatile Uint8 *)(hI2c->i2cdxrAddr)) = val;
}
/*----------------------------------------------------------------------------*/
IDEF void I2C_sendStop(I2C_Handle hI2c){
 	I2C_FSETSH(hI2c,I2CMDR,STP,STOP);
}
/*----------------------------------------------------------------------------*/
IDEF void I2C_start(I2C_Handle hI2c){
	I2C_FSETSH(hI2c,I2CMDR,STT,START);
}
/*----------------------------------------------------------------------------*/
IDEF void I2C_outOfReset(I2C_Handle hI2c){
	I2C_FSETSH(hI2c,I2CMDR,IRS,NRST);
}
/*----------------------------------------------------------------------------*/
IDEF Uint32 I2C_intClear(I2C_Handle hI2c){
    return I2C_RGETH(hI2c,I2CIVR);
}
/*----------------------------------------------------------------------------*/
IDEF void I2C_intClearAll(I2C_Handle hI2c){
   Uint32 x=I2C_RGETH(hI2c,I2CIVR);
    while(x != 0) { x=I2C_RGETH(hI2c,I2CIVR); }
}
/*----------------------------------------------------------------------------*/
IDEF void I2C_intEvtEnable(I2C_Handle hI2c,Uint32 maskFlag){

    Uint32 newMask;

	newMask = I2C_RGETH(hI2c,I2CIMR) | maskFlag;
	I2C_RSETH(hI2c,I2CIMR,newMask);
	IRQ_enable(hI2c->eventId);

}
/*----------------------------------------------------------------------------*/
IDEF void I2C_intEvtDisable(I2C_Handle hI2c,Uint32 unmaskFlag){

	Uint32 newMask;

	newMask = I2C_RGETH(hI2c,I2CIMR) & unmaskFlag;
	I2C_RSETH(hI2c,I2CIMR,newMask);

	if(!(I2C_RGETH(hI2c,I2CIMR) & 0x0000001F))
		IRQ_disable(hI2c->eventId);
}
/*----------------------------------------------------------------------------*/

IDEF void I2C_config(I2C_Handle hI2c, I2C_Config *config) {

  Uint32 gie;
  volatile Uint32 *base = (volatile Uint32 *)(hI2c->baseAddr);
  register int x0,x1,x2,x3,x4,x5,x6,x7;

  gie = IRQ_globalDisable();

  /* the compiler generates more efficient code if the loads */
  /* and stores are grouped together rather than intermixed  */
  x0 = config->i2coar;
  x1 = config->i2cimr;
  x2 = config->i2cclkl;
  x3 = config->i2cclkh;
  x4 = config->i2ccnt;
  x5 = config->i2csar;
  x6 = config->i2cpsc;
  x7 = config->i2cmdr;

  base[_I2C_I2COAR_OFFSET]  = x0;
  base[_I2C_I2CIMR_OFFSET]  = x1;
  base[_I2C_I2CCLKL_OFFSET] = x2;
  base[_I2C_I2CCLKH_OFFSET] = x3;
  base[_I2C_I2CCNT_OFFSET]  = x4;
  base[_I2C_I2CSAR_OFFSET]  = x5;
  base[_I2C_I2CPSC_OFFSET]  = x6;
  base[_I2C_I2CMDR_OFFSET]  = x7;

  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
IDEF void I2C_configArgs(I2C_Handle hI2c,Uint32 i2coar,Uint32 i2cimr,
Uint32 i2cclkl,Uint32 i2cclkh,Uint32 i2ccnt,Uint32 i2csar,
Uint32 i2cmdr,Uint32 i2cpsc){

  Uint32 gie;
  volatile Uint32 *base = (volatile Uint32 *)(hI2c->baseAddr);

  gie = IRQ_globalDisable();

  base[_I2C_I2COAR_OFFSET]  = i2coar;
  base[_I2C_I2CIMR_OFFSET]  = i2cimr;
  base[_I2C_I2CCLKL_OFFSET] = i2cclkl;
  base[_I2C_I2CCLKH_OFFSET] = i2cclkh;
  base[_I2C_I2CCNT_OFFSET]  = i2ccnt;
  base[_I2C_I2CSAR_OFFSET]  = i2csar;
  base[_I2C_I2CPSC_OFFSET]  = i2cpsc;
  base[_I2C_I2CMDR_OFFSET]  = i2cmdr;

  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
IDEF void I2C_getConfig(I2C_Handle hI2c, I2C_Config *config) {

  Uint32 gie;
  volatile Uint32 *base = (volatile Uint32 *)(hI2c->baseAddr);
  register int x0,x1,x2,x3,x4,x5,x6,x7;

  gie = IRQ_globalDisable();

  /* the compiler generates more efficient code if the loads */
  /* and stores are grouped together rather than intermixed  */

  x0 = base[_I2C_I2COAR_OFFSET];
  x1 = base[_I2C_I2CIMR_OFFSET];
  x2 = base[_I2C_I2CCLKL_OFFSET];
  x3 = base[_I2C_I2CCLKH_OFFSET];
  x4 = base[_I2C_I2CCNT_OFFSET];
  x5 = base[_I2C_I2CSAR_OFFSET];
  x6 = base[_I2C_I2CMDR_OFFSET];
  x7 = base[_I2C_I2CPSC_OFFSET];

  config->i2coar  = x0;
  config->i2cimr  = x1;
  config->i2cclkl = x2;
  config->i2cclkh = x3;
  config->i2ccnt  = x4;
  config->i2csar  = x5;
  config->i2cmdr  = x6;
  config->i2cpsc  = x7;

  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
#endif /* USEDEFS */


#endif /* I2C_SUPPORT */
#endif /* _CSL_I2C_H_ */
/******************************************************************************\
* End of csl_i2c.h
\******************************************************************************/