csl_mdiohal.h

SEED的VPM642测试程序-板级支持库

/*****************************************************************************\
*           Copyright (C) 1999-2003 Texas Instruments Incorporated.
*                           All Rights Reserved
*------------------------------------------------------------------------------
* FILENAME...... csl_mdiohal.h
* DATE CREATED.. 02/08/2002
* LAST MODIFIED. 03/05/2003
*------------------------------------------------------------------------------
* REGISTERS/PARAMETERS
*
* VERSION           - Module Version Register
* CONTROL           - Module Control Register
* ALIVE             - PHY "Alive" Indication Register
* LINK              - PHY Link Status Register
* LINKINTRAW        - Link Status Change Interrupt Register
* LINKINTMASKED     - Link Status Change Interrupt Register (Masked)
* USERINTRAW        - User Command Complete Interrupt
* USERINTMASKED     - User Command Complete Interrupt (Masked)
* USERINTMASKSET    - Enable User Command Complete Interrupt Mask
* USERINTMASKCLEAR  - Disable User Command Complete Interrupt Mask
* USERACCESS0       - User Access Register 0
* USERPHYSEL0       - User PHY Select Register 0
* USERACCESS1       - User Access Register 1
* USERPHYSEL1       - User PHY Select Register 1
*
*\******************************************************************************/
#ifndef _CSL_MDIOHAL_H
#define _CSL_MDIOHAL_H_

#include <csl_stdinc.h>
#include <csl_chip.h>

#if (MDIO_SUPPORT)

/******************************************************************************\
* MDIO Register section
\******************************************************************************/

#define _MDIO_BASE_ADDR   0x01c83800u


/******************************************************************************\
* module level register/field access macros
\******************************************************************************/

/* ----------------- */
/* FIELD MAKE MACROS */
/* ----------------- */

// User Supplied Value
#define MDIO_FMK(REG,FIELD,x)\
  ((x<<_MDIO_##REG##_##FIELD##_SHIFT)&_MDIO_##REG##_##FIELD##_MASK)

// Symbolic Value Name
#define MDIO_FMKS(REG,FIELD,SYM)\
  ((MDIO_##REG##_##FIELD##_##SYM<<_MDIO_##REG##_##FIELD##_SHIFT)\
  &_MDIO_##REG##_##FIELD##_MASK)

// MAC Index Flag Flag
#define MDIO_FMKMIF(MACINDEX)    (1u<<(MACINDEX))


/* -------------------------------- */
/* RAW REGISTER/FIELD ACCESS MACROS */
/* -------------------------------- */

#define MDIO_ADDR(REG)\
    _MDIO_##REG##_ADDR

#define MDIO_REG(REG)\
    *(volatile Uint32*)(_MDIO_##REG##_ADDR)

// Standard Registers
#define MDIO_RGET(REG)\
    (*(volatile Uint32*)(_MDIO_##REG##_ADDR))

#define MDIO_RSET(REG,x)\
    (*(volatile Uint32*)(_MDIO_##REG##_ADDR)=(x))

#define MDIO_FGET(REG,FIELD)\
    ((MDIO_RGET(REG)&_MDIO_##REG##_##FIELD##_MASK)\
    >>_MDIO_##REG##_##FIELD##_SHIFT)

#define MDIO_FSET(REG,FIELD,x)\
    MDIO_RSET(REG,(MDIO_RGET(REG)&~_MDIO_##REG##_##FIELD##_MASK)|\
    MDIO_FMK(REG,FIELD,x))

#define MDIO_FSETS(REG,FIELD,SYM)\
    MDIO_RSET(REG,(MDIO_RGET(REG)&~_MDIO_##REG##_##FIELD##_MASK)|\
    MDIO_FMKS(REG,FIELD,SYM))



/******************************************************************************\
* _____________________
* |                   |
* |  VERSION          |
* |___________________|
*
* TXIDVER           - TX Identification and Version Register
*
* FIELDS (msb -> lsb)
* (r)   MODID       - Module Id
* (r)   REVMAJ      - Major Revision
* (r)   REVMIN      - Minor Revision
*
* MACROS SUPPORTED
*  MDIO_FMK     y
*  MDIO_FMKS    .
*  MDIO_FMKMIF  .
*  MDIO_ADDR    y
*  MDIO_REG     y
*  MDIO_RGET    y
*  MDIO_RSET    y
*  MDIO_FGET    y
*  MDIO_FSET    y
*  MDIO_FSETS   .
*
\******************************************************************************/
#define _MDIO_VERSION_ADDR                      (_MDIO_BASE_ADDR+0x0000u)

#define MDIO_VERSION                            MDIO_REG(VERSION)

#define _MDIO_VERSION_MODID_MASK                0xFFFF0000u
#define _MDIO_VERSION_MODID_SHIFT               16u

#define _MDIO_VERSION_REVMAJ_MASK               0x0000FF00u
#define _MDIO_VERSION_REVMAJ_SHIFT              8u

#define _MDIO_VERSION_REVMIN_MASK               0x000000FFu
#define _MDIO_VERSION_REVMIN_SHIFT              0u



/******************************************************************************\
* _____________________
* |                   |
* |    CONTROL        |
* |___________________|
*
* CONTROL           - MDIO Control Register
*
* FIELDS (msb -> lsb)
* (r)   IDLE        - MDIO State Machine Idle
* (rw)  ENABLE      - Enable Control
* (rw)  PREAMBLE    - Preamble Disable
* (rwc) FAULT       - Fault Indicator
* (rw)  FAULTENB    - Fault Detect Enable
* (rw)  INTTESTENB  - Link Test Enable
* (rw)  CLKDIV      - Clock Divider
*
*
* MACROS SUPPORTED
*  MDIO_FMK     y
*  MDIO_FMKS    y
*  MDIO_FMKMIF  .
*  MDIO_ADDR    y
*  MDIO_REG     y
*  MDIO_RGET    y
*  MDIO_RSET    y
*  MDIO_FGET    y
*  MDIO_FSET    y
*  MDIO_FSETS   y
*
\******************************************************************************/
#define _MDIO_CONTROL_ADDR                      (_MDIO_BASE_ADDR+0x0004u)

#define MDIO_CONTROL                            MDIO_REG(TXCONTROL)

#define _MDIO_CONTROL_IDLE_MASK                 0x80000000u
#define _MDIO_CONTROL_IDLE_SHIFT                31u
#define MDIO_CONTROL_IDLE_YES                   1u
#define MDIO_CONTROL_IDLE_NO                    0u

#define _MDIO_CONTROL_ENABLE_MASK               0x40000000u
#define _MDIO_CONTROL_ENABLE_SHIFT              30u
#define MDIO_CONTROL_ENABLE_YES                 1u
#define MDIO_CONTROL_ENABLE_NO                  0u

#define _MDIO_CONTROL_PREAMBLE_MASK             0x00100000u
#define _MDIO_CONTROL_PREAMBLE_SHIFT            20u
#define MDIO_CONTROL_PREAMBLE_DISABLED          1u
#define MDIO_CONTROL_PREAMBLE_ENABLED           0u

#define _MDIO_CONTROL_FAULT_MASK                0x00080000u
#define _MDIO_CONTROL_FAULT_SHIFT               19u
#define MDIO_CONTROL_FAULT_YES                  1u
#define MDIO_CONTROL_FAULT_NO                   0u

#define _MDIO_CONTROL_FAULTENB_MASK             0x00040000u
#define _MDIO_CONTROL_FAULTENB_SHIFT            18u
#define MDIO_CONTROL_FAULTENB_YES               1u
#define MDIO_CONTROL_FAULTENB_NO                0u

#define _MDIO_CONTROL_INTTESTENB_MASK           0x00020000u
#define _MDIO_CONTROL_INTTESTENB_SHIFT          17u
#define MDIO_CONTROL_INTTESTENB_YES             1u
#define MDIO_CONTROL_INTTESTENB_NO              0u

#define _MDIO_CONTROL_CLKDIV_MASK               0x000000FFu
#define _MDIO_CONTROL_CLKDIV_SHIFT              0u



/******************************************************************************\
* _____________________
* |                   |
* |   ALIVE           |
* |   LINK            |
* |___________________|
*
* ALIVE             - PHY "Alive" Indication Register
* LINK              - PHY Link Status Register
*
* FIELDS (msb -> lsb)
*  PHY Index Flags (0-31) (use MDIO_FMKMIF)
*
* MACROS SUPPORTED
*  MDIO_FMK     .
*  MDIO_FMKS    .
*  MDIO_FMKMIF  y
*  MDIO_ADDR    y
*  MDIO_REG     y
*  MDIO_RGET    y
*  MDIO_RSET    y
*  MDIO_FGET    .
*  MDIO_FSET    .
*  MDIO_FSETS   .
*
\******************************************************************************/
#define _MDIO_ALIVE_ADDR                        (_MDIO_BASE_ADDR+0x0008u)
#define _MDIO_LINK_ADDR                         (_MDIO_BASE_ADDR+0x000Cu)

#define MDIO_ALIVE                              MDIO_REG(ALIVE)
#define MDIO_LINK                               MDIO_REG(LINK)



/******************************************************************************\
* _____________________
* |                   |
* | LINKINTRAW        |
* | LINKINTMASKED     |
* | USERINTRAW        |