clk.h62

SEED的VPM642测试程序-板级支持库

;
;  Copyright 2003 by Texas Instruments Incorporated.
;  All rights reserved. Property of Texas Instruments Incorporated.
;  Restricted rights to use, duplicate or disclose this code are
;  granted through contract.
;  
;
; "@(#) DSP/BIOS 4.90.270 12-18-03 (barracuda-o04)"
;
;  ======== clk.h62 ========
;
; 

	.if ($isdefed("CLK_") = 0)   ; prevent multiple includes of this file
CLK_	.set	1

	.include chk.h62
	.include std.h62

;
;  ======== CLK_Obj ========
;
CLK_Obj         .struct
fxn     .word   1       ; function to execute
CLK_A_OBJSIZE   .endstruct

	.global CLK_F_isr, CLK_F_itime, _CLK_F_itime
	.global CLK_F_getshtime, CLK_F_getfhtime, CLK_F_getltime
	.global CLK_F_rete, CLK_R_time

				; defined by config tool
	.global CLK_INTBIT, CLK_REGS, CLK_COUNTSPMS
	.global CLK_PRD, CLK_TIMEFXN, CLK_HOOKFXN
	.global CLK_A_TABBEG, CLK_A_TABLEN, CLK_A_TABEND

	.global CLK_F_gethtime	; Based on the configuration, the linker's 
				; command file will use either CLK_F_getshtime
				; or CLK_F_getfhtime to replace CLK_F_gethtime

	.global CLK_D_idletime, CLK_D_tabbeg
	.global IDL_D_tabbeg


; timer control register masks
CLK_CLKSRC	.set	210h		; set source to CPU/4, PWID=1
CLK_HOLD	.set  	0ffffff7fh	; mask /HLD=0
CLK_MAXPER	.set	0ffffffffh	; Maximum clock period (for loop
					; overhead calculation)
CLK_START	.set 	0c0h		; set GO=1,/HLD=1
CLK_TSTATBIT	.set    0800h           ; timer control reg mask, TSTAT=1

;
;# ======== CLK_Obj ========
;  Allocate a clock fxn object and initialize all fields.
;
;  Note that all clock objects are allocated in a distinguished section
;  named ".clk"; this insures that all objs are contiguous (this is
;  required by the implementation of CLK_F_run())
;
;  Parameters:
;       name    - name of clock object
;       fxn     - function to call
;
;  fxn is called at clock isr level
;
;#
;# Preconditions:
;#      none
;#
;# Postconditions:
;#      none
;#
        .asg    "", CLK_Obj$regs
CLK_Obj         .macro cflag, name, id, fxn
        CHK_nargs "CLK_Obj", fxn
        .if ($symcmp(":CHK_status:", "error") = 0)
            .emsg "CLK_OBJ parameter error."
        .endif

        .var fxnlen
        .eval $symlen(":fxn:"),fxnlen

        .if (:cflag: = 0)
            .mexit
        .endif

        .global :name:

        .if ($symcmp(":fxn:", "0") != 0)
        .global fxn
        .endif

:name:  .tag    CLK_Obj         ; declare name as having type CLK_Obj

; allocate all CLK objs contiguously in ".clk"
:name:	.usect ".clk", STD_TARGWORDMAUS * 1, STD_TARGWORDMAUS

        .sect ".cinit"

	.align	8

	.field	STD_TARGWORDMAUS * 1

	.field	:name:    

	.field  :fxn:           ; fxn

        .endm

;
;# ======== CLK_config ========
;
;#
;# Preconditions:
;#	none
;#
;# Postconditions:
;#	none
;#
	.asg    "", CLK_config$regs
CLK_config      .macro _intbit, _regs, _usetimer, _tcr, _prd, _countspms, _timefxn, _hookfxn

	;
	; NOTE! BIOS and SPOX overlap still needs resolution
	;
	
	.endm

;
;# ======== CLK_countspms ========
;  Get the timer counts per millisecond.
;#
;# Preconditions:
;#	none
;#
;# Postconditions:
;#	a4 = CLK_COUNTSPMS
;#
	.asg    "a4", CLK_countspms$regs
CLK_countspms	.macro
	mvkl CLK_COUNTSPMS,a4
	mvkh CLK_COUNTSPMS,a4

	.endm

;
;# ======== CLK_end ========
;  Invoked at the end of all other configuration declarations.
;
;#
;# Preconditions:
;#	none
;#
;# Postconditions:
;#	none
;#
	.asg    ":CLK_Obj$regs:", CLK_end$regs
CLK_end .macro
	.if (CLK$NUMOF != 0)
	    CLK_Obj	1,CLK_null,-1,0	; NULL terminate clock isr fxn table
	.endif

	.endm

;
;# ======== CLK_gethtime ========
;
;  This operation returns a 32-bit time value.
;
;#
;# Preconditions:
;#	Interrupts are disabled
;#      b14 = pointer to start of .bss 
;#	Timer period reg != 0xffffffff
;#
;# Postconditions:
;#	a4 = high resolution time value
;#
;
        .asg "b3,:CLK_F_getshtime$regs:", CLK_gethtime$regs

	; NOTE: the register used statement assumes CLK_F_getfhtime$regs is
	; a subset of CLK_F_getshtime$regs.

CLK_gethtime    .macro  
	mvkl CLK_F_gethtime,b3		; changed to FAR call.
	mvkh CLK_F_gethtime,b3
        b b3
	mvkl geth?,b3
	mvkh geth?,b3
	nop 3
geth?:

        ; Note: CLK_F_gethtime is not explicitly defined in clk.s62, the
        ; linker's command file will use either CLK_F_getshtime or 
	; CLK_F_getfhtime to replace CLK_F_gethtime based on the configuration.

        .endm

;
;# ======== CLK_getltime ========
;  Return the number of timer interrupts that have occurred.
;
;#
;# Preconditions:
;#      b14 = pointer to start of .bss 
;#
;# Postconditions:
;#	a4 = low resolution time value
;#
;
        .asg "a4", CLK_getltime$regs
CLK_getltime    .macro 
	ldw *+b14(CLK_R_time),a4
	nop 4

        .endm

;
;# ======== CLK_getprd ========
;  Get period register value
;
;#
;# Preconditions:
;#
;# Postconditions:
;#	a4 = CLK_PRD.
;
	.asg "a4", CLK_getprd$regs
CLK_getprd .macro
	mvkl CLK_PRD,a4
	mvkh CLK_PRD,a4

	.endm

;
;# ======== CLK_init ========
;  Runtime initialization of the C6x timer
;
;#
;# Preconditions:
;#	none
;#
;# Postconditions:
;#	none
;#
;# Dependencies:
;#	none
;#
;
	.asg "", CLK_init$regs
CLK_init .macro

	; only expand if the CLK module is configured by the user and he/she/it
	; asks to use the timer
	.if ((CLK$ = 1) & (CLK_USETIMER = 1))
	.endif

	.endm


;
;# ======== CLK_itime ========
;  This function calls the configured time function to retrieve
;  a time value.
;
;#
;# Preconditions:
;#
;# Postconditions:
;#      a4 = time value
;#
;
        .asg "b3,:CLK_F_itime$regs:", CLK_itime$regs
CLK_itime .macro
	mvkl CLK_F_itime,b3		; changed to FAR call
	mvkh CLK_F_itime,b3
        b b3
	mvkl itime?,b3
	mvkh itime?,b3
	nop 3
itime?:
        .endm


;
;# ======== CLK_startup ========
;  Start the C6x timer
;
;#
;# Preconditions:
;#	none
;#
;# Postconditions:
;#	Timer Period register = CLK_PRD.
;#    	Timer is started.
;#	Timer interrupt enable is set in IER.
;#
;# Dependencies:
;#	This routine must be called after any other routines that use the
;#	timer and before interrupts are globally enabled.
;
	.asg "a0,a1,b1,b2,ier", CLK_startup$regs
CLK_startup	.macro

	; only expand if the CLK module is configured by the user and he/she
	; asks to use the timer
	.if ((CLK$ = 1) & (CLK_USETIMER = 1))
	
	.if GBL_SUPPORTCSL

	    ;
	    ; Force a reference to the appropriate CLK_startXXX function.
	    ; CLK_start will be aliased to this function in the cfg.cmd file.
	    ;
	    ; A forced reference is necessary because no module directly
	    ; references this function, and the aliasing performed in the
	    ; linker command file cfg.cmd needs the symbol to be well
	    ; defined at the time of the alias, which is after the libraries
	    ; have already been scanned.  The following reference alone will
	    ; cause the function to be linked in from the BIOS library,
	    ; allowing the subsequent alias to be satisfied.
	    ;
	    .ref	_CLK_start6x		; only one version now
	    .ref	_CLK_start
	
	    mvkl	_CLK_start, a0
	    mvkh	_CLK_start, a0
	    b	a0
	    mvkl	clk_startup_ret?, b3
	    mvkh	clk_startup_ret?, b3
	    nop	3
clk_startup_ret?:

	.else

	    mvkl CLK_REGS,a0		; get address to Timer Control register
     ||     mvkl CLK_CLKSRC,b2
	    mvkh CLK_REGS,a0
     ||     mvkh CLK_CLKSRC,b2
	    stw b2,*a0              ; write /HLD=0 and CLKSRC=1 to Timer Control

	    ; set the period
	    mvkl CLK_PRD, a1
	    mvkh CLK_PRD, a1
	    stw a1, *+a0[1]

	    ; start timer
	    ldw *a0, a1
	    mvk CLK_START,b1	; get start mask
	    nop 3
	    or b1,a1,a1		; set GO=1 and /HLD=1
	    stw a1,*a0		; write to Timer Control to start timer

	    ; enable Timer interrupt in IER
	    mvkl CLK_INTBIT,a0
	    mvkh CLK_INTBIT,a0
	    mvc ier,b1
	    or a0,b1,b1		; set CLK_INTBIT
	    mvc b1,ier

	.endif

	.endif

	.endm

	.endif		; if CLK_ is not defined