csl_edma.h

SEED的VPM642测试程序-板级支持库

  gie = IRQ_globalDisable();
  #if (C64_SUPPORT)
    if (chaNum < 32) EDMA_RSET(EERL,EDMA_RGET(EERL) | (1<<chaNum));
    else EDMA_RSET(EERH,EDMA_RGET(EERH) | (1<<(chaNum-32)));
  #else
    EDMA_RSET(EER,EDMA_RGET(EER) | (1<<chaNum));
  #endif
  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_enableChaining(EDMA_Handle hEdma) {

  int gie;
  int chaNum = (hEdma & 0x00FF0000)>>16;

  gie = IRQ_globalDisable();
  #if (C64_SUPPORT)
    if (chaNum < 32) EDMA_RSET(CCERL,EDMA_RGET(CCERL) | (1<<chaNum));
    else EDMA_RSET(CCERH,EDMA_RGET(CCERH) | (1<<(chaNum-32)));
  #else

    EDMA_RSET(CCER,EDMA_RGET(CCER) | (1<<chaNum));
  #endif
  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_chain(EDMA_Handle parent, EDMA_Handle nextChannel,int tccflag, int atccflag) {

  volatile Uint32 tccm,tcc,atcc;
  int TccNum = (nextChannel & 0x00FF0000)>>16;
  int gie;

  gie = IRQ_globalDisable();

 if (tccflag) {
  #if (C64_SUPPORT) /* SET TCCM and TCC fields */
   if (TccNum < 16) {  tccm = 0 ; tcc = TccNum;}
   else {
        if ( TccNum  > 15 && TccNum < 32 ) { tccm = 1 ; tcc = TccNum-16;}
         else  {
              if ( TccNum  > 31 && TccNum < 48 ) { tccm = 2 ; tcc = TccNum-32;}
              else {   /* channel > 47 */
                     tccm = 3 ; tcc = TccNum-48;
                   }
         }
    }
      EDMA_FSETH(parent,OPT,TCCM,tccm);
      EDMA_FSETH(parent,OPT,TCC,tcc);
      EDMA_FSETH(parent,OPT,TCINT,1);
  #else
    EDMA_FSETH(parent,OPT,TCC,TccNum);
    EDMA_FSETH(parent,OPT,TCINT,1);
  #endif
}
/* ATCC */
if (atccflag) {
    #if C64_SUPPORT
    EDMA_FSETH(parent,OPT,ATCC,TccNum);
    EDMA_FSETH(parent,OPT,ATCINT,1);
    #endif
}
  tccAllocTable[TccNum] = 1;
  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_disableChannel(EDMA_Handle hEdma) {

  int chaNum = (hEdma & 0x00FF0000)>>16;
  int gie;

  gie = IRQ_globalDisable();

  #if (C64_SUPPORT)
    if (chaNum < 32) EDMA_RSET(EERL,EDMA_RGET(EERL) & ~(1<<chaNum));
    else EDMA_RSET(EERH,EDMA_RGET(EERH) & ~(1<<(chaNum-32)));
  #else
    EDMA_RSET(EER,EDMA_RGET(EER) & ~(1<<chaNum));
  #endif
  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_disableChaining(EDMA_Handle hEdma) {

 int chaNum = (hEdma & 0x00FF0000)>>16;
 int gie;

  gie = IRQ_globalDisable();
  #if (C64_SUPPORT)
    if (chaNum < 32) EDMA_RSET(CCERL,EDMA_RGET(CCERL) & ~(1<<chaNum));
    else EDMA_RSET(CCERH,EDMA_RGET(CCERH) & ~(1<<(chaNum-32)));
  #else
    EDMA_RSET(CCER,EDMA_RGET(CCER) & ~(1<<chaNum));
  #endif
  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_setChannel(EDMA_Handle hEdma) {

  int chaNum = (hEdma & 0x00FF0000)>>16;

  #if (C64_SUPPORT)
    if (chaNum < 32) EDMA_RSET(ESRL,1<<chaNum);
    else EDMA_RSET(ESRH,1<<(chaNum-32));
  #else
    EDMA_RSET(ESR,1<<chaNum);
  #endif
}
/*----------------------------------------------------------------------------*/
IDEF Uint32 EDMA_getChannel(EDMA_Handle hEdma) {

  int chaNum = (hEdma & 0x00FF0000)>>16;

  #if (C64_SUPPORT)
    if (chaNum < 32) return (Uint32)((EDMA_RGET(ERL) & (1<<chaNum))==1);
    else return (Uint32)((EDMA_RGET(ERH) & (1<<(chaNum-32)))==1);
  #else
    return (Uint32)((EDMA_RGET(ER) & (1<<chaNum))==1);
  #endif
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_clearChannel(EDMA_Handle hEdma) {

  int chaNum = (hEdma & 0x00FF0000)>>16;

  #if (C64_SUPPORT)
    if (chaNum < 32) EDMA_RSET(ECRL,1<<chaNum);
    else EDMA_RSET(ECRH,1<<(chaNum-32));
  #else
    EDMA_RSET(ECR,1<<chaNum);
  #endif
}
/*----------------------------------------------------------------------------*/
#if (C64_SUPPORT)
IDEF void   EDMA_setEvtPolarity(EDMA_Handle hEdma,int polarity) {

    int chaNum = (hEdma & 0x00FF0000)>>16;

  #if (C64_SUPPORT)
    if (chaNum < 32) EDMA_RSET(EPRL,polarity<<chaNum);
    else EDMA_RSET(EPRH,polarity<<(chaNum-32));
  #endif
}
#endif
/*----------------------------------------------------------------------------*/
IDEF Uint32 EDMA_getTableAddress(EDMA_Handle hEdma) {

  return (hEdma&0x0000FFFF)+_EDMA_PRAM_START;
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_intEnable(Uint32 tccIntNum) {
  int gie;

  gie = IRQ_globalDisable();

  #if (C64_SUPPORT)
    if (tccIntNum < 32) EDMA_RSET(CIERL,EDMA_RGET(CIERL) | (1<<tccIntNum));
    else EDMA_RSET(CIERH,EDMA_RGET(CIERH) | (1<<(tccIntNum-32)));
  #else
    EDMA_RSET(CIER,EDMA_RGET(CIER) | (1<<tccIntNum));
  #endif

  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_intDisable(Uint32 tccIntNum) {
  int gie;

  gie = IRQ_globalDisable();

  #if (C64_SUPPORT)
    if (tccIntNum < 32) EDMA_RSET(CIERL,EDMA_RGET(CIERL) & ~(1<<tccIntNum));
    else EDMA_RSET(CIERH,EDMA_RGET(CIERH) & ~(1<<(tccIntNum-32)));
  #else
    EDMA_RSET(CIER,EDMA_RGET(CIER) & ~(1<<tccIntNum));
  #endif

  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_intClear(Uint32 tccIntNum) {

  #if (C64_SUPPORT)
    if (tccIntNum < 32) EDMA_RSET(CIPRL,1<<tccIntNum);
    else EDMA_RSET(CIPRH,1<<(tccIntNum-32));
  #else
    EDMA_RSET(CIPR,1<<tccIntNum);
  #endif
}
/*----------------------------------------------------------------------------*/
IDEF Uint32 EDMA_intTest(Uint32 tccIntNum) {

  #if (C64_SUPPORT)
    if (tccIntNum < 32) return ((EDMA_RGET(CIPRL) & (1<<tccIntNum)) ? 1 : 0);
    else return ((EDMA_RGET(CIPRH) & (1<<(tccIntNum-32))) ? 1 : 0);
  #else
    return ((EDMA_RGET(CIPR) & (1<<tccIntNum)) ? 1 : 0);
  #endif
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_intReset(Uint32 tccIntNum) {
  int gie;

  gie = IRQ_globalDisable();

  /* disable then clear interrupt */
  #if (C64_SUPPORT)
    if (tccIntNum < 32) {
      EDMA_RSET(CIERL,EDMA_RGET(CIERL) & ~(1<<tccIntNum));
      EDMA_RSET(CIPRL,1<<tccIntNum);
    } else {
      EDMA_RSET(CIERH,EDMA_RGET(CIERH) & ~(1<<(tccIntNum-32)));
      EDMA_RSET(CIPRH,1<<(tccIntNum-32));
    }
  #else
    EDMA_RSET(CIER,EDMA_RGET(CIER) & ~(1<<tccIntNum));
    EDMA_RSET(CIPR,1<<tccIntNum);
  #endif
  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_intResetAll() {

  int gie = IRQ_globalDisable();
  /* disable then clear all interrupts */

  #if (C64_SUPPORT)
    EDMA_RSET(CIERL, 0x00000000);
    EDMA_RSET(CIERH, 0x00000000);
    EDMA_RSET(CIPRL, 0xFFFFFFFF);
    EDMA_RSET(CIPRH, 0xFFFFFFFF);
  #else
    EDMA_RSET(CIER, 0x00000000);
    EDMA_RSET(CIPR, 0xFFFFFFFF);
  #endif

  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_link(EDMA_Handle parent, EDMA_Handle child) {
  EDMA_FSETH(parent,RLD,LINK,child);
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_config(EDMA_Handle hEdma, EDMA_Config *config) {

  Uint32 gie;
  volatile Uint32 *base;
  register Uint32 x0,x1,x2,x3,x4,x5;

/* Test if QDMA handle was passed with CCS 1.2 */
 if ( hEdma == (0x20000000) || hEdma == (0x10000000)) {
        EDMA_qdmaConfig(config);
 }else{

  gie = IRQ_globalDisable();

  x0 = config->opt;
  x1 = config->src;
  x2 = config->cnt;
  x3 = config->dst;
  x4 = config->idx;
  x5 = config->rld;

  base = (volatile Uint32 *)((hEdma&0x0000FFFF)+_EDMA_PRAM_START);
  base[_EDMA_OPT_OFFSET] = 0x00000000;
  base[_EDMA_SRC_OFFSET] = x1;
  base[_EDMA_CNT_OFFSET] = x2;
  base[_EDMA_DST_OFFSET] = x3;
  base[_EDMA_IDX_OFFSET] = x4;
  base[_EDMA_RLD_OFFSET] = x5;
  base[_EDMA_OPT_OFFSET] = x0;
  IRQ_globalRestore(gie);
  }
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_configArgs(EDMA_Handle hEdma, Uint32 opt, Uint32 src,
  Uint32 cnt, Uint32 dst, Uint32 idx, Uint32 rld) {

  Uint32 gie;
  volatile Uint32 *base;
 /* Test if QDMA handle was passed with CCS 1.2 */
 if ( hEdma == (0x20000000) || hEdma == (0x10000000)) {
        EDMA_qdmaConfigArgs(opt, src, cnt, dst, idx);
 }else{
  gie = IRQ_globalDisable();
  base = (volatile Uint32*)((hEdma&0x0000FFFF)+_EDMA_PRAM_START);
  base[_EDMA_OPT_OFFSET] = 0x00000000;
  base[_EDMA_SRC_OFFSET] = src;
  base[_EDMA_CNT_OFFSET] = cnt;
  base[_EDMA_DST_OFFSET] = dst;
  base[_EDMA_IDX_OFFSET] = idx;
  base[_EDMA_RLD_OFFSET] = rld;
  base[_EDMA_OPT_OFFSET] = opt;
  IRQ_globalRestore(gie);
 }
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_getConfig(EDMA_Handle hEdma, EDMA_Config *config) {

  Uint32 gie;
  volatile Uint32 *base;
  register Uint32 x0,x1,x2,x3,x4,x5;

  gie = IRQ_globalDisable();

  base = (volatile Uint32 *)((hEdma&0x0000FFFF)+_EDMA_PRAM_START);
  x0 = base[_EDMA_OPT_OFFSET];
  x1 = base[_EDMA_SRC_OFFSET];
  x2 = base[_EDMA_CNT_OFFSET];
  x3 = base[_EDMA_DST_OFFSET];
  x4 = base[_EDMA_IDX_OFFSET];
  x5 = base[_EDMA_RLD_OFFSET];

  config->opt = x0;
  config->src = x1;
  config->cnt = x2;
  config->dst = x3;
  config->idx = x4;
  config->rld = x5;

  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_qdmaConfig(EDMA_Config *config) {

  Uint32 gie;
  volatile Uint32 *base;
  register Uint32 x0,x1,x2,x3,x4;

  gie = IRQ_globalDisable();

  x0 = config->opt;
  x1 = config->src;
  x2 = config->cnt;
  x3 = config->dst;
  x4 = config->idx;

  base = (volatile Uint32 *)(_EDMA_QOPT_ADDR);
  base[_EDMA_QSRC_OFFSET]  = x1;
  base[_EDMA_QCNT_OFFSET]  = x2;
  base[_EDMA_QDST_OFFSET]  = x3;
  base[_EDMA_QIDX_OFFSET]  = x4;
  base[_EDMA_QSOPT_OFFSET] = x0;

  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_qdmaConfigArgs(Uint32 opt, Uint32 src, Uint32 cnt, Uint32 dst,
  Uint32 idx) {

  Uint32 gie;
  volatile Uint32 *base;

  gie = IRQ_globalDisable();

  base = (volatile Uint32*)(_EDMA_QOPT_ADDR);
  base[_EDMA_QSRC_OFFSET]  = src;
  base[_EDMA_QCNT_OFFSET]  = cnt;
  base[_EDMA_QDST_OFFSET]  = dst;
  base[_EDMA_QIDX_OFFSET]  = idx;
  base[_EDMA_QSOPT_OFFSET] = opt;

  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
IDEF void EDMA_qdmaGetConfig(EDMA_Config *config) {

  Uint32 gie;
  volatile Uint32 *base;
  volatile EDMA_Config* cfg = (volatile EDMA_Config*)config;
  register Uint32 x0,x1,x2,x3,x4;

  gie = IRQ_globalDisable();

  base = (volatile Uint32 *)(_EDMA_QOPT_ADDR);
  x0 = base[_EDMA_QOPT_OFFSET];
  x1 = base[_EDMA_QSRC_OFFSET];
  x2 = base[_EDMA_QCNT_OFFSET];
  x3 = base[_EDMA_QDST_OFFSET];
  x4 = base[_EDMA_QIDX_OFFSET];

  cfg->opt = x0;
  cfg->src = x1;
  cfg->cnt = x2;
  cfg->dst = x3;
  cfg->idx = x4;
  cfg->rld = 0x00000000;

  IRQ_globalRestore(gie);
}
/*----------------------------------------------------------------------------*/
#endif /* USEDEFS */


#endif /* EDMA_SUPPORT */
#endif /* _CSL_EDMA_H_ */
/******************************************************************************\
* End of csl_edma.h
\******************************************************************************/