📄 csl_mcasp.h
字号:
/******************************************************************************\
* Copyright (C) 1999-2002 Texas Instruments Incorporated.
* All Rights Reserved
*------------------------------------------------------------------------------
* FILENAME...... csl_mcasp.h
* DATE CREATED.. 08/10/2001
* LAST MODIFIED. 02/25/2002 _write32, write32Cfg, read32, read32Cfg
* 02/14/2002 _getRbufAddrCfg()/_getXbufAddrCfg()
* MCASP_XBUFx / MCASP_RBUFx macros
*
\******************************************************************************/
#ifndef _CSL_MCASP_H_
#define _CSL_MCASP_H_
#include <csl_chip.h>
#include <csl_irq.h>
#include <csl_mcasphal.h>
#if (MCASP_SUPPORT)
/******************************************************************************\
* scope and inline control macros
\******************************************************************************/
#ifdef __cplusplus
#define CSLAPI extern "C" far
#else
#define CSLAPI extern far
#endif
#undef USEDEFS
#undef IDECL
#undef IDEF
#ifdef _MCASP_MOD_
#define IDECL CSLAPI
#define USEDEFS
#define IDEF
#else
#ifdef _INLINE
#define IDECL static inline
#define USEDEFS
#define IDEF static inline
#else
#define IDECL CSLAPI
#endif
#endif
/******************************************************************************\
* global macro declarations
\******************************************************************************/
/* MCASP_open() flags */
#define MCASP_OPEN_RESET (0x00000001)
/* device identifiers for MCASP_open() */
#define MCASP_DEV0 (0)
#if (_MCASP_PORT_CNT == 2)
#define MCASP_DEV1 (1)
#endif
/* device identifiers for MCASP_open() */
#define MCASP_PORT0 MCASP_DEV0
#if (_MCASP_PORT_CNT == 2)
#define MCASP_PORT1 MCASP_DEV1
#endif
/* select DIT vs. TDM mode */
#define MCASP_XMT_DIT 1
#define MCASP_XMT_TDM 0
/* direction = (transmitter only) MCASP_XMT or (receiver only) MCASP_RCV */
/* or (both) MCASP_RCVXMT / MCASP_XMTRCV */
#define MCASP_RCV 1
#define MCASP_XMT 2
#define MCASP_RCVXMT 3
#define MCASP_XMTRCV 3
/* Mode for clk */
#define MCASP_CLK_ASYNC 1
#define MCASP_CLK_SYNC 0
/* define DSP representation */
//#define MCASP_DSP_INTEGER 0
//#define MCASP_DSP_Q31 1
/* define Mode BURST or TDM for format*/
#define MCASP_MODE_BURST 0
#define MCASP_MODE_TDM 1
/* define Mode MSB/LSB first */
#define MCASP_FORMAT_LSB 0
#define MCASP_FORMAT_MSB 1
/* define Align */
#define MCASP_FORMAT_LEFT 0
#define MCASP_FORMAT_RIGHT 1
/* Address Incrementation */
#define MCASP_XBUF_BUFSIZE 4
#define MCASP_RBUF_BUFSIZE 4
#define MCASP_DITCSR_NUMCHANNELS 6
#define MCASP_DITCSR_BUFSIZE 4
#define MCASP_DITCSR_RIGHT_OFFSET (MCASP_DITCSR_BUFSIZE*MCASP_DITCSR_NUMCHANNELS)
#define MCASP_DITUDR_NUMCHANNELS 6
#define MCASP_DITUDR_BUFSIZE 4
#define MCASP_DITUDR_RIGHT_OFFSET (MCASP_DITUDR_BUFSIZE*MCASP_DITUDR_NUMCHANNELS)
/* Status clear */
#define MCASP_RSTAT_ROVRN 0
#define MCASP_RSTAT_RSYNCERR 1
#define MCASP_RSTAT_RCKFAIL 2
#define MCASP_RSTAT_REVENSLOT 3
#define MCASP_RSTAT_RLAST 4
#define MCASP_RSTAT_RDATA 5
#define MCASP_RSTAT_RSTAFRM 6
#define MCASP_RSTAT_RDMAERR 7
#define MCASP_RSTAT_RERR 8
#define MCASP_XSTAT_XUNDRN 0
#define MCASP_XSTAT_XSYNCERR 1
#define MCASP_XSTAT_XCKFAIL 2
#define MCASP_XSTAT_XEVENSLOT 3
#define MCASP_XSTAT_XLAST 4
#define MCASP_XSTAT_XDATA 5
#define MCASP_XSTAT_XSTAFRM 6
#define MCASP_XSTAT_XDMAERR 7
#define MCASP_XSTAT_XERR 8
#define MCASP_XBUF0 0
#define MCASP_XBUF1 1
#define MCASP_XBUF2 2
#define MCASP_XBUF3 3
#define MCASP_XBUF4 4
#define MCASP_XBUF5 5
#define MCASP_XBUF6 6
#define MCASP_XBUF7 7
#if (_MCASP_CHANNEL_CNT == 16)
#define MCASP_XBUF8 8
#define MCASP_XBUF9 9
#define MCASP_XBUF10 10
#define MCASP_XBUF11 11
#define MCASP_XBUF12 12
#define MCASP_XBUF13 13
#define MCASP_XBUF14 14
#define MCASP_XBUF15 15
#endif
#define MCASP_RBUF0 0
#define MCASP_RBUF1 1
#define MCASP_RBUF2 2
#define MCASP_RBUF3 3
#define MCASP_RBUF4 4
#define MCASP_RBUF5 5
#define MCASP_RBUF6 6
#define MCASP_RBUF7 7
#if (_MCASP_CHANNEL_CNT == 16)
#define MCASP_RBUF8 8
#define MCASP_RBUF9 9
#define MCASP_RBUF10 10
#define MCASP_RBUF11 11
#define MCASP_RBUF12 12
#define MCASP_RBUF13 13
#define MCASP_RBUF14 14
#define MCASP_RBUF15 15
#endif
/******************************************************************************\
* global typedef declarations
\******************************************************************************/
typedef enum {
MCASP_DSP_INTEGER = 0,
MCASP_DSP_Q31 = 1
} MCASP_Dsprep;
/* device handle object */
typedef struct {
Uint32 allocated;
Uint32 xmtEventId;
Uint32 rcvEventId;
volatile Uint32 *baseAddr;
Uint32 xbufAddr;
Uint32 xbufAddrCfg;
Uint32 rbufAddr;
Uint32 rbufAddrCfg;
Uint32 ditcsrAddr;
Uint32 ditudrAddr;
} MCASP_Obj, *MCASP_Handle;
/* device configuration structure */
typedef struct {
Uint32 pfunc;
Uint32 pdir;
Uint32 ditctl;
Uint32 dlbctl;
Uint32 amute;
} MCASP_ConfigGbl;
typedef struct {
Uint32 rmask;
Uint32 rfmt;
Uint32 afsrctl;
Uint32 aclkrctl;
Uint32 ahclkrctl;
Uint32 rtdm;
Uint32 rintctl;
Uint32 rclkchk;
} MCASP_ConfigRcv;
typedef struct {
Uint32 xmask;
Uint32 xfmt;
Uint32 afsxctl;
Uint32 aclkxctl;
Uint32 ahclkxctl;
Uint32 xtdm;
Uint32 xintctl;
Uint32 xclkchk;
} MCASP_ConfigXmt;
#if (_MCASP_CHANNEL_CNT == 16)
typedef struct {
Uint32 srctl0;
Uint32 srctl1;
Uint32 srctl2;
Uint32 srctl3;
Uint32 srctl4;
Uint32 srctl5;
Uint32 srctl6;
Uint32 srctl7;
Uint32 srctl8;
Uint32 srctl9;
Uint32 srctl10;
Uint32 srctl11;
Uint32 srctl12;
Uint32 srctl13;
Uint32 srctl14;
Uint32 srctl15;
} MCASP_ConfigSrctl;
#else
typedef struct {
Uint32 srctl0;
Uint32 srctl1;
Uint32 srctl2;
Uint32 srctl3;
Uint32 srctl4;
Uint32 srctl5;
Uint32 srctl6;
Uint32 srctl7;
} MCASP_ConfigSrctl;
#endif /* _MCASP_CHANNEL_CNT == 16 */
typedef struct {
MCASP_ConfigGbl *global;
MCASP_ConfigRcv *receive;
MCASP_ConfigXmt *transmit;
MCASP_ConfigSrctl *srctl;
} MCASP_Config;
/* Parameter Clock Control : ACLKXCTL - ACLKRCTL */
typedef struct {
Uint32 syncmode; /* Async 0 /1 : ACLKXCTL */
Uint32 xclksrc; /* Xmt clock source */
Uint32 xclkpol; /* Xmt clock polarity */
Uint32 xclkdiv; /* Xmt clock div */
Uint32 rclksrc; /* Rcv clock source */
Uint32 rclkpol; /* Rcv clock polarity */
Uint32 rclkdiv; /* Rcv clock div */
}MCASP_SetupClk;
/* Parameter High- Freq Clock Control : AHCLKXCTL - AHCLKRCTL */
typedef struct {
Uint32 xhclksrc; /* Xmt clock source */
Uint32 xhclkpol; /* Xmt clock polarity */
Uint32 xhclkdiv; /* Xmt clock div */
Uint32 rhclksrc; /* Rcv clock source */
Uint32 rhclkpol; /* Rcv clock polarity */
Uint32 rhclkdiv; /* Rcv clock div */
}MCASP_SetupHclk;
/* Parameter Frame Sync Control : AFSXCTL - AFSRCTL */
typedef struct {
Uint32 xmode; /* TDM - BURST : FSXMOD - AFSXCTL reg */
Uint32 xslotsize; /* slots# for TDM: FSXMOD - AFSXCTL reg */
Uint32 xfssrc; /* Internal/External AFSXE - AFSXCTL reg */
Uint32 xfspol; /* Xmt clock polarity FSXPOL - AFSXCTL reg */
Uint32 fxwid; /* Xmt Frame Duration FXWID - AFSXCTL reg */
Uint32 rmode; /* TDM - BURST FSRMOD - AFSRCTL reg */
Uint32 rslotsize; /* slots# for TDM */
Uint32 rfssrc; /* Rcv Internal/External AFSRE - AFSRCTL reg */
Uint32 rfspol; /* Rcv clock polarity FSRPOL- AFSRCTL reg */
Uint32 frwid; /* Rcv Frame Duration FRWID - AFSRCTL reg */
}MCASP_SetupFsync;
/* Parameters Data Stream Format: XFMT - RFMT */
typedef struct {
Uint32 xbusel; /* DAT / CFG bus */
MCASP_Dsprep xdsprep; /* DSP representation :Q31/Integer */
Uint32 xslotsize; /* 8-32bits TXSSZ field - XFMT reg */
Uint32 xwordsize; /* rotation right */
Uint32 xalign; /* Left/Right Aligned */
Uint32 xpad; /* Pad value for extra bits */
Uint32 xpbit; /* which bit to pad the extra bits */
Uint32 xorder; /* MSB/LSB XRVRS field - XFMT reg */
Uint32 xdelay; /* Bit delay - XFMT reg */
Uint32 rbusel; /* DAT / CFG bus */
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -