m3s066ct.v

这是16位定点dsp源代码。已仿真和综合过了

//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1998.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//These deliverables may be used for the purpose of making silicon for one  //
//IC design only.  No further use of these deliverables for the purpose of  //
//making silicon from an IC design is permitted without the payment of an   //
//additional license fee.  See your license agreement with Mentor Graphics  //
//for further details.  If you have further questions please contact        //
//Mentor Graphics Customer Support.                                         //
//                                                                          //
//This Mentor Graphics core (m320c50eng v1999.010) was extracted on         //
//workstation hostid 800059c1 Inventra                                      //
// 25-bit Fast Look-Ahead Adder
// Copyright Mentor Graphics Corporation and Licensors 1998.  
// V1.002

// m3s0066ct
// M320C50 25-bit Fast Look-Ahead Adder

module m3s066ct ( PO[31:7], AI, BI);
//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1998.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//These deliverables may be used for the purpose of making silicon for one  //
//IC design only.  No further use of these deliverables for the purpose of  //
//making silicon from an IC design is permitted without the payment of an   //
//additional license fee.  See your license agreement with Mentor Graphics  //
//for further details.  If you have further questions please contact        //
//Mentor Graphics Customer Support.                                         //
//                                                                          //
//This Mentor Graphics core (m320c50eng v1999.010) was extracted on         //
//workstation hostid 800059c1 Inventra                                      //
  input  [24:0] AI, BI;
  output [31:7] PO;

  reg [24:0] NG, NP, P;
  wire [5:0] NGC;
  wire [5:1] NPC;
  wire NC8, NC12, NC16, NC20, NC24;
  
// first generate propagate and genrate terms
always @(AI or BI or NP)
begin
    NG = ~(AI & BI);
    NP = ~(AI | BI);
    P = ~NP;
end

// now combine them
assign NGC[0] = (NG[0] & NG[1] & NG[2] & NG[3]) |
                (NG[1] & NG[2] & NG[3] & NP[1]) |
		(NG[2] & NG[3] & NP[2]) |
		(NG[3] & NP[3]);

// blocks for higher nibbles (0 is above)
m3s067ct U1(NGC[1], NPC[1], NG[7:4], NP[7:5], P[7:4]);
m3s067ct U2(NGC[2], NPC[2], NG[11:8], NP[11:9], P[11:8]);
m3s067ct U3(NGC[3], NPC[3], NG[15:12], NP[15:13], P[15:12]);
m3s067ct U4(NGC[4], NPC[4], NG[19:16], NP[19:17], P[19:16]);
m3s067ct U5(NGC[5], NPC[5], NG[23:20], NP[23:21], P[23:20]);

// generate carrys
assign NC8 = !(!(NGC[0] & NGC[1]) & !(NPC[1] & NGC[1]));
assign NC12 = !(!(NGC[0] & NGC[1] & NGC[2]) & !(NGC[1] & NGC[2] & NPC[1]) &
                !(NGC[2] & NPC[2]));
assign NC16 = !(!(NGC[0] & NGC[1] & NGC[2] & NGC[3]) &
                !(NGC[1] & NGC[2] & NGC[3] & NPC[1]) &
                !(NGC[2] & NGC[3] & NPC[2]) &
		!(NGC[3] & NPC[3]));		
assign NC20 = !(!(NGC[4] & NC16) & !(NPC[4] & NGC[4]));
assign NC24 = !(!(NGC[4] & NGC[5] & NC16) & !(NGC[4] & NGC[5] & NPC[4]) &
                !(NGC[5] & NPC[5]));

m3s065ct U6(PO[10:7], NG[3:0], NP[1], NP[2], P[3:0]);
m3s068ct U7(PO[14:11], NGC[0], NG[7:4], NP[4], NP[5], P[7:4]);
m3s068ct U8(PO[18:15], NC8, NG[11:8], NP[8], NP[9], P[11:8]);
m3s068ct U9(PO[22:19], NC12, NG[15:12], NP[12], NP[13], P[15:12]);
m3s068ct U10(PO[26:23], NC16, NG[19:16], NP[16], NP[17], P[19:16]);
m3s068ct U11(PO[30:27], NC20, NG[23:20], NP[20], NP[21], P[23:20]);

// generate top bit
assign PO[31] = ~(P[24] & NG[24]) ^ NC24;

endmodule