📄 m3s032ct.v
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//******************************************************************* ////IMPORTANT NOTICE ////================ ////Copyright Mentor Graphics Corporation 1996 - 1998. All rights reserved. ////This file and associated deliverables are the trade secrets, ////confidential information and copyrighted works of Mentor Graphics ////Corporation and its licensors and are subject to your license agreement ////with Mentor Graphics Corporation. //// ////These deliverables may be used for the purpose of making silicon for one ////IC design only. No further use of these deliverables for the purpose of ////making silicon from an IC design is permitted without the payment of an ////additional license fee. See your license agreement with Mentor Graphics ////for further details. If you have further questions please contact ////Mentor Graphics Customer Support. //// ////This Mentor Graphics core (m320c50eng v1999.010) was extracted on ////workstation hostid 800059c1 Inventra //// TDM Receiver Address// Copyright Mentor Graphics Corporation and Licensors 1998.// V1.003// m3s032ct// M320C50 TDM port receiver address.// Detect TDM receive slotmodule m3s032ct (RxReset, TDM, RxClock, TxClock, RxAddr, RxCount,//******************************************************************* ////IMPORTANT NOTICE ////================ ////Copyright Mentor Graphics Corporation 1996 - 1998. All rights reserved. ////This file and associated deliverables are the trade secrets, ////confidential information and copyrighted works of Mentor Graphics ////Corporation and its licensors and are subject to your license agreement ////with Mentor Graphics Corporation. //// ////These deliverables may be used for the purpose of making silicon for one ////IC design only. No further use of these deliverables for the purpose of ////making silicon from an IC design is permitted without the payment of an ////additional license fee. See your license agreement with Mentor Graphics ////for further details. If you have further questions please contact ////Mentor Graphics Customer Support. //// ////This Mentor Graphics core (m320c50eng v1999.010) was extracted on ////workstation hostid 800059c1 Inventra // TFSR, TDMRxValid, TRADSave); input RxReset, TDM, RxClock, TxClock, TFSR; input [7:0] RxAddr; input [3:0] RxCount; output TDMRxValid; output [7:0] TRADSave; reg [7:0] TRADSave, TADDSR; reg TDMRxValid, RxEnd; reg AddComp;//// Rx enable////******************************************// A0-A7 are sampled on posgedge of clock//******************************************//// Save last received address//always @(negedge RxClock or negedge RxReset) if (~RxReset) TRADSave <= 8'b0; else if (RxEnd) TRADSave <= TADDSR;//// Rx address compare, generate Rx valid flag//always @(negedge RxClock or negedge RxReset) if (~RxReset) TDMRxValid <= 0; else if (RxEnd) TDMRxValid <= AddComp & TDM;//// Rx Address shift register//always @(posedge TxClock) TADDSR <= {(TFSR & TDM),TADDSR[7:1]};//// RxEnd generation//always @(RxCount)begin RxEnd = (RxCount == 7);endalways @(TADDSR or RxAddr)begin AddComp = (TADDSR[0] & RxAddr[0]) | (TADDSR[1] & RxAddr[1]) | (TADDSR[2] & RxAddr[2]) | (TADDSR[3] & RxAddr[3]) | (TADDSR[4] & RxAddr[4]) | (TADDSR[5] & RxAddr[5]) | (TADDSR[6] & RxAddr[6]) | (TADDSR[7] & RxAddr[7]);endendmodule⌨️ 快捷键说明
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