m3s076ct.v

这是16位定点dsp源代码。已仿真和综合过了

//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1998.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//These deliverables may be used for the purpose of making silicon for one  //
//IC design only.  No further use of these deliverables for the purpose of  //
//making silicon from an IC design is permitted without the payment of an   //
//additional license fee.  See your license agreement with Mentor Graphics  //
//for further details.  If you have further questions please contact        //
//Mentor Graphics Customer Support.                                         //
//                                                                          //
//This Mentor Graphics core (m320c50eng v1999.010) was extracted on         //
//workstation hostid 800059c1 Inventra                                      //
// 4-bit Slice Generate Sum
// Copyright Mentor Graphics Corporation and Licensors 1998. 
// V1.001

// m3s076cy.v
// M320C50 4-bit Slice Generate Sum
// 4-bit sum generated from carry generate/propagate inputs

module m3s076ct (PP, PC, C_S, SUM);
//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1998.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//These deliverables may be used for the purpose of making silicon for one  //
//IC design only.  No further use of these deliverables for the purpose of  //
//making silicon from an IC design is permitted without the payment of an   //
//additional license fee.  See your license agreement with Mentor Graphics  //
//for further details.  If you have further questions please contact        //
//Mentor Graphics Customer Support.                                         //
//                                                                          //
//This Mentor Graphics core (m320c50eng v1999.010) was extracted on         //
//workstation hostid 800059c1 Inventra                                      //

  input [3:0] PP; // input partial products
  input [2:0] PC; // input partial carrys
  input C_S; // input carry for this slice
  
  output [3:0] SUM; // output result!

  reg [3:0] SUM;

always @(PP or PC or C_S)
begin
  SUM[0] = C_S ^ PP[0];
  SUM[1] = ((C_S & PP[0]) | PC[0]) ^ PP[1];
  SUM[2] = ((C_S & PP[0] & PP[1]) | (PC[0] & PP[1]) | PC[1]) ^ PP[2];
  SUM[3] = ((C_S & PP[0] & PP[1] & PP[2]) | (PC[0] & PP[1] & PP[2]) |
            (PC[1] & PP[2]) | PC[2]) ^ PP[3];
end
	    
endmodule