📄 m3s022ct.v
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//******************************************************************* ////IMPORTANT NOTICE ////================ ////Copyright Mentor Graphics Corporation 1996 - 1998. All rights reserved. ////This file and associated deliverables are the trade secrets, ////confidential information and copyrighted works of Mentor Graphics ////Corporation and its licensors and are subject to your license agreement ////with Mentor Graphics Corporation. //// ////These deliverables may be used for the purpose of making silicon for one ////IC design only. No further use of these deliverables for the purpose of ////making silicon from an IC design is permitted without the payment of an ////additional license fee. See your license agreement with Mentor Graphics ////for further details. If you have further questions please contact ////Mentor Graphics Customer Support. //// ////This Mentor Graphics core (m320c50eng v1999.010) was extracted on ////workstation hostid 800059c1 Inventra //// Interrupt Generator// Copyright Mentor Graphics Corporation and Licensors 1998.// V1.005// m3s022ct// M320C50 Interrupt Generator.// Serial port interrupts (RINT, XINT, TRNT, TXNT)// are active high. All interrupts are delayed by one clock cycle.//// Assigns the following interrupts:// 0 : RINT// 1 : XINT// 2 : TRNT// 3 : TXNT//module m3s022ct (Reset, Clock, RINT, XINT, TRNT, TXNT, SPIntr);//******************************************************************* ////IMPORTANT NOTICE ////================ ////Copyright Mentor Graphics Corporation 1996 - 1998. All rights reserved. ////This file and associated deliverables are the trade secrets, ////confidential information and copyrighted works of Mentor Graphics ////Corporation and its licensors and are subject to your license agreement ////with Mentor Graphics Corporation. //// ////These deliverables may be used for the purpose of making silicon for one ////IC design only. No further use of these deliverables for the purpose of ////making silicon from an IC design is permitted without the payment of an ////additional license fee. See your license agreement with Mentor Graphics ////for further details. If you have further questions please contact ////Mentor Graphics Customer Support. //// ////This Mentor Graphics core (m320c50eng v1999.010) was extracted on ////workstation hostid 800059c1 Inventra // input Reset, Clock; input RINT, XINT, TRNT, TXNT; output [3:0] SPIntr; reg [1:0] XINTSample, TXNTSample, RINTSample, TRNTSample; reg RINTEdge, XINTEdge, TRNTEdge, TXNTEdge; reg [3:0] SPIntr;// Serial port interruptsalways @(posedge Clock or posedge Reset)if (Reset)begin RINTSample <= 0; XINTSample <= 0; TRNTSample <= 0; TXNTSample <= 0;endelsebegin RINTSample <= {~RINTSample[0],RINT}; XINTSample <= {~XINTSample[0],XINT}; TRNTSample <= {~TRNTSample[0],TRNT}; TXNTSample <= {~TXNTSample[0],TXNT};endalways @(RINTSample) RINTEdge = RINTSample[0] & RINTSample[1];always @(XINTSample) XINTEdge = XINTSample[0] & XINTSample[1];always @(TRNTSample) TRNTEdge = TRNTSample[0] & TRNTSample[1];always @(TXNTSample) TXNTEdge = TXNTSample[0] & TXNTSample[1];// Assign interruptsalways @(RINTEdge or XINTEdge or TRNTEdge or TXNTEdge) SPIntr = {TXNTEdge, TRNTEdge, XINTEdge, RINTEdge};endmodule⌨️ 快捷键说明
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