m3s074ct.v

这是16位定点dsp源代码。已仿真和综合过了

//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1998.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//These deliverables may be used for the purpose of making silicon for one  //
//IC design only.  No further use of these deliverables for the purpose of  //
//making silicon from an IC design is permitted without the payment of an   //
//additional license fee.  See your license agreement with Mentor Graphics  //
//for further details.  If you have further questions please contact        //
//Mentor Graphics Customer Support.                                         //
//                                                                          //
//This Mentor Graphics core (m320c50eng v1999.010) was extracted on         //
//workstation hostid 800059c1 Inventra                                      //
// 32-bit Partial Sum and Partial Carry Generator
// Copyright Mentor Graphics Corporation and Licensors 1998.
// V1.002

// m3s074ct
// M320C50 32-bit Partial Sum and Partial Carry Generator
// Generate bitwise sum and carry outputs

module m3s074ct (A, NA, B, NB, Control, PartialSum, PartialCarry);
//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1998.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//These deliverables may be used for the purpose of making silicon for one  //
//IC design only.  No further use of these deliverables for the purpose of  //
//making silicon from an IC design is permitted without the payment of an   //
//additional license fee.  See your license agreement with Mentor Graphics  //
//for further details.  If you have further questions please contact        //
//Mentor Graphics Customer Support.                                         //
//                                                                          //
//This Mentor Graphics core (m320c50eng v1999.010) was extracted on         //
//workstation hostid 800059c1 Inventra                                      //

  input [31:0] A, B, NA, NB; // input operands and their inverses
  input  [5:0] Control;
  output [31:0] PartialCarry, PartialSum;

  reg [31:0] PartialSum, PartialCarry;

  integer i;

always @(A or B or NA or NB or Control)
begin
    for (i=0;i<32;i=i+1)
    begin
        PartialSum[i] = ((NA[i] & NB[i] & Control[0]) |
                         (NA[i] & B[i] & Control[1]) |
	                 (A[i] & B[i] & Control[2]) |
	                 (A[i] & NB[i] & Control[3]));
        PartialCarry[i] = ((A[i] & B[i] & Control[4]) |
	                   (A[i] & NB[i] & Control[5]));
    end
end
	    
endmodule