m3s069ct.v

这是16位定点dsp源代码。已仿真和综合过了

//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1998.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//These deliverables may be used for the purpose of making silicon for one  //
//IC design only.  No further use of these deliverables for the purpose of  //
//making silicon from an IC design is permitted without the payment of an   //
//additional license fee.  See your license agreement with Mentor Graphics  //
//for further details.  If you have further questions please contact        //
//Mentor Graphics Customer Support.                                         //
//                                                                          //
//This Mentor Graphics core (m320c50eng v1999.010) was extracted on         //
//workstation hostid 800059c1 Inventra                                      //
// 16-bit Signed (selectable) Multiplier
// Copyright Mentor Graphics Corporation and Licensors 1998. 
// V1.003

// m3s069ct
// M320C50 16-bit Signed (selectable) Multiplier 
// Note: this requires tight timing constraints to be synthesised correctly.

// PO is the product
// AI and BI are the multiplicands
// BM controls whether the operation is signed or unsigned (1,0 respectively)

module m3s069ct (PO, AI, BI, BM);
//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1998.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//These deliverables may be used for the purpose of making silicon for one  //
//IC design only.  No further use of these deliverables for the purpose of  //
//making silicon from an IC design is permitted without the payment of an   //
//additional license fee.  See your license agreement with Mentor Graphics  //
//for further details.  If you have further questions please contact        //
//Mentor Graphics Customer Support.                                         //
//                                                                          //
//This Mentor Graphics core (m320c50eng v1999.010) was extracted on         //
//workstation hostid 800059c1 Inventra                                      //
  input  [15:0] AI, BI;
  input BM;
  
  output [31:0] PO;

  wire NBM;
  wire [15:0] NA, NB;
  wire [255:0] PPI;
  reg [256:0] PP;
  wire [181:0] QQ;
  wire [132:0] RR;
  wire [98:0] SS;
  wire [76:0] TT;
  wire [61:0] UU;
  wire [55:0] VV;
  reg [24:0] ALUA, ALUB;
  wire [47:0] TOP_VV;
  wire [4:0] C_AT;
  
  integer  l;
  			   
// buffers for sign control
assign NBM = ~BM;

// buffers for databus
assign NA = ~AI;
assign NB = ~BI;

// Partial Product generators
m3s063ct U3 (PPI[15:0], NA[0], NB, NBM);
m3s063ct U4 (PPI[31:16], NA[1], NB, NBM);
m3s063ct U5 (PPI[47:32], NA[2], NB, NBM);
m3s063ct U6 (PPI[63:48], NA[3], NB, NBM);
m3s063ct U7 (PPI[79:64], NA[4], NB, NBM);
m3s063ct U8 (PPI[95:80], NA[5], NB, NBM);
m3s063ct U9 (PPI[111:96], NA[6], NB, NBM);
m3s063ct U10 (PPI[127:112], NA[7], NB, NBM);
m3s063ct U11 (PPI[143:128], NA[8], NB, NBM);
m3s063ct U12 (PPI[159:144], NA[9], NB, NBM);
m3s063ct U13 (PPI[175:160], NA[10], NB, NBM);
m3s063ct U14 (PPI[191:176], NA[11], NB, NBM);
m3s063ct U15 (PPI[207:192], NA[12], NB, NBM);
m3s063ct U16 (PPI[223:208], NA[13], NB, NBM);
m3s063ct U17 (PPI[239:224], NA[14], NB, NBM);
m3s064ct U18 (PPI[255:240], NA[15], NB, NBM);

// re-order Partial Products for bit significance in result
// and create first depth parameter array
always @(PPI or NBM)
begin
  PP[256] = NBM; // add NBM into PP array for convenience
/*  p = 0;
  for (i=0;i<16;i=i+1)
  begin
    for(j=i;j<=(i*15)+i;j=j+15)
    begin
      PP[p] = PPI[j];
      PP[255-p] = PPI[255-j];
      p = p + 1;
    end
  end				*/

// Do the above nested assignment by separate assignments because
// various synthesis tools cannot cope with it.

PP[0] = PPI[0];
PP[100] = PPI[148];
PP[101] = PPI[163];
PP[102] = PPI[178];
PP[103] = PPI[193];
PP[104] = PPI[208];
PP[105] = PPI[14];
PP[106] = PPI[29];
PP[107] = PPI[44];
PP[108] = PPI[59];
PP[109] = PPI[74];
PP[10] = PPI[4];
PP[110] = PPI[89];
PP[111] = PPI[104];
PP[112] = PPI[119];
PP[113] = PPI[134];
PP[114] = PPI[149];
PP[115] = PPI[164];
PP[116] = PPI[179];
PP[117] = PPI[194];
PP[118] = PPI[209];
PP[119] = PPI[224];
PP[11] = PPI[19];
PP[120] = PPI[15];
PP[121] = PPI[30];
PP[122] = PPI[45];
PP[123] = PPI[60];
PP[124] = PPI[75];
PP[125] = PPI[90];
PP[126] = PPI[105];
PP[127] = PPI[120];
PP[128] = PPI[135];
PP[129] = PPI[150];
PP[12] = PPI[34];
PP[130] = PPI[165];
PP[131] = PPI[180];
PP[132] = PPI[195];
PP[133] = PPI[210];
PP[134] = PPI[225];
PP[135] = PPI[240];
PP[136] = PPI[31];
PP[137] = PPI[46];
PP[138] = PPI[61];
PP[139] = PPI[76];
PP[13] = PPI[49];
PP[140] = PPI[91];
PP[141] = PPI[106];
PP[142] = PPI[121];
PP[143] = PPI[136];
PP[144] = PPI[151];
PP[145] = PPI[166];
PP[146] = PPI[181];
PP[147] = PPI[196];
PP[148] = PPI[211];
PP[149] = PPI[226];
PP[14] = PPI[64];
PP[150] = PPI[241];
PP[151] = PPI[47];
PP[152] = PPI[62];
PP[153] = PPI[77];
PP[154] = PPI[92];
PP[155] = PPI[107];
PP[156] = PPI[122];
PP[157] = PPI[137];
PP[158] = PPI[152];
PP[159] = PPI[167];
PP[15] = PPI[5];
PP[160] = PPI[182];
PP[161] = PPI[197];
PP[162] = PPI[212];
PP[163] = PPI[227];
PP[164] = PPI[242];
PP[165] = PPI[63];
PP[166] = PPI[78];
PP[167] = PPI[93];
PP[168] = PPI[108];
PP[169] = PPI[123];
PP[16] = PPI[20];
PP[170] = PPI[138];
PP[171] = PPI[153];
PP[172] = PPI[168];
PP[173] = PPI[183];
PP[174] = PPI[198];
PP[175] = PPI[213];
PP[176] = PPI[228];
PP[177] = PPI[243];
PP[178] = PPI[79];
PP[179] = PPI[94];
PP[17] = PPI[35];
PP[180] = PPI[109];
PP[181] = PPI[124];
PP[182] = PPI[139];
PP[183] = PPI[154];
PP[184] = PPI[169];
PP[185] = PPI[184];
PP[186] = PPI[199];
PP[187] = PPI[214];
PP[188] = PPI[229];
PP[189] = PPI[244];
PP[18] = PPI[50];
PP[190] = PPI[95];
PP[191] = PPI[110];
PP[192] = PPI[125];
PP[193] = PPI[140];
PP[194] = PPI[155];
PP[195] = PPI[170];
PP[196] = PPI[185];
PP[197] = PPI[200];
PP[198] = PPI[215];
PP[199] = PPI[230];
PP[19] = PPI[65];
PP[1] = PPI[1];
PP[200] = PPI[245];
PP[201] = PPI[111];
PP[202] = PPI[126];
PP[203] = PPI[141];
PP[204] = PPI[156];
PP[205] = PPI[171];
PP[206] = PPI[186];
PP[207] = PPI[201];
PP[208] = PPI[216];
PP[209] = PPI[231];
PP[20] = PPI[80];
PP[210] = PPI[246];
PP[211] = PPI[127];
PP[212] = PPI[142];
PP[213] = PPI[157];
PP[214] = PPI[172];
PP[215] = PPI[187];
PP[216] = PPI[202];
PP[217] = PPI[217];
PP[218] = PPI[232];
PP[219] = PPI[247];
PP[21] = PPI[6];
PP[220] = PPI[143];
PP[221] = PPI[158];
PP[222] = PPI[173];
PP[223] = PPI[188];
PP[224] = PPI[203];
PP[225] = PPI[218];
PP[226] = PPI[233];
PP[227] = PPI[248];
PP[228] = PPI[159];
PP[229] = PPI[174];
PP[22] = PPI[21];
PP[230] = PPI[189];
PP[231] = PPI[204];
PP[232] = PPI[219];
PP[233] = PPI[234];
PP[234] = PPI[249];
PP[235] = PPI[175];
PP[236] = PPI[190];
PP[237] = PPI[205];
PP[238] = PPI[220];
PP[239] = PPI[235];
PP[23] = PPI[36];
PP[240] = PPI[250];
PP[241] = PPI[191];
PP[242] = PPI[206];
PP[243] = PPI[221];
PP[244] = PPI[236];
PP[245] = PPI[251];
PP[246] = PPI[207];
PP[247] = PPI[222];
PP[248] = PPI[237];
PP[249] = PPI[252];
PP[24] = PPI[51];
PP[250] = PPI[223];
PP[251] = PPI[238];
PP[252] = PPI[253];
PP[253] = PPI[239];
PP[254] = PPI[254];
PP[255] = PPI[255];
PP[25] = PPI[66];
PP[26] = PPI[81];
PP[27] = PPI[96];
PP[28] = PPI[7];
PP[29] = PPI[22];
PP[2] = PPI[16];
PP[30] = PPI[37];
PP[31] = PPI[52];
PP[32] = PPI[67];
PP[33] = PPI[82];
PP[34] = PPI[97];
PP[35] = PPI[112];
PP[36] = PPI[8];
PP[37] = PPI[23];
PP[38] = PPI[38];
PP[39] = PPI[53];
PP[3] = PPI[2];
PP[40] = PPI[68];
PP[41] = PPI[83];
PP[42] = PPI[98];
PP[43] = PPI[113];
PP[44] = PPI[128];
PP[45] = PPI[9];
PP[46] = PPI[24];
PP[47] = PPI[39];
PP[48] = PPI[54];
PP[49] = PPI[69];
PP[4] = PPI[17];
PP[50] = PPI[84];
PP[51] = PPI[99];
PP[52] = PPI[114];
PP[53] = PPI[129];
PP[54] = PPI[144];
PP[55] = PPI[10];
PP[56] = PPI[25];
PP[57] = PPI[40];
PP[58] = PPI[55];
PP[59] = PPI[70];
PP[5] = PPI[32];
PP[60] = PPI[85];
PP[61] = PPI[100];
PP[62] = PPI[115];
PP[63] = PPI[130];
PP[64] = PPI[145];
PP[65] = PPI[160];
PP[66] = PPI[11];
PP[67] = PPI[26];
PP[68] = PPI[41];
PP[69] = PPI[56];
PP[6] = PPI[3];
PP[70] = PPI[71];
PP[71] = PPI[86];
PP[72] = PPI[101];
PP[73] = PPI[116];
PP[74] = PPI[131];
PP[75] = PPI[146];
PP[76] = PPI[161];
PP[77] = PPI[176];
PP[78] = PPI[12];
PP[79] = PPI[27];
PP[7] = PPI[18];
PP[80] = PPI[42];
PP[81] = PPI[57];
PP[82] = PPI[72];
PP[83] = PPI[87];
PP[84] = PPI[102];
PP[85] = PPI[117];
PP[86] = PPI[132];
PP[87] = PPI[147];
PP[88] = PPI[162];
PP[89] = PPI[177];
PP[8] = PPI[33];
PP[90] = PPI[192];
PP[91] = PPI[13];
PP[92] = PPI[28];
PP[93] = PPI[43];
PP[94] = PPI[58];
PP[95] = PPI[73];
PP[96] = PPI[88];
PP[97] = PPI[103];
PP[98] = PPI[118];
PP[99] = PPI[133];
PP[9] = PPI[48];



end

// Adder tree. This decimates down the partial products.

m3s090ct U19 (QQ, PP);
m3s091ct U20 (RR, QQ);
m3s092ct U21 (SS, RR[131:0]);
m3s093ct U22 (TT, SS[97:0]);
m3s094ct U23 (UU, TT[75:0]);
m3s095ct U24 (VV, UU[60:0]);

// We already have the lowest 7 bits from the adder tree output
assign PO[6:0] = VV[6:0];

// aliases for synthesis
assign C_AT[0] = RR[132];
assign C_AT[1] = SS[98];
assign C_AT[2] = TT[76];
assign C_AT[3] = UU[61];
assign C_AT[4] = VV[55];

// Alias adder tree output to split products and carrys
assign TOP_VV = VV[54:7];
always @(TOP_VV or C_AT or NBM)
begin
    ALUA[24] = |C_AT;   // generate 32nd carry from or of carrys of all previous stages:
    ALUB[24] = NBM;     // generate 32nd product from NBM
    for (l=0;l<24;l=l+1)
    begin
        ALUA[l] = TOP_VV[(l*2)+1];
        ALUB[l] = TOP_VV[l*2];
    end
end

// Fast look ahead adder to generate result from adder tree output
m3s066ct U25 (PO[31:7], ALUA, ALUB);

endmodule