⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 main.lss

📁 高性能USB转串口(可高达10Mbps)完整的源代码
💻 LSS
📖 第 1 页 / 共 5 页
字号:

main.elf:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .text         00000b48  00100000  00100000  00008000  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  1 .data         000001d0  00200000  00100b48  00010000  2**2
                  CONTENTS, ALLOC, LOAD, CODE
  2 .bss          000000e8  002001d0  002001d0  000101d0  2**2
                  ALLOC
  3 .comment      00000087  00000000  00000000  000101d0  2**0
                  CONTENTS, READONLY
  4 .debug_aranges 00000168  00000000  00000000  00010258  2**3
                  CONTENTS, READONLY, DEBUGGING
  5 .debug_pubnames 0000018f  00000000  00000000  000103c0  2**0
                  CONTENTS, READONLY, DEBUGGING
  6 .debug_info   0000240b  00000000  00000000  0001054f  2**0
                  CONTENTS, READONLY, DEBUGGING
  7 .debug_abbrev 00000683  00000000  00000000  0001295a  2**0
                  CONTENTS, READONLY, DEBUGGING
  8 .debug_line   00000610  00000000  00000000  00012fdd  2**0
                  CONTENTS, READONLY, DEBUGGING
  9 .debug_frame  000001e4  00000000  00000000  000135f0  2**2
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_str    00000a89  00000000  00000000  000137d4  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_loc    000007ef  00000000  00000000  0001425d  2**0
                  CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:

00100000 <_startup>:
reset: 

.if (VECTREMAPPED)
/* mthomas: Dummy used during startup */
				LDR PC,=Reset_Addr_F
  100000:	e59ff0f4 	ldr	pc, [pc, #244]	; 1000fc <.text+0xfc>
				NOP
  100004:	e1a00000 	nop			(mov r0,r0)
				NOP
  100008:	e1a00000 	nop			(mov r0,r0)
				NOP
  10000c:	e1a00000 	nop			(mov r0,r0)
				NOP
  100010:	e1a00000 	nop			(mov r0,r0)
				NOP /*.word 0xdeadbeef*/ /* NOP */  /* Reserved Address */
  100014:	e1a00000 	nop			(mov r0,r0)
				NOP
  100018:	e1a00000 	nop			(mov r0,r0)
				NOP
  10001c:	e1a00000 	nop			(mov r0,r0)

00100020 <Reset_Addr_F>:
  100020:	00100028 	andeqs	r0, r0, r8, lsr #32

00100024 <.RAM_TOP>:
  100024:	00210000 	eoreq	r0, r1, r0

00100028 <InitReset>:
Reset_Addr_F:       .word     InitReset
.endif

.RAM_TOP:
	.word	__TOP_STACK 

InitReset:

/*------------------------------------------------------------------------------
/*- Remapping
/*------------------------------------------------------------------------------*/
.if (VECTREMAPPED)
		.print "RCR setting for remapping enabled"
		.equ    MC_BASE,0xFFFFFF00  /* MC Base Address */
		.equ    MC_RCR, 0x00        /* MC_RCR Offset */
		

		/* store first word in RAM into r4 */
		ldr r0,=__FIRST_IN_RAM
  100028:	e59f00d0 	ldr	r0, [pc, #208]	; 100100 <.text+0x100>
		ldr r4,[r0]
  10002c:	e5904000 	ldr	r4, [r0]
		/* load value at address 0 into R2 */
		ldr r1,=0x00000000
  100030:	e3a01000 	mov	r1, #0	; 0x0
		ldr r2,[r1]	
  100034:	e5912000 	ldr	r2, [r1]
		/* xor value from address 0 (flip all bits), store in R3 */
		ldr r3,=0xffffffff
  100038:	e3e03000 	mvn	r3, #0	; 0x0
		eor r3, r2, r3
  10003c:	e0223003 	eor	r3, r2, r3
		/* write xored value to first word in RAM 
		if already remapped this will also change
		the value at 0 */
		str r3,[r0]
  100040:	e5803000 	str	r3, [r0]
		/* load from address 0 again into R3 */
		ldr r3,[r1]
  100044:	e5913000 	ldr	r3, [r1]
		/* restore first value in RAM */
		str r4,[r0]
  100048:	e5804000 	str	r4, [r0]
		
		/* compare */
		cmp r3, r2
  10004c:	e1530002 	cmp	r3, r2
		bne already_remapped
  100050:	1a000002 	bne	100060 <already_remapped>
	
		/* if both values have been equal the change of the
		RAM-value had no effect on the value at 0x00000000 
		so we are not remapping yet -> remap now: */
		LDR     R0, =MC_BASE
  100054:	e3e000ff 	mvn	r0, #255	; 0xff
		MOV     R1, #1
  100058:	e3a01001 	mov	r1, #1	; 0x1
		STR     R1, [R0, #MC_RCR]	
  10005c:	e5801000 	str	r1, [r0]

00100060 <already_remapped>:
		
already_remapped:
.endif


/*------------------------------------------------------------------------------
/*- Low level Init (PMC, AIC, ? ....) by C function AT91F_LowLevelInit
/*------------------------------------------------------------------------------*/
            .extern   AT91F_LowLevelInit
/*- minumum C initialization */
/*- call  AT91F_LowLevelInit( void) */

            ldr     r13,.RAM_TOP            /* temporary stack in internal RAM (**) */
  100060:	e51fd044 	ldr	sp, [pc, #-68]	; 100024 <.RAM_TOP>
/*--Call Low level init function in ABSOLUTE through the Interworking	*/
            ldr     r0,=AT91F_LowLevelInit
  100064:	e59f0098 	ldr	r0, [pc, #152]	; 100104 <.text+0x104>
            mov     lr, pc
  100068:	e1a0e00f 	mov	lr, pc
            bx      r0
  10006c:	e12fff10 	bx	r0
/*------------------------------------------------------------------------------
//*- Stack Sizes Definition
//*------------------------
//*- Interrupt Stack requires 2 words x 8 priority level x 4 bytes when using
//*- the vectoring. This assume that the IRQ management.
//*- The Interrupt Stack must be adjusted depending on the interrupt handlers.
//*- Fast Interrupt not requires stack If in your application it required you must
//*- be definehere.
//*- The System stack size is not defined and is limited by the free internal
//*- SRAM.
//*------------------------------------------------------------------------------*/

/*------------------------------------------------------------------------------
//*- Top of Stack Definition
//*-------------------------
//*- Interrupt and Supervisor Stack are located at the top of internal memory in 
//*- order to speed the exception handling context saving and restoring.
//*- ARM_MODE_SVC (Application, C) Stack is located at the top of the external memory.
//*------------------------------------------------------------------------------*/

          .EQU		IRQ_STACK_SIZE,    (3*8*4)
          .EQU		ARM_MODE_FIQ,       0x11
          .EQU		ARM_MODE_IRQ,       0x12
          .EQU		ARM_MODE_SVC,       0x13

          .EQU		I_BIT,              0x80
          .EQU		F_BIT,              0x40

/*------------------------------------------------------------------------------
//*- Setup the stack for each mode
//*-------------------------------*/
                mov     r0,r13 /* see (**) */
  100070:	e1a0000d 	mov	r0, sp

/*- Set up Fast Interrupt Mode and set FIQ Mode Stack*/
                msr     CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
  100074:	e321f0d1 	msr	CPSR_c, #209	; 0xd1
/*- Init the FIQ register*/
                ldr     r8, =AT91C_BASE_AIC
  100078:	e59f8088 	ldr	r8, [pc, #136]	; 100108 <.text+0x108>

/*- Set up Interrupt Mode and set IRQ Mode Stack*/
                msr     CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
  10007c:	e321f0d2 	msr	CPSR_c, #210	; 0xd2
                mov     r13, r0                     /* Init stack IRQ */
  100080:	e1a0d000 	mov	sp, r0
                sub     r0, r0, #IRQ_STACK_SIZE
  100084:	e2400060 	sub	r0, r0, #96	; 0x60

/*- Set up Supervisor Mode and set Supervisor Mode Stack*/
				/* start with INT and FIQ enabled */
				msr     CPSR_c, #ARM_MODE_SVC 
  100088:	e321f013 	msr	CPSR_c, #19	; 0x13

//				/* start with INT and FIQ disabled */
//				msr     CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT 

				mov     r13, r0                     /* Init stack Sup */
  10008c:	e1a0d000 	mov	sp, r0


/*- Enable interrupt & Set up Supervisor Mode and set Supervisor Mode Stack*/

/* Relocate .data section (Copy from ROM to RAM) */
                LDR     R1, =_etext
  100090:	e59f1074 	ldr	r1, [pc, #116]	; 10010c <.text+0x10c>
                LDR     R2, =_data
  100094:	e59f2074 	ldr	r2, [pc, #116]	; 100110 <.text+0x110>
                LDR     R3, =_edata
  100098:	e59f3074 	ldr	r3, [pc, #116]	; 100114 <.text+0x114>

0010009c <LoopRel>:
LoopRel:        CMP     R2, R3
  10009c:	e1520003 	cmp	r2, r3
                LDRLO   R0, [R1], #4
  1000a0:	34910004 	ldrcc	r0, [r1], #4
                STRLO   R0, [R2], #4
  1000a4:	34820004 	strcc	r0, [r2], #4
                BLO     LoopRel
  1000a8:	3afffffb 	bcc	10009c <LoopRel>

/* Clear .bss section (Zero init) */
                MOV     R0, #0
  1000ac:	e3a00000 	mov	r0, #0	; 0x0
                LDR     R1, =__bss_start__
  1000b0:	e59f1060 	ldr	r1, [pc, #96]	; 100118 <.text+0x118>
                LDR     R2, =__bss_end__
  1000b4:	e59f2060 	ldr	r2, [pc, #96]	; 10011c <.text+0x11c>

001000b8 <LoopZI>:
LoopZI:         CMP     R1, R2
  1000b8:	e1510002 	cmp	r1, r2
                STRLO   R0, [R1], #4
  1000bc:	34810004 	strcc	r0, [r1], #4
                BLO     LoopZI
  1000c0:	3afffffc 	bcc	1000b8 <LoopZI>


/* call C++ constructors of global objects */
		LDR 	r0, =__ctors_start__
  1000c4:	e59f0054 	ldr	r0, [pc, #84]	; 100120 <.text+0x120>
		LDR 	r1, =__ctors_end__
  1000c8:	e59f1054 	ldr	r1, [pc, #84]	; 100124 <.text+0x124>

001000cc <ctor_loop>:
ctor_loop:
		CMP 	r0, r1
  1000cc:	e1500001 	cmp	r0, r1
		BEQ 	ctor_end
  1000d0:	0a000005 	beq	1000ec <ctor_end>
		LDR 	r2, [r0], #4
  1000d4:	e4902004 	ldr	r2, [r0], #4
		STMFD 	sp!, {r0-r1}
  1000d8:	e92d0003 	stmdb	sp!, {r0, r1}
		MOV 	lr, pc
  1000dc:	e1a0e00f 	mov	lr, pc
/*		MOV 	pc, r2 */
		BX r2 /* mthomas 8/2006 */
  1000e0:	e12fff12 	bx	r2
		LDMFD 	sp!, {r0-r1}
  1000e4:	e8bd0003 	ldmia	sp!, {r0, r1}
		B 		ctor_loop
  1000e8:	eafffff7 	b	1000cc <ctor_loop>

001000ec <ctor_end>:
ctor_end:


/* call main() */
		ldr	lr,=exit
  1000ec:	e59fe034 	ldr	lr, [pc, #52]	; 100128 <.text+0x128>
		ldr	r0,=main
  1000f0:	e59f0034 	ldr	r0, [pc, #52]	; 10012c <.text+0x12c>
		bx	r0
  1000f4:	e12fff10 	bx	r0

001000f8 <exit>:

        .size   _startup, . - _startup
        .endfunc

/* "exit" dummy added by mthomas to avoid sbrk write read etc. needed
   by the newlib default "exit" */
        .global exit
        .func   exit
exit:
        b    .
  1000f8:	eafffffe 	b	1000f8 <exit>
  1000fc:	00100020 	andeqs	r0, r0, r0, lsr #32
  100100:	00200000 	eoreq	r0, r0, r0
  100104:	00100131 	andeqs	r0, r0, r1, lsr r1
  100108:	fffff000 	undefined instruction 0xfffff000
  10010c:	00100b48 	andeqs	r0, r0, r8, asr #22
  100110:	00200000 	eoreq	r0, r0, r0
  100114:	002001d0 	ldreqd	r0, [r0], -r0
  100118:	002001d0 	ldreqd	r0, [r0], -r0
  10011c:	002002b8 	streqh	r0, [r0], -r8
  100120:	00100b48 	andeqs	r0, r0, r8, asr #22
  100124:	00100b48 	andeqs	r0, r0, r8, asr #22
  100128:	001000f8 	ldreqsh	r0, [r0], -r8
  10012c:	00100221 	andeqs	r0, r0, r1, lsr #4

00100130 <AT91F_LowLevelInit>:
    unsigned char i;
    ///////////////////////////////////////////////////////////////////////////
    // EFC Init
    ///////////////////////////////////////////////////////////////////////////
    AT91C_BASE_MC->MC_FMR = AT91C_MC_FWS_1FWS ;
  100130:	2380      	movs	r3, #128
  100132:	005b      	lsls	r3, r3, #1
  100134:	4a1e      	ldr	r2, [pc, #120]	(1001b0 <.text+0x1b0>)
  100136:	6613      	str	r3, [r2, #96]

    ///////////////////////////////////////////////////////////////////////////
    // Init PMC Step 1. Enable Main Oscillator
    // Main Oscillator startup time is board specific:
    // Main Oscillator Startup Time worst case (3MHz) corresponds to 15ms
    // (0x40 for AT91C_CKGR_OSCOUNT field)
    ///////////////////////////////////////////////////////////////////////////
    // mtmt avoid warning operator - precedence & > | 
    // AT91C_BASE_PMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x40 <<8) | AT91C_CKGR_MOSCEN ));
    AT91C_BASE_PMC->PMC_MOR = ( ( ( AT91C_CKGR_OSCOUNT & (0x40 <<8) ) | AT91C_CKGR_MOSCEN ));
  100138:	4a1e      	ldr	r2, [pc, #120]	(1001b4 <.text+0x1b4>)
  10013a:	4b1f      	ldr	r3, [pc, #124]	(1001b8 <.text+0x1b8>)
  10013c:	621a      	str	r2, [r3, #32]
  10013e:	1c19      	adds	r1, r3, #0
  100140:	2201      	movs	r2, #1
    // Wait Main Oscillator stabilization
    while(!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));
  100142:	6e8b      	ldr	r3, [r1, #104]
  100144:	4213      	tst	r3, r2
  100146:	d0fc      	beq.n	100142 <AT91F_LowLevelInit+0x12>

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -