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97:../../include/lib_AT91SAM7S256.h **** unsigned int mask = 0x1 << irq_id;
98:../../include/lib_AT91SAM7S256.h **** //* Disable the interrupt on the interrupt controller
99:../../include/lib_AT91SAM7S256.h **** pAic->AIC_IDCR = mask ;
100:../../include/lib_AT91SAM7S256.h **** //* Clear the interrupt on the Interrupt Controller ( if one is pending )
101:../../include/lib_AT91SAM7S256.h **** pAic->AIC_ICCR = mask ;
102:../../include/lib_AT91SAM7S256.h **** }
103:../../include/lib_AT91SAM7S256.h ****
104:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
105:../../include/lib_AT91SAM7S256.h **** //* \fn AT91F_AIC_ClearIt
106:../../include/lib_AT91SAM7S256.h **** //* \brief Clear corresponding IT number
107:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
108:../../include/lib_AT91SAM7S256.h **** __inline void AT91F_AIC_ClearIt (
109:../../include/lib_AT91SAM7S256.h **** AT91PS_AIC pAic, // \arg pointer to the AIC registers
110:../../include/lib_AT91SAM7S256.h **** unsigned int irq_id) // \arg interrupt number to initialize
111:../../include/lib_AT91SAM7S256.h **** {
112:../../include/lib_AT91SAM7S256.h **** //* Clear the interrupt on the Interrupt Controller ( if one is pending )
113:../../include/lib_AT91SAM7S256.h **** pAic->AIC_ICCR = (0x1 << irq_id);
114:../../include/lib_AT91SAM7S256.h **** }
115:../../include/lib_AT91SAM7S256.h ****
116:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
117:../../include/lib_AT91SAM7S256.h **** //* \fn AT91F_AIC_AcknowledgeIt
118:../../include/lib_AT91SAM7S256.h **** //* \brief Acknowledge corresponding IT number
119:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
120:../../include/lib_AT91SAM7S256.h **** __inline void AT91F_AIC_AcknowledgeIt (
121:../../include/lib_AT91SAM7S256.h **** AT91PS_AIC pAic) // \arg pointer to the AIC registers
122:../../include/lib_AT91SAM7S256.h **** {
123:../../include/lib_AT91SAM7S256.h **** pAic->AIC_EOICR = pAic->AIC_EOICR;
124:../../include/lib_AT91SAM7S256.h **** }
125:../../include/lib_AT91SAM7S256.h ****
126:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
127:../../include/lib_AT91SAM7S256.h **** //* \fn AT91F_AIC_SetExceptionVector
128:../../include/lib_AT91SAM7S256.h **** //* \brief Configure vector handler
129:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
130:../../include/lib_AT91SAM7S256.h **** __inline unsigned int AT91F_AIC_SetExceptionVector (
131:../../include/lib_AT91SAM7S256.h **** unsigned int *pVector, // \arg pointer to the AIC registers
132:../../include/lib_AT91SAM7S256.h **** void (*Handler) () ) // \arg Interrupt Handler
133:../../include/lib_AT91SAM7S256.h **** {
134:../../include/lib_AT91SAM7S256.h **** unsigned int oldVector = *pVector;
135:../../include/lib_AT91SAM7S256.h ****
136:../../include/lib_AT91SAM7S256.h **** if ((unsigned int) Handler == (unsigned int) AT91C_AIC_BRANCH_OPCODE)
137:../../include/lib_AT91SAM7S256.h **** *pVector = (unsigned int) AT91C_AIC_BRANCH_OPCODE;
138:../../include/lib_AT91SAM7S256.h **** else
139:../../include/lib_AT91SAM7S256.h **** *pVector = (((((unsigned int) Handler) - ((unsigned int) pVector) - 0x8) >> 2) & 0x00FFFFFF) | 0x
140:../../include/lib_AT91SAM7S256.h ****
141:../../include/lib_AT91SAM7S256.h **** return oldVector;
142:../../include/lib_AT91SAM7S256.h **** }
143:../../include/lib_AT91SAM7S256.h ****
144:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
145:../../include/lib_AT91SAM7S256.h **** //* \fn AT91F_AIC_Trig
146:../../include/lib_AT91SAM7S256.h **** //* \brief Trig an IT
147:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
148:../../include/lib_AT91SAM7S256.h **** __inline void AT91F_AIC_Trig (
149:../../include/lib_AT91SAM7S256.h **** AT91PS_AIC pAic, // \arg pointer to the AIC registers
150:../../include/lib_AT91SAM7S256.h **** unsigned int irq_id) // \arg interrupt number
151:../../include/lib_AT91SAM7S256.h **** {
152:../../include/lib_AT91SAM7S256.h **** pAic->AIC_ISCR = (0x1 << irq_id) ;
153:../../include/lib_AT91SAM7S256.h **** }
154:../../include/lib_AT91SAM7S256.h ****
155:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
156:../../include/lib_AT91SAM7S256.h **** //* \fn AT91F_AIC_IsActive
157:../../include/lib_AT91SAM7S256.h **** //* \brief Test if an IT is active
158:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
159:../../include/lib_AT91SAM7S256.h **** __inline unsigned int AT91F_AIC_IsActive (
160:../../include/lib_AT91SAM7S256.h **** AT91PS_AIC pAic, // \arg pointer to the AIC registers
161:../../include/lib_AT91SAM7S256.h **** unsigned int irq_id) // \arg Interrupt Number
162:../../include/lib_AT91SAM7S256.h **** {
163:../../include/lib_AT91SAM7S256.h **** return (pAic->AIC_ISR & (0x1 << irq_id));
164:../../include/lib_AT91SAM7S256.h **** }
165:../../include/lib_AT91SAM7S256.h ****
166:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
167:../../include/lib_AT91SAM7S256.h **** //* \fn AT91F_AIC_IsPending
168:../../include/lib_AT91SAM7S256.h **** //* \brief Test if an IT is pending
169:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
170:../../include/lib_AT91SAM7S256.h **** __inline unsigned int AT91F_AIC_IsPending (
171:../../include/lib_AT91SAM7S256.h **** AT91PS_AIC pAic, // \arg pointer to the AIC registers
172:../../include/lib_AT91SAM7S256.h **** unsigned int irq_id) // \arg Interrupt Number
173:../../include/lib_AT91SAM7S256.h **** {
174:../../include/lib_AT91SAM7S256.h **** return (pAic->AIC_IPR & (0x1 << irq_id));
175:../../include/lib_AT91SAM7S256.h **** }
176:../../include/lib_AT91SAM7S256.h ****
177:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
178:../../include/lib_AT91SAM7S256.h **** //* \fn AT91F_AIC_Open
179:../../include/lib_AT91SAM7S256.h **** //* \brief Set exception vectors and AIC registers to default values
180:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
181:../../include/lib_AT91SAM7S256.h **** __inline void AT91F_AIC_Open(
182:../../include/lib_AT91SAM7S256.h **** AT91PS_AIC pAic, // \arg pointer to the AIC registers
183:../../include/lib_AT91SAM7S256.h **** void (*IrqHandler) (), // \arg Default IRQ vector exception
184:../../include/lib_AT91SAM7S256.h **** void (*FiqHandler) (), // \arg Default FIQ vector exception
185:../../include/lib_AT91SAM7S256.h **** void (*DefaultHandler) (), // \arg Default Handler set in ISR
186:../../include/lib_AT91SAM7S256.h **** void (*SpuriousHandler) (), // \arg Default Spurious Handler
187:../../include/lib_AT91SAM7S256.h **** unsigned int protectMode) // \arg Debug Control Register
188:../../include/lib_AT91SAM7S256.h **** {
189:../../include/lib_AT91SAM7S256.h **** int i;
190:../../include/lib_AT91SAM7S256.h ****
191:../../include/lib_AT91SAM7S256.h **** // Disable all interrupts and set IVR to the default handler
192:../../include/lib_AT91SAM7S256.h **** for (i = 0; i < 32; ++i) {
193:../../include/lib_AT91SAM7S256.h **** AT91F_AIC_DisableIt(pAic, i);
194:../../include/lib_AT91SAM7S256.h **** AT91F_AIC_ConfigureIt(pAic, i, AT91C_AIC_PRIOR_LOWEST, AT91C_AIC_SRCTYPE_HIGH_LEVEL, DefaultHandl
195:../../include/lib_AT91SAM7S256.h **** }
196:../../include/lib_AT91SAM7S256.h ****
197:../../include/lib_AT91SAM7S256.h **** // Set the IRQ exception vector
198:../../include/lib_AT91SAM7S256.h **** AT91F_AIC_SetExceptionVector((unsigned int *) 0x18, IrqHandler);
199:../../include/lib_AT91SAM7S256.h **** // Set the Fast Interrupt exception vector
200:../../include/lib_AT91SAM7S256.h **** AT91F_AIC_SetExceptionVector((unsigned int *) 0x1C, FiqHandler);
201:../../include/lib_AT91SAM7S256.h ****
202:../../include/lib_AT91SAM7S256.h **** pAic->AIC_SPU = (unsigned int) SpuriousHandler;
203:../../include/lib_AT91SAM7S256.h **** pAic->AIC_DCR = protectMode;
204:../../include/lib_AT91SAM7S256.h **** }
205:../../include/lib_AT91SAM7S256.h **** /* *****************************************************************************
206:../../include/lib_AT91SAM7S256.h **** SOFTWARE API FOR PDC
207:../../include/lib_AT91SAM7S256.h **** ***************************************************************************** */
208:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
209:../../include/lib_AT91SAM7S256.h **** //* \fn AT91F_PDC_SetNextRx
210:../../include/lib_AT91SAM7S256.h **** //* \brief Set the next receive transfer descriptor
211:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
212:../../include/lib_AT91SAM7S256.h **** __inline void AT91F_PDC_SetNextRx (
213:../../include/lib_AT91SAM7S256.h **** AT91PS_PDC pPDC, // \arg pointer to a PDC controller
214:../../include/lib_AT91SAM7S256.h **** char *address, // \arg address to the next bloc to be received
215:../../include/lib_AT91SAM7S256.h **** unsigned int bytes) // \arg number of bytes to be received
216:../../include/lib_AT91SAM7S256.h **** {
217:../../include/lib_AT91SAM7S256.h **** pPDC->PDC_RNPR = (unsigned int) address;
218:../../include/lib_AT91SAM7S256.h **** pPDC->PDC_RNCR = bytes;
219:../../include/lib_AT91SAM7S256.h **** }
220:../../include/lib_AT91SAM7S256.h ****
221:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
222:../../include/lib_AT91SAM7S256.h **** //* \fn AT91F_PDC_SetNextTx
223:../../include/lib_AT91SAM7S256.h **** //* \brief Set the next transmit transfer descriptor
224:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
225:../../include/lib_AT91SAM7S256.h **** __inline void AT91F_PDC_SetNextTx (
226:../../include/lib_AT91SAM7S256.h **** AT91PS_PDC pPDC, // \arg pointer to a PDC controller
227:../../include/lib_AT91SAM7S256.h **** char *address, // \arg address to the next bloc to be transmitted
228:../../include/lib_AT91SAM7S256.h **** unsigned int bytes) // \arg number of bytes to be transmitted
229:../../include/lib_AT91SAM7S256.h **** {
230:../../include/lib_AT91SAM7S256.h **** pPDC->PDC_TNPR = (unsigned int) address;
231:../../include/lib_AT91SAM7S256.h **** pPDC->PDC_TNCR = bytes;
232:../../include/lib_AT91SAM7S256.h **** }
233:../../include/lib_AT91SAM7S256.h ****
234:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
235:../../include/lib_AT91SAM7S256.h **** //* \fn AT91F_PDC_SetRx
236:../../include/lib_AT91SAM7S256.h **** //* \brief Set the receive transfer descriptor
237:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
238:../../include/lib_AT91SAM7S256.h **** __inline void AT91F_PDC_SetRx (
239:../../include/lib_AT91SAM7S256.h **** AT91PS_PDC pPDC, // \arg pointer to a PDC controller
240:../../include/lib_AT91SAM7S256.h **** char *address, // \arg address to the next bloc to be received
241:../../include/lib_AT91SAM7S256.h **** unsigned int bytes) // \arg number of bytes to be received
242:../../include/lib_AT91SAM7S256.h **** {
243:../../include/lib_AT91SAM7S256.h **** pPDC->PDC_RPR = (unsigned int) address;
244:../../include/lib_AT91SAM7S256.h **** pPDC->PDC_RCR = bytes;
245:../../include/lib_AT91SAM7S256.h **** }
246:../../include/lib_AT91SAM7S256.h ****
247:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
248:../../include/lib_AT91SAM7S256.h **** //* \fn AT91F_PDC_SetTx
249:../../include/lib_AT91SAM7S256.h **** //* \brief Set the transmit transfer descriptor
250:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
251:../../include/lib_AT91SAM7S256.h **** __inline void AT91F_PDC_SetTx (
252:../../include/lib_AT91SAM7S256.h **** AT91PS_PDC pPDC, // \arg pointer to a PDC controller
253:../../include/lib_AT91SAM7S256.h **** char *address, // \arg address to the next bloc to be transmitted
254:../../include/lib_AT91SAM7S256.h **** unsigned int bytes) // \arg number of bytes to be transmitted
255:../../include/lib_AT91SAM7S256.h **** {
256:../../include/lib_AT91SAM7S256.h **** pPDC->PDC_TPR = (unsigned int) address;
257:../../include/lib_AT91SAM7S256.h **** pPDC->PDC_TCR = bytes;
258:../../include/lib_AT91SAM7S256.h **** }
259:../../include/lib_AT91SAM7S256.h ****
260:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
261:../../include/lib_AT91SAM7S256.h **** //* \fn AT91F_PDC_EnableTx
262:../../include/lib_AT91SAM7S256.h **** //* \brief Enable transmit
263:../../include/lib_AT91SAM7S256.h **** //*----------------------------------------------------------------------------
264:../../include/lib_AT91SAM7S256.h **** __inline void AT91F_PDC_EnableTx (
265:../../include/lib_AT91SAM7S256.h **** AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
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