📄 clr24_x1.lst
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A 145 fe96 8b8a MAR *, AR2 ;Point to row index.
A 146 fe97 7b90 BANZ LOBYTE ;Do next word,and dec AR2.
fe98 fe78+
A 147 ********Reached end of row. Check if row done. *
A 148 fe99 4f0d! BIT B2_0,15 ;Get row_done flag.
A 149 fe9a e100 BCND ROW_DONE,TC ;If 1 then row is done.
fe9b fea4+
A 150 fe9c 8b89 MAR *,AR1 ;Else, row is not done, so
A 151 fe9d 8ba0 MAR *+ ;inc row pulse count.
A 152 fe9e b096 LAR AR0,#MAX_PGM ;Check if passed allowable max.
A 153 fe9f bf46 CMPR 2 ;If AR1>MAX_PGM then
A 154 fea0 e100 BCND EXIT,TC ;fail, don't continue.
fea1 fead+
A 155 fea2 7980 B SAMEROW ;else, go to beginning
fea3 fe73+
A 156 ;of same row.
A 157 ********If row done then check if Array done. *
A 158 fea4 ROW_DONE ;Check if end of array.
A 159 fea4 301b! SUB SEG_END ;Subtract segment end address.
A 160 fea5 e38c BCND DONE, GEQ ;If >0 then done.
fea6 feaa+
A 161 ********Else, goto next row. *
A 162 fea7 691d! LACL FL_ADRS
A 163 fea8 7980 B NEWROW ;Start new row.
fea9 fe71+
A 164
A 165 feaa DONE:
A 166 feaa FINISHED:
A 167 ; IN DUMMY, F24X_ACCS
A 168 feaa 7a80 CALL ARRAY ;ACCES FLASH IN ARRAY MODE.
feab fee5+
A 169 feac ef00 RET
A 170
A 171 ********If here then unit failed to program. *
A 172 fead ae1f! EXIT SPLK #1,ERROR ;Update error flag.
feae 0001
A 173 feaf 7980 B FINISHED ;Get outa here.
feb0 feaa+
A 174
A 175 ************************************************************
TMS320C1x/C2x/C2xx/C5x COFF Assembler Beta Version 6.63 Tue Nov 30 13:52:43 1999
Copyright (c) 1987-1996 Texas Instruments Incorporated
CLR24_X1.ABS PAGE 5
A 177 ************************************************************
A 178 * THIS SECTION PROGRAMS THE VALUE STORED IN FL_DATA INTO *
A 179 * THE FLASH ADDRESS DEFINED BY FL_ADRS. *
A 180 * *
A 181 * The following resources are used for temporary storage: *
A 182 * AR6 - Parameter passed to Delay. *
A 183 * SPAD1 - Flash program and STOP commands. *
A 184 * SPAD2 - Flash program + EXE command. *
A 185 ************************************************************
A 186 feb1 EXE_PGM ; *
A 187 * *
A 188
A 189 ; IN DUMMY, F24X_ACCS
A 190 feb1 7a80 CALL ARRAY ;ACCESS ARRAY *
feb2 fee5+
A 191 * LOAD WADRS AND WDATA **
A 192 feb3 691d! LACL FL_ADRS ;ACC => PROGRAM ADRS *
A 193 feb4 a71e! TBLW FL_DATA ;LOAD WADRS AND WDATA *
A 194
A 195 ; OUT DUMMY, F24X_ACCS;(DAF)
A 196 feb5 7a80 CALL REGS ;ACCESS FLASH REGS *
feb6 fee8+
A 197 * SET-UP WRITE COMMAND WORDS **
A 198 feb7 691c! LACL PROTECT ;GET SEGMENT PROTECT MASK **
A 199 feb8 bfc0 OR #WR_CMND ;OR IN WRITE COMMAND **
feb9 0004
A 200 feba 9014! SACL SPAD1 ;SPAD1 = WRITE COMMAND **
A 201 febb bfc0 OR #WR_EXE ;OR IN EXEBIN COMMAND **
febc 0045
A 202 febd 9015! SACL SPAD2 ;SPAD2 = WRITE EXE COMMAND**
A 203 * *
A 204 febe 6921! LACL FL_ST ;ACC => 0 (FLASH0) *
A 205 * ACTIVATE WRITE BIT **
A 206 febf a714! TBLW SPAD1 ;EXECUTE COMMAND **
A 207 fec0 0b17! RPT DLY10 ;(DAF)
A 208 fec1 8b00 NOP
A 209 ; LAR AR6,#D10 ;SET DELAY **
A 210 ; CALL DELAY,*,AR6 ;WAIT **
A 211 * SET EXEBIN BIT ***
A 212 fec2 a715! TBLW SPAD2 ;EXECUTE COMMAND ***
A 213 fec3 0b18! RPT DLY100 ;(DAF)
A 214 fec4 8b00 NOP
A 215 ; LAR AR6,#D100 ;SET DELAY ***
A 216 ; CALL DELAY,*,AR6 ;WAIT ***
A 217 * STOP WRITE OPERATION *
A 218 fec5 ae14! SPLK #0,SPAD1 ;SHUTDONW WRITE OPERATION *
fec6 0000
A 219 fec7 a714! TBLW SPAD1 ;EXECUTE COMMAND *
A 220 fec8 a714! TBLW SPAD1 ;EXECUTE COMMAND *
A 221 fec9 0b17! RPT DLY10 ;(DAF)
A 222 feca 8b00 NOP
A 223 ; LAR AR6,#D10 ;SET DELAY *
A 224 ; CALL DELAY,*,AR6 ;WAIT *
A 225 * *
TMS320C1x/C2x/C2xx/C5x COFF Assembler Beta Version 6.63 Tue Nov 30 13:52:43 1999
Copyright (c) 1987-1996 Texas Instruments Incorporated
CLR24_X1.ABS PAGE 6
A 226 fecb ef00 RET ;RETURN TO CALLING SEQUENCE *
A 227 ************************************************************
TMS320C1x/C2x/C2xx/C5x COFF Assembler Beta Version 6.63 Tue Nov 30 13:52:43 1999
Copyright (c) 1987-1996 Texas Instruments Incorporated
CLR24_X1.ABS PAGE 7
A 229 ***********************************************************
A 230 * ACTIVATE VER0 ON FLASH READS *
A 231 * LOADS FLASH WORD AT ADDR FL_ADRS TO FL_DATA. *
A 232 * Uses SPAD1 for temporary storage of flash comands. *
A 233 ***********************************************************
A 234 fecc SET_RD_VER0 ; *
A 235
A 236 ; OUT DUMMY, F24X_ACCS
A 237 fecc 7a80 CALL REGS ;ACCESS FLASH REGISTERS *
fecd fee8+
A 238 fece 6921! LACL FL_ST ;ACC => FLASH *
A 239 fecf ae14! SPLK #VER0,SPAD1 ;ACTIVATE VER0 *
fed0 0010
A 240 fed1 a714! TBLW SPAD1 ;EXECUTE COMMAND *
A 241 fed2 0b17! RPT DLY10 ;(DAF)
A 242 fed3 8b00 NOP
A 243 ; LAR AR6,#D10 ;SET DELAY *
A 244 ; CALL DELAY,*,AR6 ;WAIT *
A 245
A 246 ; IN DUMMY, F24X_ACCS
A 247 fed4 7a80 CALL ARRAY ;ACCESS FLASH ARRAY *
fed5 fee5+
A 248 fed6 691d! LACL FL_ADRS ;POINT TO ADRS *
A 249 fed7 a61e! TBLR FL_DATA ;GET FLASH WORD 1x read *
A 250 fed8 a61e! TBLR FL_DATA ; 2x read *
A 251 fed9 a61e! TBLR FL_DATA ; 3x read *
A 252
A 253 ; OUT DUMMY, F24X_ACCS
A 254 feda 7a80 CALL REGS ;ACCESS FLASH REGISTERS *
fedb fee8+
A 255 fedc 6921! LACL FL_ST ;ACC => FLASH *
A 256 fedd ae14! SPLK #STOP,SPAD1 ;DEACTIVATE VER0 *
fede 0000
A 257 fedf a714! TBLW SPAD1 ;EXECUTE COMMAND *
A 258 fee0 0b17! RPT DLY10 ;(DAF)
A 259 fee1 8b00 NOP
A 260 ; LAR AR6,#D10 ;SET DELAY *
A 261 ; CALL DELAY,*,AR6 ;WAIT *
A 262
A 263
A 264 ; IN DUMMY, F24X_ACCS
A 265 fee2 7a80 CALL ARRAY ;ACCESS FLASH ARRAY *
fee3 fee5+
A 266 fee4 ef00 RET ;RETURN TO CALLING SEQUENCE *
A 267
A 268 fee5 af16! ARRAY: IN DUMMY, F24X_ACCS
fee6 ff0f
A 269 ; LDP #0E0H
A 270 ; SPLK #0,7018H
A 271 ; LDP #6
A 272
A 273 fee7 ef00 RET
A 274
A 275 fee8 0c16! REGS: OUT DUMMY, F24X_ACCS
TMS320C1x/C2x/C2xx/C5x COFF Assembler Beta Version 6.63 Tue Nov 30 13:52:43 1999
Copyright (c) 1987-1996 Texas Instruments Incorporated
CLR24_X1.ABS PAGE 8
fee9 ff0f
A 276 ; LDP #0E0H
A 277 ; SPLK #0800H,7018H
A 278 ; LDP #6
A 279 feea ef00 RET
A 280
A 281 ***********************************************************
A 282 .end
No Errors, No Warnings
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