📄 predict.c
字号:
*/
static void pred_comp(src,dst,lx,w,h,x,y,dx,dy,addflag)unsigned char *src;unsigned char *dst;int lx;int w, h;int x, y;int dx, dy;int addflag;{ int xint, xh, yint, yh; int i, j; unsigned char *s, *d;
/* half pel scaling */ xint = dx>>1; /* integer part */ xh = dx & 1; /* half pel flag */ yint = dy>>1; yh = dy & 1; /* origins */ s = src + lx*(y+yint) + (x+xint); /* motion vector */ d = dst + lx*y + x;
if (!xh && !yh)
{ if (addflag)
{
if(cpu_MMX)
{
if(w == 8)
{
_asm
{
mov ecx, h ;// ecx = h
mov edx, lx ;// edx = lx
mov esi, s ;// esi = s
mov edi, d ;// edi = d
pred_comp__l1:
movd mm0, [esi] ;// lower 4 bytes into mm0 = esi[0..3]
movd mm1, [edi] ;// lower 4 bytes into mm1 = edi[0..3]
movd mm2, [esi+4] ;// lower 4 bytes into mm2 = esi[4..7]
movd mm3, [edi+4] ;// lower 4 bytes into mm3 = edi[4..7]
punpcklbw mm0, PACKED_0 ;// unpack the lower 2 words into mm0
punpcklbw mm1, PACKED_0 ;// unpack the lower 2 words into mm1
punpcklbw mm2, PACKED_0 ;// unpack the lower 2 words into mm2
punpcklbw mm3, PACKED_0 ;// unpack the lower 2 words into mm3
paddw mm0, mm1 ;// mm0 += mm1
paddw mm2, mm3 ;// mm2 += mm3
psrlw mm0, 1 ;// mm0 >>= 1
psrlw mm2, 1 ;// mm2 >>= 1
packuswb mm0, mm2 ;// pack mm0 and mm2
movq [edi], mm0 ;// store mm0 into edi[0..7]
add esi, edx ;// esi += edx
add edi, edx ;// edi += edx
dec ecx ;// decrement ecx
jnz pred_comp__l1 ;// loop while not zero
emms ;// empty MMX state
}
return;
}
if(w == 16)
{
_asm
{
mov ecx, h ;// ecx = h
mov edx, lx ;// edx = lx
mov esi, s ;// esi = s
mov edi, d ;// edi = d
pred_comp__l2:
movd mm0, [esi] ;// lower 4 bytes into mm0 = esi[0..3]
movd mm1, [edi] ;// lower 4 bytes into mm1 = edi[0..3]
movd mm2, [esi+4] ;// lower 4 bytes into mm2 = esi[4..7]
movd mm3, [edi+4] ;// lower 4 bytes into mm3 = edi[4..7]
movd mm4, [esi+8] ;// lower 4 bytes into mm4 = esi[8..11]
movd mm5, [edi+8] ;// lower 4 bytes into mm5 = edi[8..11]
movd mm6, [esi+12] ;// lower 4 bytes into mm6 = esi[12..15]
movd mm7, [edi+12] ;// lower 4 bytes into mm7 = edi[12..15]
punpcklbw mm0, PACKED_0 ;// unpack the lower 2 words into mm0
punpcklbw mm1, PACKED_0 ;// unpack the lower 2 words into mm1
punpcklbw mm2, PACKED_0 ;// unpack the lower 2 words into mm2
punpcklbw mm3, PACKED_0 ;// unpack the lower 2 words into mm3
punpcklbw mm4, PACKED_0 ;// unpack the lower 2 words into mm4
punpcklbw mm5, PACKED_0 ;// unpack the lower 2 words into mm5
punpcklbw mm6, PACKED_0 ;// unpack the lower 2 words into mm6
punpcklbw mm7, PACKED_0 ;// unpack the lower 2 words into mm7
paddw mm0, mm1 ;// mm0 += mm1
paddw mm2, mm3 ;// mm2 += mm3
paddw mm4, mm5 ;// mm4 += mm5
paddw mm6, mm7 ;// mm6 += mm7
psrlw mm0, 1 ;// mm0 >>= 1
psrlw mm2, 1 ;// mm2 >>= 1
psrlw mm4, 1 ;// mm4 >>= 1
psrlw mm6, 1 ;// mm6 >>= 1
packuswb mm0, mm2 ;// pack mm0 and mm2
packuswb mm4, mm6 ;// pack mm4 and mm6
movq [edi], mm0 ;// store mm0 into edi[0..7]
movq [edi+8], mm4 ;// store mm4 into edi[8..15]
add esi, edx ;// esi += edx
add edi, edx ;// edi += edx
dec ecx ;// decrement ecx
jnz pred_comp__l2 ;// loop while not zero
emms ;// empty MMX state
}
return;
}
}
for (j=0; j<h; j++)
{
for (i=0; i<w; i++)
d[i] = (unsigned int)(d[i]+s[i]+1)>>1;
s+= lx;
d+= lx;
}
}
else
{
if(cpu_MMX)
{
if(w == 8)
{
_asm
{
mov esi, s ;// esi = s
mov edi, d ;// edi = d
mov ecx, h ;// ecx = h
mov edx, lx ;// edx = lx
pred_comp__l3:
movq mm0, [esi]
movq [edi], mm0 ;// simply move from esi[0..7] to edi[0..7]
add esi, edx ;// esi += edx
add edi, edx ;// esi += edx
dec ecx ;// decrement ecx
jnz pred_comp__l3 ;// loop while not zero
emms ;// empty MMX state
}
return;
}
if(w == 16)
{
_asm
{
mov esi, s ;// esi = s
mov edi, d ;// edi = d
mov ecx, h ;// ecx = h
mov edx, lx ;// edx = lx
pred_comp__l4:
movq mm0, [esi]
movq mm1, [esi+8]
movq [edi], mm0 ;// simply move from esi[0..7] to edi[0..7]
movq [edi+8], mm1 ;// simply move from esi[8..15] to edi[8..15]
add esi, edx ;// esi += edx
add edi, edx ;// esi += edx
dec ecx ;// decrement ecx
jnz pred_comp__l4 ;// loop while not zero
emms ;// empty MMX state
}
return;
}
}
for (j=0; j<h; j++) { for (i=0; i<w; i++) d[i] = s[i];
s+= lx; d+= lx; }
}
} else if (!xh && yh)
if (addflag)
{
if(cpu_MMX)
{
if(w == 8)
{
_asm
{
mov esi, s ;// esi = s
mov edi, d ;// edi = d
mov ecx, h ;// ecx = h
mov edx, lx ;// edx = lx
pred_comp__l5:
movd mm0, [esi] ;// lower 4 bytes into mm0 = esi[0..3]
movd mm1, [esi+edx] ;// lower 4 bytes into mm1 = (esi + edx)[0..3]
movd mm2, [esi+4] ;// lower 4 bytes into mm2 = esi[4..7]
movd mm3, [esi+edx+4] ;// lower 4 bytes into mm3 = (esi + edx)[4..7]
punpcklbw mm0, PACKED_0 ;// unpack the lower 4 bytes into mm0
punpcklbw mm1, PACKED_0 ;// unpack the lower 4 bytes into mm1
punpcklbw mm2, PACKED_0 ;// unpack the lower 4 bytes into mm2
punpcklbw mm3, PACKED_0 ;// unpack the lower 4 bytes into mm3
paddw mm0, mm1
paddw mm2, mm3
paddw mm0, PACKED_1 ;// mm0 += mm1 + (1, 1, 1, 1)
paddw mm2, PACKED_1 ;// mm2 += mm3 + (1, 1, 1, 1)
movd mm1, [edi] ;// lower 4 bytes into mm1 = edi[0..3]
movd mm3, [edi+4] ;// lower 4 bytes into mm3 = edi[4..7]
punpcklbw mm1, PACKED_0 ;// unpack the lower 2 bytes into mm1
punpcklbw mm3, PACKED_0 ;// unpack the lower 2 bytes into mm3
psrlw mm0, 1 ;// mm0 >>= 1
psrlw mm2, 1 ;// mm2 >>= 1
paddw mm0, mm1 ;// mm0 += mm1
paddw mm2, mm3 ;// mm2 += mm3
psrlw mm0, 1 ;// mm0 >>= 1
psrlw mm2, 1 ;// mm2 >>= 1
packuswb mm0, mm2 ;// pack mm0 and mm2
movq [edi], mm0 ;// store mm0 into edi[0..7]
add esi, edx ;// esi += edx
add edi, edx ;// edi += edx
dec ecx ;// decrement ecx
jnz pred_comp__l5 ;// loop while not zero
emms ;// empty MMX state
}
return;
}
if(w == 16)
{
_asm
{
mov esi, s ;// esi = s
mov edi, d ;// edi = d
mov ecx, h ;// ecx = h
mov edx, lx ;// edx = lx
pred_comp__l6:
movd mm0, [esi] ;// lower 4 bytes into mm0 = esi[0..3]
movd mm1, [esi+edx] ;// lower 4 bytes into mm1 = (esi + edx)[0..3]
movd mm2, [esi+4] ;// lower 4 bytes into mm2 = esi[4..7]
movd mm3, [esi+edx+4] ;// lower 4 bytes into mm3 = (esi + edx)[4..7]
movd mm4, [esi+8] ;// lower 4 bytes into mm4 = esi[8..11]
movd mm5, [esi+edx+8] ;// lower 4 bytes into mm5 = (esi + edx)[8..11]
movd mm6, [esi+12] ;// lower 4 bytes into mm6 = esi[12..15]
movd mm7, [esi+edx+12] ;// lower 4 bytes into mm7 = (esi + edx)[12..15]
punpcklbw mm0, PACKED_0 ;// unpack the lower 4 bytes into mm0
punpcklbw mm1, PACKED_0 ;// unpack the lower 4 bytes into mm1
punpcklbw mm2, PACKED_0 ;// unpack the lower 4 bytes into mm2
punpcklbw mm3, PACKED_0 ;// unpack the lower 4 bytes into mm3
punpcklbw mm4, PACKED_0 ;// unpack the lower 4 bytes into mm4
punpcklbw mm5, PACKED_0 ;// unpack the lower 4 bytes into mm5
punpcklbw mm6, PACKED_0 ;// unpack the lower 4 bytes into mm6
punpcklbw mm7, PACKED_0 ;// unpack the lower 4 bytes into mm7
paddw mm0, mm1
paddw mm2, mm3
paddw mm4, mm5
paddw mm6, mm7
paddw mm0, PACKED_1 ;// mm0 += mm1 + (1, 1, 1, 1)
paddw mm2, PACKED_1 ;// mm2 += mm3 + (1, 1, 1, 1)
paddw mm4, PACKED_1 ;// mm4 += mm5 + (1, 1, 1, 1)
paddw mm6, PACKED_1 ;// mm6 += mm7 + (1, 1, 1, 1)
movd mm1, [edi] ;// lower 4 bytes into mm1 = edi[0..3]
movd mm3, [edi+4] ;// lower 4 bytes into mm3 = edi[4..7]
movd mm5, [edi+8] ;// lower 4 bytes into mm5 = edi[8..11]
movd mm7, [edi+12] ;// lower 4 bytes into mm7 = edi[12..15]
punpcklbw mm1, PACKED_0 ;// unpack the lower 2 bytes into mm1
punpcklbw mm3, PACKED_0 ;// unpack the lower 2 bytes into mm3
punpcklbw mm5, PACKED_0 ;// unpack the lower 2 bytes into mm5
punpcklbw mm7, PACKED_0 ;// unpack the lower 2 bytes into mm7
psrlw mm0, 1 ;// mm0 >>= 1
psrlw mm2, 1 ;// mm2 >>= 1
psrlw mm4, 1 ;// mm4 >>= 1
psrlw mm6, 1 ;// mm6 >>= 1
paddw mm0, mm1 ;// mm0 += mm1
paddw mm2, mm3 ;// mm2 += mm3
paddw mm4, mm5 ;// mm4 += mm5
paddw mm6, mm7 ;// mm6 += mm7
psrlw mm0, 1 ;// mm0 >>= 1
psrlw mm2, 1 ;// mm2 >>= 1
psrlw mm4, 1 ;// mm4 >>= 1
psrlw mm6, 1 ;// mm6 >>= 1
packuswb mm0, mm2 ;// pack mm0 and mm2
packuswb mm4, mm6 ;// pack mm4 and mm6
movq [edi], mm0 ;// store mm0 into edi[0..7]
movq [edi+8], mm4 ;// store mm4 into edi[8..15]
add esi, edx ;// esi += edx
add edi, edx ;// edi += edx
dec ecx ;// decrement ecx
jnz pred_comp__l6 ;// loop while not zero
emms ;// empty MMX state
}
return;
}
}
for (j=0; j<h; j++) { for (i=0; i<w; i++) d[i] = (d[i] + ((unsigned int)(s[i]+s[i+lx]+1)>>1)+1)>>1;
s+= lx; d+= lx; }
} else
{
if(cpu_MMX)
{
if(w == 8)
{
_asm
{
mov esi, s ;// esi = s
mov edi, d ;// edi = d
mov ecx, h ;// ecx = h
mov edx, lx ;// edx = lx
pred_comp__l7:
movd mm0, [esi] ;// lower 4 bytes into mm0 = esi[0..3]
movd mm1, [esi+edx] ;// lower 4 bytes into mm1 = (esi + edx)[0..3]
movd mm2, [esi+4] ;// lower 4 bytes into mm2 = esi[4..7]
movd mm3, [esi+edx+4] ;// lower 4 bytes into mm3 = (esi + edx)[4..7]
punpcklbw mm0, PACKED_0 ;// unpack the lower 4 bytes into mm0
punpcklbw mm1, PACKED_0 ;// unpack the lower 4 bytes into mm1
punpcklbw mm2, PACKED_0 ;// unpack the lower 4 bytes into mm2
punpcklbw mm3, PACKED_0 ;// unpack the lower 4 bytes into mm3
paddw mm0, mm1
paddw mm2, mm3
paddw mm0, PACKED_1 ;// mm0 += mm1 + (1, 1, 1, 1)
paddw mm2, PACKED_1 ;// mm2 += mm3 + (1, 1, 1, 1)
psrlw mm0, 1 ;// mm0 >>= 1
psrlw mm2, 1 ;// mm2 >>= 1
packuswb mm0, mm2 ;// pack mm0 and mm2
movq [edi], mm0 ;// store mm0 into edi[0..7]
add esi, edx ;// esi += edx
add edi, edx ;// edi += edx
dec ecx ;// decrement ecx
jnz pred_comp__l7 ;// loop while not zero
emms ;// empty MMX state
}
return;
}
if(w == 16)
{
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