mx1_ssi.c

mc9328mx1在UCOS操作系统下的SSI原代码

/*
 * mx1_ssi.c
 * Functions for Synchronous Serial Interface and CS4340
 * By	: Jing Zhang
 * Date	: 2004/06/15
 */

#define	MX1_SSI_FLAG
#include	"mx1_ssi.h"
#include	"mx1_gpio.h"
#include	"mx1_scm.h"
#include	"error.h"


void MX1_SSI_Init( T_MX1_SSI *ssi_module )
{
	if( ssi_module==MX1_SSI1 ){
		// Initialize the function muxing register for ssi1 to use gpio port c
		MX1_SCM->FMCR |= (SSI_RXFS_SEL_PC3|SSI_RXCLK_SEL_PC4|SSI_RXDAT_SEL_PC5\
			|SSI_TXFS_SEL_PC7|SSI_TXCLK_SEL_PC8);
		// Initialize the GPIO for SSI
		// SSI1_TXCLK
		MX1_GPIO_Conf( SSI_GPIO_PORT, 8, FUNC_PRI, DIR_IN, SRC_IN_ANY );
		// SSI1_TXFS
		MX1_GPIO_Conf( SSI_GPIO_PORT, 7, FUNC_PRI, DIR_IN, SRC_IN_ANY );
		// SSI1_TXDAT
		MX1_GPIO_Conf( SSI_GPIO_PORT, 6, FUNC_PRI, DIR_OUT, SRC_OUT_ANY );
		/////////////////Receive function is not used///////////////////////
		// SSI1_RXDAT
		//MX1_GPIO_Conf( SSI_GPIO_PORT, 5, FUNC_PRI, DIR_IN, SRC_IN_ANY );
		// SSI1_RXCLK
		//MX1_GPIO_Conf( SSI_GPIO_PORT, 4, FUNC_PRI, DIR_IN, SRC_IN_ANY );
		// SSI1_RXFS
		//MX1_GPIO_Conf( SSI_GPIO_PORT, 3, FUNC_PRI, DIR_IN, SRC_IN_ANY );
		// Configure the PB17 for RST of cs4340
		MX1_GPIO_Conf( MX1_GPIO_PB, 17, FUNC_IO, DIR_OUT, SRC_OUT_DR );
		DR_LOW( MX1_GPIO_PB, 17 );
		// Configure PC5 for MUTE of CS4340
		//MX1_GPIO_Conf( MX1_GPIO_PC, 5, FUNC_IO, DIR_OUT, SRC_OUT_DR );
		//DR_HIGH( MX1_GPIO_PC, 5 );
		// Initialize the SSI
		// Enable SSI
		ssi_module->SCSR |= (SCSR_SSI_ENABLE);
		// Enable Network mode, Disable transmit
		ssi_module->SCSR |= (SCSR_NET_NETWORK|SCSR_TE_DISABLE);
		// Disable DMA, Disable transmit interrupt, Enable transmit FIFO, frame sync generated externally,
		// External source must drive SSI_TXCLK, MSB transmitted first, ...
		ssi_module->STCR |= (STCR_TDMAE_DISABLE|STCR_TIE_DISABLE|STCR_TFEN_ENABLE|STCR_TFDIR_EXT\
			|STCR_TXDIR_EXT|STCR_TSHFD_MSB|STCR_TSCKP_FALLING|STCR_TFSI_LOW );
		// Configure the transmit clock configuration register
		ssi_module->STCCR |= (STCCR_PSR_BYPASS|STCCR_WL_16|STCCR_DC(1)|STCCR_PM(0));
		// Configure FIFO WATER MARK
		ssi_module->SFCSR |= (SFCSR_TFWM(8));
		// Enable SSI Transmit
		ssi_module->SCSR |= (SCSR_TE_ENABLE);
		// Reset CS4340
		CS4340_RESET();
	}else{
		ERROR( "Not implemented yet!" );
		return;
	}
}

void MX1_SSI_Write( T_MX1_SSI *ssi_module, unsigned int val )
{
	while( SFCSR_TFCNT(ssi_module)>=8 );
	ssi_module->STX = val;
}