📄 realtime.asm
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EXTU .S1 A3,16,16,A0 ; |232|
|| STH .D2T1 A0,*+SP(4) ; |232|
[!A0] BNOP .S1 L8,5 ; |232|
; BRANCH OCCURS ; |232|
;** --------------------------------------------------------------------------*
.line 8
RETNOP .S2 B3,4 ; |233|
ADD .D2 8,SP,SP ; |233|
; BRANCH OCCURS ; |233|
.endfunc 233,000000000h,8
.sect ".text"
.global _SetupInterrupts
.sym _SetupInterrupts,_SetupInterrupts, 32, 2, 0
.func 240
;******************************************************************************
;* FUNCTION NAME: _SetupInterrupts *
;* *
;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,B0,B1,B2,B3,B4,B5, *
;* B6,B7,B8,B9,SP,A16,A17,A18,A19,A20,A21,A22,A23, *
;* A24,A25,A26,A27,A28,A29,A30,A31,B16,B17,B18,B19, *
;* B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31 *
;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,B0,B1,B2,B3,B4,B5, *
;* B6,B7,B8,B9,DP,SP,A16,A17,A18,A19,A20,A21,A22, *
;* A23,A24,A25,A26,A27,A28,A29,A30,A31,B16,B17,B18, *
;* B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30, *
;* B31 *
;* Local Frame Size : 0 Args + 0 Auto + 8 Save = 8 byte *
;******************************************************************************
;******************************************************************************
;* *
;* Using -g (debug) with optimization (-o1) may disable key optimizations! *
;* *
;******************************************************************************
_SetupInterrupts:
;** --------------------------------------------------------------------------*
.line 2
STW .D2T2 B3,*SP--(8) ; |241|
STW .D2T1 A10,*+SP(4) ; |241|
MVC .S2 CSR,B4 ; |288|
AND .D2 -2,B4,B4 ; |288|
MVC .S2 B4,CSR ; |288|
ZERO .D1 A3 ; |289|
MVC .S2X A3,IER ; |289|
MVK .D2 -1,B4 ; |290|
MVC .S2 B4,ICR ; |290|
MVKL .S1 __IRQ_eventTable,A10 ; |239|
MVC .S2 IER,B4 ; |239|
|| MVKH .S1 __IRQ_eventTable,A10 ; |239|
LDW .D1T1 *+A10(4),A3 ; |239|
NOP 4
OR .D2X A3,B4,B4 ; |239|
MVC .S2 B4,IER ; |239|
MVC .S2 IER,B4 ; |239|
LDW .D1T1 *+A10(8),A3 ; |239|
NOP 4
OR .D2X A3,B4,B4 ; |239|
MVC .S2 B4,IER ; |239|
.line 6
MVKL .S1 _IRQ_map,A3 ; |245|
MVKH .S1 _IRQ_map,A3 ; |245|
CALL .S2X A3 ; |245|
ADDKPC .S2 RL11,B3,2 ; |245|
MVK .D2 0xd,B4 ; |245|
MVK .S1 0x13,A4 ; |245|
RL11: ; CALL OCCURS ; |245|
MVC .S2 IER,B4 ; |239|
LDW .D1T1 *+A10(76),A3 ; |239|
NOP 4
OR .D2X A3,B4,B4 ; |239|
MVC .S2 B4,IER ; |239|
MVC .S2 IER,B4 ; |294|
OR .D2 2,B4,B4 ; |294|
MVC .S2 B4,IER ; |294|
MVC .S2 CSR,B4 ; |269|
OR .D2 1,B4,B4 ; |269|
MVC .S2 B4,CSR ; |269|
.line 9
.line 10
LDW .D2T1 *+SP(4),A10 ; |249|
LDW .D2T2 *++SP(8),B3 ; |249|
NOP 4
RETNOP .S2 B3,5 ; |249|
; BRANCH OCCURS ; |249|
.endfunc 249,000080400h,8
.sect ".text"
.global _ConfigureAllTimers
.sym _ConfigureAllTimers,_ConfigureAllTimers, 32, 2, 0
.func 251
;******************************************************************************
;* FUNCTION NAME: _ConfigureAllTimers *
;* *
;* Regs Modified : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,B0,B1,B2,B3,B4,*
;* B5,B6,B7,B8,B9,SP,A16,A17,A18,A19,A20,A21,A22, *
;* A23,A24,A25,A26,A27,A28,A29,A30,A31,B16,B17,B18, *
;* B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30, *
;* B31 *
;* Regs Used : A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,B0,B1,B2,B3,B4,*
;* B5,B6,B7,B8,B9,DP,SP,A16,A17,A18,A19,A20,A21,A22,*
;* A23,A24,A25,A26,A27,A28,A29,A30,A31,B16,B17,B18, *
;* B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30, *
;* B31 *
;* Local Frame Size : 0 Args + 0 Auto + 12 Save = 12 byte *
;******************************************************************************
;******************************************************************************
;* *
;* Using -g (debug) with optimization (-o1) may disable key optimizations! *
;* *
;******************************************************************************
_ConfigureAllTimers:
;** --------------------------------------------------------------------------*
.line 2
.sym _gie,21, 14, 4, 32
.sym _base,20, 30, 4, 32
.sym _gie,21, 14, 4, 32
.sym _base,20, 30, 4, 32
.sym _gie,20, 14, 4, 32
.sym _base,3, 30, 4, 32
.sym _timer2,4, 24, 4, 32, $$fake0
.sym _timer1,20, 24, 4, 32, $$fake0
.sym _timer0,20, 24, 4, 32, $$fake0
STW .D2T2 B3,*SP--(16) ; |252|
STW .D2T1 A11,*+SP(12) ; |252|
STW .D2T1 A10,*+SP(8) ; |252|
.line 7
MVKL .S1 _TIMER_open,A3 ; |257|
MVKH .S1 _TIMER_open,A3 ; |257|
CALL .S2X A3 ; |257|
ADDKPC .S2 RL12,B3,1 ; |257|
ZERO .D2 B4 ; |257|
ZERO .D1 A4 ; |257|
NOP 1
RL12: ; CALL OCCURS ; |257|
MV .D2X A4,B4 ; |257|
NOP 1
LDW .D2T2 *+B4(8),B4 ; |209|
MVC .S2 CSR,B5 ; |273|
AND .D2 1,B5,B5 ; |273|
MVC .S2 CSR,B6 ; |274|
AND .D2 -2,B6,B6 ; |274|
MVC .S2 B6,CSR ; |274|
ZERO .D1 A10 ; |213|
STW .D2T1 A10,*B4 ; |213|
MVK .S2 4096,B6 ; |214|
STW .D2T2 B6,*+B4(4) ; |214|
STW .D2T1 A10,*+B4(8) ; |215|
MVK .S1 0x2c0,A11 ; |216|
STW .D2T1 A11,*B4 ; |216|
MVC .S2 CSR,B4 ; |279|
AND .D2 -2,B4,B4 ; |279|
|| AND .S2 1,B5,B5 ; |279|
OR .D2 B5,B4,B4 ; |279|
MVC .S2 B4,CSR ; |279|
.line 10
MVKL .S1 _TIMER_open,A3 ; |260|
MVKH .S1 _TIMER_open,A3 ; |260|
CALL .S2X A3 ; |260|
ADDKPC .S2 RL13,B3,1 ; |260|
ZERO .D2 B4 ; |260|
MVK .D1 0x1,A4 ; |260|
NOP 1
RL13: ; CALL OCCURS ; |260|
MV .D2X A4,B4 ; |260|
NOP 1
LDW .D2T2 *+B4(8),B4 ; |209|
MVC .S2 CSR,B5 ; |273|
AND .D2 1,B5,B5 ; |273|
MVC .S2 CSR,B6 ; |274|
AND .D2 -2,B6,B6 ; |274|
MVC .S2 B6,CSR ; |274|
STW .D2T1 A10,*B4 ; |213|
MVK .S2 256,B6 ; |214|
STW .D2T2 B6,*+B4(4) ; |214|
STW .D2T1 A10,*+B4(8) ; |215|
STW .D2T1 A11,*B4 ; |216|
MVC .S2 CSR,B4 ; |279|
AND .D2 1,B5,B4 ; |279|
|| AND .S2 -2,B4,B5 ; |279|
OR .D2 B4,B5,B4 ; |279|
MVC .S2 B4,CSR ; |279|
.line 13
MVKL .S1 _TIMER_open,A3 ; |263|
MVKH .S1 _TIMER_open,A3 ; |263|
CALL .S2X A3 ; |263|
ADDKPC .S2 RL14,B3,0 ; |263|
ZERO .D2 B4 ; |263|
NOP 2
MVK .D1 0x2,A4 ; |263|
RL14: ; CALL OCCURS ; |263|
LDW .D1T1 *+A4(8),A3 ; |209|
MVC .S2 CSR,B4 ; |273|
AND .D2 1,B4,B4 ; |273|
MVC .S2 CSR,B5 ; |274|
AND .D2 -2,B5,B5 ; |274|
MVC .S2 B5,CSR ; |274|
STW .D1T1 A10,*A3 ; |213|
ZERO .D2 B5 ; |214|
MVKH .S2 0x10000,B5 ; |214|
STW .D1T2 B5,*+A3(4) ; |214|
STW .D1T1 A10,*+A3(8) ; |215|
STW .D1T1 A11,*A3 ; |216|
MVC .S2 CSR,B5 ; |279|
AND .D2 1,B4,B5 ; |279|
|| AND .S2 -2,B5,B4 ; |279|
OR .D2 B5,B4,B4 ; |279|
MVC .S2 B4,CSR ; |279|
.line 14
.line 15
LDW .D2T1 *+SP(12),A11 ; |265|
LDW .D2T1 *+SP(8),A10 ; |265|
LDW .D2T2 *++SP(16),B3 ; |265|
NOP 4
RETNOP .S2 B3,5 ; |265|
; BRANCH OCCURS ; |265|
.endfunc 265,000080c00h,16
;******************************************************************************
;* MARK THE END OF THE SCALAR INIT RECORD IN CINIT:C *
;******************************************************************************
CIR: .sect ".cinit:c"
;******************************************************************************
;* UNDEFINED EXTERNAL REFERENCES *
;******************************************************************************
.global _IRQ_map
.global _TIMER_open
.global __CSL_init
.global _CSL6416_LIB_
.global __IRQ_eventTable
;******************************************************************************
;* TYPE INFORMATION *
;******************************************************************************
.sym _int16, 0, 3, 13, 16
.sym _int16, 0, 3, 13, 16
.sym _int16, 0, 3, 13, 16
.sym _uint16, 0, 13, 13, 16
.sym _uint16, 0, 13, 13, 16
.sym _int32, 0, 4, 13, 32
.sym _Uint32, 0, 14, 13, 32
.sym _Uint32, 0, 14, 13, 32
.sym _uint32, 0, 14, 13, 32
.sym _uint32, 0, 14, 13, 32
.stag $$fake0, 96
.member _allocated, 0, 14, 8, 32
.member _eventId, 32, 14, 8, 32
.member _baseAddr, 64, 30, 8, 32
.eos
.sym _TIMER_Handle, 0, 24, 13, 32,$$fake0
.stag $$fake3, 128
.member _funcAddr, 0, 16, 8, 32
.member _ieMask, 32, 14, 8, 32
.member _ccMask, 64, 14, 8, 32
.member _funcArg, 96, 14, 8, 32
.eos
.sym __IRQ_Dispatch, 0, 8, 13, 128,$$fake3
.stag $$fake2, 128
.member _biosPresent, 0, 14, 8, 32
.member _dispatchTable, 32, 24, 8, 32, $$fake3
.member _timerUsed, 64, 14, 8, 32
.member _timerNum, 96, 14, 8, 32
.eos
.stag $$fake4, 96
.member _hTimer, 0, 24, 8, 32, $$fake0
.member _event2IntTbl, 32, 30, 8, 32
.member _int2EventTbl, 64, 30, 8, 32
.eos
.utag $$fake1, 128
.member _args, 0, 8, 11, 128, $$fake2
.member _ret, 0, 8, 11, 96, $$fake4
.eos
.sym __CSL_Config, 0, 9, 13, 128,$$fake1
.etag $$fake5, 32
.member _NoIsrActive, 0, 4, 16, 32
.member _Isr1Active, 1, 4, 16, 32
.member _Isr2Active, 2, 4, 16, 32
.member _Isr3Active, 3, 4, 16, 32
.eos
.sym _ISR_LIST, 0, 10, 13, 32,$$fake5
.sym _ISR_LIST, 0, 10, 13, 32,$$fake5
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