pll.c

ADI blackfin processor BF527 Ezkti test driver

/*****************************************************************************
**																			**
**	 Name: 	main.c															**	
**																			**
******************************************************************************

(C) Copyright 2004 - Analog Devices, Inc.  All rights reserved.

Pjoject Name:	BF537 POST ATE

Date Modified:	01 Sept 2005

Software:		VisualDSP++ 4.0

Hardware:		ADSP-BF537 EZ-KIT Lite

Connections:	

Purpose:		Purpose:		Perform a POST ATE on the BF537 EZ-Kit Lite

*****************************************************************************/
#include <cdefBF537.h>
#include <ccblkfn.h>




void Init_PLL(void)
{ 
  //These are the settings from the ehternet loopback test (the only other PLL code I could find)
	*pSIC_IWR |= 0x1;		// enable PLL wakeup
	*pPLL_CTL =  0x3000;	// MSEL= x39,  DF= %2
	
	ssync();
 	idle();							  // put in idle
	
	*pPLL_DIV =  0x0005;	// CSEL= %1, SSEL= %4
	*pVR_CTL = 0x42DB;
  	
}