📄 cstartup.s
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/* ---------------------------------------------------------------------------- * ATMEL Microcontroller Software Support - ROUSSET - * ---------------------------------------------------------------------------- * Copyright (c) 2006, Atmel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * - Redistributions of source code must retain the above copyright notice, * this list of conditions and the disclaimer below. * * - Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the disclaimer below in the documentation and/or * other materials provided with the distribution. * * Atmel's name may not be used to endorse or promote products derived from * this software without specific prior written permission. * * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ---------------------------------------------------------------------------- * File Name : cstartup.S * Object : * Creation : FDy Nov 10th 2006 *----------------------------------------------------------------------------- */.section start .text#include "./include/at91sam9261_inc.h"#define IRQ_STACK_SIZE (2*8*4) /* 2 words per interrupt priority level */#define INTRAM_START 0x300000#define STACK_ADDR 0x301000 /* temporary stack for lowlevel init */#define ARM_MODE_FIQ 0x11#define ARM_MODE_IRQ 0x12#define ARM_MODE_SVC 0x13#define I_BIT 0x80#define F_BIT 0x40/*---------------------------------------------------------------------------- Area Definition---------------- Must be defined as function to put first in the code as it must be mapped at offset 0 of the flash EBI_CSR0, ie. at address 0 before remap._---------------------------------------------------------------------------*//* Application startup entry point */ .globl reset .align 4reset:/* Exception vectors (should be a branch to be detected as a valid code by the rom */_exception_vectors: b reset_vector /* reset */undef_vector: b undef_vector /* Undefined Instruction */swi_vector: b swi_vector /* Software Interrupt */pabt_vector: b pabt_vector /* Prefetch Abort */dabt_vector: b dabt_vector /* Data Abort */rsvd_vector: b rsvd_vector /* reserved */ b irq_vector /* IRQ : read the AIC */fiq_vector: b fiq_vector /* FIQ *//*------------------------------------------------------------------------------ *- Function : irq_vector *- Treatments : IRQ Controller Interrupt Handler. *- Called Functions : AIC_IVR[interrupt] *------------------------------------------------------------------------------*/_AT91C_BASE_AIC: .word AT91C_BASE_AIC_TOP_OF_MEM: .word TOP_OF_MEM_AT91C_PMC_SR: .word AT91C_PMC_SR_AT91C_PMC_MOR: .word AT91C_PMC_MOR_AT91C_PMC_MCKR: .word AT91C_PMC_MCKRirq_vector:/*- Manage Exception Entry *//*- Adjust and save LR_irq in IRQ stack */ sub lr, lr, #4 stmfd sp!, {lr}/*- Save r0 and SPSR in IRQ stack */ mrs r14, SPSR stmfd sp!, {r0,r14}/*- Write in the IVR to support Protect Mode *//*- No effect in Normal Mode *//*- De-assert the NIRQ and clear the source in Protect Mode */ ldr r14, _AT91C_BASE_AIC ldr r0 , [r14, #AIC_IVR] str r14, [r14, #AIC_IVR]/*- Enable Interrupt and Switch in Supervisor Mode */ msr CPSR_c, #ARM_MODE_SVC/*- Save scratch/used registers and LR in User Stack */ stmfd sp!, {r1-r3, r12, r14}/*- Branch to the routine pointed by the AIC_IVR */ mov r14, pc bx r0/*- Restore scratch/used registers and LR from User Stack */ ldmia sp!, {r1-r3, r12, r14}/*- Disable Interrupt and switch back in IRQ mode */ msr CPSR_c, #ARM_MODE_IRQ | I_BIT/*- Mark the End of Interrupt on the AIC */ ldr r14, _AT91C_BASE_AIC str r14, [r14, #AIC_EOICR]/*- Restore SPSR_irq and r0 from IRQ stack */ ldmia sp!, {r0,r14} msr SPSR_cxsf, r14/*- Restore adjusted LR_irq from IRQ stack directly in the PC */ ldmia sp!, {pc}^/*------------------------------------------------------------------------------ *- Function : reset_vector *- Treatments : Reset Interrupt Handler. *- Called Functions : lowlevel_init * main *------------------------------------------------------------------------------*/reset_vector:/*------------------------------------------------------------------------------ *- Low level Init is performed in a C function: lowlevel_init *- Init Stack Pointer to a valid memory area before calling lowlevel_init *------------------------------------------------------------------------------*//*- Temporary stack in internal RAM for Low Level Init execution */ ldr sp, =STACK_ADDR ldr r0, =lowlevel_init mov lr, pc bx r0 /* Branch on C function (interworking) *//*------------------------------------------------------------------------------ *- Setup the stack for each mode *------------------------------------------------------------------------------*/ ldr r0, _TOP_OF_MEM/*- Set up Interrupt Mode and set IRQ Mode Stack */ msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT mov r13, r0 sub r0, r0, #IRQ_STACK_SIZE/*- Enable interrupt & Set up Supervisor Mode and set Supervisor Mode Stack */ msr CPSR_c, #ARM_MODE_SVC | F_BIT mov r13, r0/* Copy the vector table and remap */_vect_copy: ldr r0, =reset ldr r1, =INTRAM_START ldr r2, =reset_vectorcopy_loop: ldmia r0!, {r3-r10} /* copy from source address [r0] */ stmia r1!, {r3-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end address [r2] */ blt copy_loop/* Remap the memory */ ldr r0, =AT91C_MATRIX_MCFG mov r1, #(0x3) str r1, [r0] /* Branch on C code Main function (with interworking) */_branch_main: ldr r4, =main mov lr, pc bx r4
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