📄 sim_tutorial3.mdl
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Version "1.2.0"
TargetFcnLib "ansi_tfl_tmw.mat"
TargetLibSuffix ""
TargetPreCompLibLocation ""
GenFloatMathFcnCalls "ANSI_C"
UtilityFuncGeneration "Auto"
GenerateFullHeader on
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GenerateTestInterfaces off
IsPILTarget off
ModelReferenceCompliant on
IncludeMdlTerminateFcn on
CombineOutputUpdateFcns off
SuppressErrorStatus off
IncludeERTFirstTime on
ERTFirstTimeCompliant off
IncludeFileDelimiter "Auto"
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SupportAbsoluteTime on
LogVarNameModifier "rt_"
MatFileLogging on
MultiInstanceERTCode off
SupportNonFinite on
SupportComplex on
PurelyIntegerCode off
SupportContinuousTime on
SupportNonInlinedSFcns on
ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
GenerateASAP2 off
}
PropName "Components"
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PropName "Components"
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Name "Configuration"
SimulationMode "normal"
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PropName "ConfigurationSets"
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LatchByCopyingInsideSignal off
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BusObject "BusObject"
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RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
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BlockType ToWorkspace
VariableName "simulink_output"
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Decimation "1"
SampleTime "0"
FixptAsFi off
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Inputs "2"
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A "a"
B "B"
C "c"
D "D"
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WaveForm "square"
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BlockType SignalGenerator
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Frequency ".9"
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SaveFormat "Structure With Time"
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BlockType Reference
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SourceBlock "simulink/Sinks/XY Graph"
SourceType "XY scope."
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RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
xmin "-3e-6"
xmax "3e-6"
ymin "-3e-6"
ymax "3e-6"
st "-1"
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DstBlock "XY Graph"
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SrcPort 1
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DstBlock "SS for unbalance"
DstPort 1
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DstBlock "Mux1"
DstPort 1
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SrcPort 1
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DstBlock "Mux2"
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DstBlock "Mux2"
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Points [60, 0]
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SrcBlock "SS for unbalance"
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Branch {
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DstBlock "Demux1"
DstPort 1
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DstBlock "To Workspace"
DstPort 1
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FontName "Arial"
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