tvp5146.c

IT projecotr reference design.

/*****************************************************************************
**             TEXAS INSTRUMENTS PROPRIETARY INFORMATION
**
**  (c) Copyright, Texas Instruments Incorporated, 2006.
**      All Rights Reserved.
**
**  Property of Texas Instruments Incorporated. Restricted Rights -
**  Use, duplication, or disclosure is subject to restrictions set
**  forth in TI's program license agreement and associated documentation.
******************************************************************************/

/* This code was written from the TI TVP5146 spec */

#include "common.h"
#include "rta_pub.h"
#include "rta_tsk.h"
#include "rta_sem.h"
#include "tmr.h"
#include "i2c.h"
#include "TVP5146.h"

/* defines for I2c bus configuration */
#define DEC_CLOCK_RATE		400000
#define DEC_LOWPOWER_CLK	100000
#define DEC_SPIKE_FILTER  	15

/* Register defines */

#define INPUT_SELECT  		0x00
#define AFE_GAIN_CRTL		0x01
#define VIDEO_STD			0x02
#define OP_MODE				0x03
#define	AUTO_SWCH_MASK		0x04
#define COLOR_KILLER		0x05
#define LUM_PROC_CTRL1		0x06
#define LUM_PROC_CTRL2		0x07
#define LUM_PROC_CTRL3		0x08
#define LUM_BRIGHT			0x09   // Primary Bright - something like the TVP SW GUI
#define LUM_CONTRAST        0x0A   // Primary Contrast
#define CHROM_SAT			0x0B
#define CHROM_HUE			0x0C
#define CHROM_PROC_CTRL1	0x0D
#define CHROM_PROC_CTRL2	0x0E  // 0x0F is reserved
#define COMP_PR_SAT         0x10
#define COMP_Y_SAT          0x11
#define COMP_PB_SAT         0x12  
#define COMP_PR_BRIGHT      0x13
#define COMP_Y_BRIGHT       0x14  
#define COMP_PB_BRIGHT      0x15
#define AVID_START_PIX_1    0x16
#define AVID_START_PIX_2    0x17
#define AVID_STOP_PIX_1     0x18
#define AVID_STOP_PIX_2     0x19
#define HSYNC_START_PIX_1   0x1a
#define HSYNC_START_PIX_2   0x1b
#define HSYNC_STOP_PIX_1    0x1c
#define HSYNC_STOP_PIX_2    0x1d
#define VSYNC_START_PIX_1   0x1e
#define VSYNC_START_PIX_2   0x1f
#define VSYNC_STOP_PIX_1    0x20
#define VSYNC_STOP_PIX_2    0x21
#define VBLK_START_LINE_1   0x22
#define VBLK_START_LINE_2   0x23
#define VBLK_STOP_LINE_1    0x24
#define VBLK_STOP_LINE_2    0x25 // 0x26 and 0x27 is Reserved
#define FAST_SWITCH_CTRL    0x28
#define FAST_SWITCH_OVLAY   0x29
#define FAST_SWITCH_SCART   0x2a
#define OVERLAY_DELAY       0x2b
#define SCART_DELAY         0x2c
#define CTI_DELAY           0x2d
#define CTI_CTRL            0x2e // 0x2F - 0x30 is Reserved
#define GLCO_RTC            0x31
#define SYNC_CTRL           0x32
#define OUTPUT_FRMATER1     0x33
#define OUTPUT_FRMATER2     0x34
#define OUTPUT_FRMATER3     0x35
#define OUTPUT_FRMATER4     0x36
#define OUTPUT_FRMATER5     0x37
#define OUTPUT_FRMATER6     0x38
#define CLR_LST_LCK_DETECT  0x39
#define STATUS1             0x3A
#define STATUS2             0x3B
#define AGC_GAIN_STATUS_1   0x3C
#define AGC_GAIN_STATUS_2   0x3D
#define SCH_PHASE_STATUS    0x3E
#define VIDEO_STDARD_STATUS 0x3F
#define GPIO_INPUT1         0x40
#define GPIO_INPUT2         0x41
#define VERT_LINE_COUNT_1   0x42
#define VERT_LINE_COUNT_2   0x43 // 0x44 and 0x45 is reserved
#define AFE_CGAIN_CH1       0x46
#define AFE_CGAIN_CH2       0x47
#define AFE_CGAIN_CH3       0x48
#define AFE_CGAIN_CH4       0x49
#define AFE_FGAIN_PB_B_1    0x4a
#define AFE_FGAIN_PB_B_2    0x4b
#define AFE_FGAIN_YG_CHR_1  0x4c
#define AFE_FGAIN_YG_CHR_2  0x4d
#define AFE_FGAIN_PR_R_1    0x4e
#define AFE_FGAIN_PR_R_2    0x4f
#define AFE_FGAIN_CVBS_LUM1 0x50
#define AFE_FGAIN_CVBS_LUM2 0x51 // 0x52 - 0x6f is reserved
#define ROM_VERSION         0x70 // 0x71 - 0x73 is reserved
#define AGC_WHITE_PEAK      0x74 // 0x75 - 0x77 is reserved
#define AGC_INCR_SPD        0x78
#define AGC_INCR_DELAY      0x79 // 0x7a - 0x7f is reserved
#define CHIP_ID_MSB         0x80
#define CHIP_ID_LSB         0x81 // 0x82 - 0xB0 is reserved
#define VDP_TTX_F1_M1       0xB1 // F1 - Filter 1  M1 - Mask 1
#define VDP_TTX_F1_M2       0xB2
#define VDP_TTX_F1_M3       0xB3
#define VDP_TTX_F1_M4       0xB4
#define VDP_TTX_F1_M5       0xB5
#define VDP_TTX_F2_M1       0xB6
#define VDP_TTX_F2_M2       0xB7
#define VDP_TTX_F2_M3       0xB8
#define VDP_TTX_F2_M4       0xB9
#define VDP_TTX_F2_M5       0xBA
#define VDP_TTX_FIT_CTRL    0xBB
#define VDP_FIFO_WD_COUNT   0xBC
#define VDP_FIFO_INT_THRES  0xBD // 0xBE is reserved
#define VDP_FIFO_RESET      0xBF
#define VDP_FIFO_OUT_CTRL   0xC0
#define VDP_LINE_NUM_INT    0xC1
#define VDP_PIX_ALIGN_1     0xC2
#define VDP_PIX_ALIGN_2     0xC3 // 0xC4 - 0xD5 is reserved
#define VDP_LINE_START      0xD6
#define VDP_LINE_STOP       0xD7
#define VDP_GLOBL_LINE_MODE 0xD8
#define VDP_FULL_FIELD_ENA  0xD9
#define VDP_FULL_FIELD_MODE 0xDA // 0xDB - 0xDF is reserved 
#define VBUS_ACCESS_WNO_INC 0xE0
#define VBUS_ACCESS_W_INC   0xE1
#define FIFO_READ_DATA      0xE2 // 0xE3 - 0xE7 is reserved
#define VBUS_ADDR_ACCESS_1  0xE8
#define VBUS_ADDR_ACCESS_2  0xE9 // 0xEB - 0xEF is reserved
#define INT_RAW_STATUS_0    0xF0
#define INT_RAW_STATUS_1    0xF1
#define INT_STATUS_0        0xF2
#define INT_STATUS_1        0xF3
#define INT_MASK_0          0xF4
#define INT_MASK_1          0xF5
#define INT_CLEAR_0         0xF6
#define INT_CLEAR_1         0xF7

I2CPORT i2c_port;
uint08 	i2c_addr;
uint32 i2c_sem;

//=================================================================================================
const uint08 DEC_InitDataCommon[] = {		// common init data for TVP51xx video decoder
	0x00, 0x0C,		// CVBS CH4
	0x02, 0x00,		// auto switch
	0x04, 0x3F,		// auto switch MASK
	0x06, 0x40,		// Pedestal off
	0x08, 0x00,		// Default trap filter BW
	0x0E, 0x0A,		// Wideband chroma filter disabled, PAL compensation always on
	0x1A, 0x01,     // HSYNC start pixel = 1 for chroma sample alignment with micronas
	0x1B, 0x00,     // HSYNC start pixel MSB
	0x2E, 0x00,     // CTI Gain
//	0x2E, 0x02,     // CTI Gain
	0x31, 0x05,		// GLCO in ADI mode
	0x32, 0x18,		// field 1 low/field 2 high, positive v sync, negative h sync
	0x33, 0x40,		// ITU 656 (extended range), 10-bit embedded Syncs
//	0x33, 0x41,		// BT.601 sample rate (extended range), 20-bit 422 with separate Syncs
	0x34, 0x11,		// OUTPUTS ACTIVE
	0x35, 0x22,		// AVID and FID Active
	0x36, 0xAF,		// HS and VS ACTIVE
	0x37, 0xFF,		// C_2 - C_5 is input(default)
	0x75, 0x16,		// Fast lock, F bit toggle mode for ddp2230 compatibility

    0x07, 0x20,     // Artifact mitigation
//	0x407ee5 = 0x10  NTSC
	0xE8, 0xE5,		// VA0
	0xE9, 0x7E,		// VA1
	0xEA, 0x40,		// VA2
	0xE0, 0x10,
//  0x407eb1 = 0x10  PAL
	0xE8, 0xB1,     // VA0
	0xE9, 0x7E,		// VA1
	0xEA, 0x40,		// VA2
	0xE0, 0x10,
//  0x407e7d = 0x10  NTSC443
	0xE8, 0x7D,     // VA0
	0xE9, 0x7E,		// VA1
	0xEA, 0x40,		// VA2
	0xE0, 0x10,
//-----------------------------------------------
	0xFF, 0xFF,		// End mark
};

//-----------------------------------------------------------------------------
//@RoutineName :: DEC_I2CMasterWrite
//
//@Description :: TVP51xx Video Decoder uCode downloading
//
//@Parameter   ::
//	uint08 *pI2cCmdData		:	pointer to I2C command data
//
//@Return      :: int08: PASS/FAIL
//-----------------------------------------------------------------------------
int08 DEC_i2c_MasterWrite( I2CPORT  Port, uint16  DeviceAddress,  uint32  NumOfBytes,  
                                uint08 *  WriteBuffer, uint32  ByteDelay, uint32  Timeout,  
                                uint32 *  BytesWritten )
{
	int08 RetVal = PASS;

	// Reserve I2C Semaphore
	if (RTA_SemReserve(i2c_sem, TMR_ConvertMSToTicks(1000)) != RTA_SUCCESS) {
		return FAIL;
	}
		
	RetVal = I2C_MasterWrite(Port,
		                    DeviceAddress,
						    NumOfBytes,				/* num write bytes */
						    WriteBuffer,
						    ByteDelay,				/* byte delay */
						    Timeout,			/* timeout */
						    BytesWritten);

	// Release I2C Semaphore
	RTA_SemRelease(i2c_sem);
	
	return RetVal;
}

int08 DEC_i2c_MasterWriteRestartRead  (  I2CPORT Port, uint16  DeviceAddress,  uint32  NumOfWrtBytes,  
                                    uint08 * WriteBuffer, uint32  ByteDelay, uint32  NumOfRdBytes,  
                                    uint08 * ReadBuffer,  uint32  Timeout,  uint32 *  BytesWritten,  
                                    uint32 *  BytesRead )  
 {
 	int08 RetVal = PASS;
	
	
		// Reserve I2C Semaphore
	if (RTA_SemReserve(i2c_sem, TMR_ConvertMSToTicks(1000)) != RTA_SUCCESS) {
		return FAIL;
	}
	
		
	RetVal = I2C_MasterWriteRestartRead(Port,
		                    DeviceAddress,
						    NumOfWrtBytes,				/* num write bytes */
						    WriteBuffer,
						    ByteDelay,				/* byte delay */
						    NumOfRdBytes,
						    ReadBuffer,
						    Timeout,			/* timeout */
						    BytesWritten,
						    BytesRead);
	
	
	// Release I2C Semaphore
	RTA_SemRelease(i2c_sem);
	
	return RetVal;
 
 
 }






//-----------------------------------------------------------------------------
//@RoutineName :: DEC_I2CMasterWriteCmds
//
//@Description :: TVP51xx Video Decoder uCode downloading
//
//@Parameter   ::
//	uint08 *pI2cCmdData		:	pointer to I2C command data
//
//@Return      :: int08: PASS/FAIL
//-----------------------------------------------------------------------------
int08 DEC_I2CMasterWriteCmds(  uint08 *pI2cCmdData)
{
	int08 RetVal = PASS;
	uint32 numWritten;

	while (RetVal == PASS && *pI2cCmdData != 0xFF) {
		RetVal = DEC_i2c_MasterWrite(i2c_port,
		                (uint16) i2c_addr,
						2,				/* num write bytes */
						(uint08 *) pI2cCmdData,
						0,				/* byte delay */
						1000,			/* timeout */
						&numWritten);
		pI2cCmdData += 2;	// point to next command
	}
	
	return RetVal;
}

//-----------------------------------------------------------------------------
//@RoutineName :: DEC_uCodeDownload
//
//@Description :: TVP51xx Video Decoder uCode downloading
//
//@Parameter   ::
//	uint08 i2c_addr	:	I2C Device Address
//	int16  CodeSize			:	Code Size (bytes)
//	int08  *puCode			:	pointer to uCode
//
//@Return      :: int08: PASS/FAIL
//-----------------------------------------------------------------------------
const uint08 DEC_DataResetCPU[] = {	// RESET internal CPU
//	WR_IND,VID_DEC,0x01,0xB00060,0x01
	0xE8, 0x60,		// VA0
	0xE9, 0x00,		// VA1
	0xEA, 0xB0,		// VA2
	
	0xE0, 0x01,
//-----------------------------------------------
	0xFF, 0xFF,		// End mark
};

const uint08 DEC_DataPramReset[] = {	// Set PRAM & RESET internal CPU
//	WR_IND,VID_DEC,0x01,0xB00060,0x03
	0xE8, 0x60,		// VA0
	0xE9, 0x00,		// VA1
	0xEA, 0xB0,		// VA2
	
	0xE0, 0x03,
//-----------------------------------------------
	0xFF, 0xFF,		// End mark
};

const uint08 DEC_DataPram[] = {		// Set PRAM bit only
//	WR_IND,VID_DEC,0x01,0xB00060,0x02
	0xE8, 0x60,		// VA0
	0xE9, 0x00,		// VA1
	0xEA, 0xB0,		// VA2
	
	0xE0, 0x02,
//-----------------------------------------------
	0xFF, 0xFF,		// End mark
};

const uint08 DEC_PramAddr[] = {		// Set PRAM start address
	0xE8, 0x00,		// VA0
	0xE9, 0x00,		// VA1
	0xEA, 0x40,		// VA2
//-----------------------------------------------
	0xFF, 0xFF,		// End mark
};

int08 DEC_uCodeDownload(  int16 CodeSize, uint08 *puCode)
{
	int08  RetVal = PASS;
	uint32 numWritten;
	
	// Reset internal CPU
	RetVal = DEC_I2CMasterWriteCmds((uint08 *) &(DEC_DataResetCPU[0]));
	
	// Set PRAM start address
	if (RetVal == PASS)
		RetVal = DEC_I2CMasterWriteCmds((uint08 *) &(DEC_PramAddr[0]));
	
	// Download the uCodes
	if (RetVal == PASS)
		RetVal = DEC_i2c_MasterWrite(i2c_port,
		                (uint16) i2c_addr,
						CodeSize,			/* num write bytes */
						puCode,
						0,				/* byte delay */
						1000,			/* timeout */
						&numWritten);
						
	
	// Set PRAM & RESET internal CPU
	if (RetVal == PASS)
		RetVal = DEC_I2CMasterWriteCmds((uint08 *) &(DEC_DataPramReset[0]));
	
	// Set PRAM bit only
	if (RetVal == PASS)
		RetVal = DEC_I2CMasterWriteCmds((uint08 *) &(DEC_DataPram[0]));
	
	return RetVal;
}

//-----------------------------------------------------------------------------
//@RoutineName :: DEC_InitCommon
//
//@Description :: TVP51xx Video Decoder common initializations
//
//@Parameter   ::
//	uint08 i2c_addr	:	I2C Device Address
//
//@Return      :: int08: PASS/FAIL
//-----------------------------------------------------------------------------
int08 DEC_InitCommon(void)
{
	int08 RetVal;
	
	RetVal = DEC_I2CMasterWriteCmds((uint08 *) &(DEC_InitDataCommon[0]));
	
	return RetVal;
}


//-----------------------------------------------------------------------------
//@RoutineName :: DEC_SetStandard
//
//@Description :: TVP51xx Video Decoder Set Video Standard (force)
//
//@Parameter   ::
//	uint08 i2c_addr	:	I2C Device Address
//	VideoStdType standard	:	Video Standard code
//
//@Return      :: int08: PASS/FAIL
//-----------------------------------------------------------------------------
int08 DEC_SetStandard(  VideoStdTypeEnum standard)
{
	int08  RetVal;
	uint08 WorkUint08[2];
	uint32 numWritten;