adc.h

IT projecotr reference design.

/* Active interface select */
#define ADC_ANALOG_INTERFACE    0
#define ADC_DIGITAL_INTERFACE   1

/* Active HSYNC select mode */
#define ADC_AUTO_HSYNC_SELECT     0
#define ADC_MANUAL_HSYNC_SELECT   1

/* Active HSYNC select */
#define ADC_HSYNC_INPUT     0
#define ADC_SOG_INPUT       1

/* Active VSYNC select mode */
#define ADC_AUTO_VSYNC_SELECT    0
#define ADC_MANUAL_VSYNC_SELECT  1

/* Active VSYNC select */
#define ADC_VSYNC_INPUT             0
#define ADC_SYNC_SEPARATOR_OUTPUT   1

/* Chip power */
#define ADC_CHIP_POWER_DOWN     0
#define ADC_CHIP_POWER_UP       1

/* Scan function */
#define ADC_SCAN_FUNCTION_DISABLED  0
#define ADC_SCAN_FUNCTION_ENABLED   1

/* Coast polarity select mode */
#define ADC_AUTO_SELECT_COAST_POLARITY      0
#define ADC_MANUAL_SELECT_COAST_POLARITY    1

/* HSYNC polarity select mode */
#define ADC_AUTO_SELECT_HSYNC_POLARITY      0
#define ADC_MANUAL_SELECT_HSYNC_POLARITY    1

/* DVI Clock Inverted */
#define ADC_DVI_CLOCK_NOT_INVERTED	0
#define ADC_DVI_CLOCK_INVERTED		1

/* HDCP Master Serial Port */
#define ADC_HDCP_SERIAL_PORT_TRISTATED		0
#define ADC_HDCP_SERIAL_PORT_NOT_TRISTATED	1


/*****************************************************************************/
/* Macros defining status ****************************************************/
/*****************************************************************************/

/* HSYNC Activity Status */
#define ADC_HSYNC_NOT_DETECTED	0
#define ADC_HSYNC_DETECTED		1

/* SOG Activity Status */
#define ADC_SOG_NOT_DETECTED	0
#define ADC_SOG_DETECTED		1

/* VSYNC Activity Status */
#define ADC_VSYNC_NOT_DETECTED	0
#define ADC_VSYNC_DETECTED		1

/* DVI Activity Status */
#define ADC_DVI_CLOCK_NOT_DETECTED	0
#define ADC_DVI_CLOCK_DETECTED		1

/* Active Interface Status */
#define ADC_ANALOG_IF_ACTIVE	0
#define ADC_DIGITAL_IF_ACTIVE	1

/* Active HSYNC Status */
#define ADC_HSYNC_ON_HSYNC	0
#define ADC_HSYNC_ON_SOG	1

/* HSYNC Polarity Status */
#define ADC_HSYNC_IS_NEGATIVE	0
#define ADC_HSYNC_IS_POSITIVE	1

/* Active VSYNC Status */
#define ADC_VSYNC_ON_VSYNC	0
#define ADC_VSYNC_ON_SOG	1

/* VSYNC Polarity Status */
#define ADC_VSYNC_IS_NEGATIVE	0
#define ADC_VSYNC_IS_POSITIVE	1

/* VSYNC Polarity Status */
#define ADC_COAST_IS_NEGATIVE	0
#define ADC_COAST_IS_POSITIVE	1


/*****************************************************************************/
/* Public structure typedefs *************************************************/
/*****************************************************************************/

typedef struct
{
    uint16 LowerLimit;
    uint16 UpperLimit;
}ADC_LimitStruct;

typedef struct
{
	uint32 TaskID;
	int08  Error;	
}ADC_DriverErrorStruct;

/*****************************************************************************/
/* Public function prototypes ************************************************/
/*****************************************************************************/

/* Miscellaneous */
uint08 ADC_IsThere48BitPort(void);
uint08 ADC_GetMaxSampleFreqInMHz(void);
int08  ADC_GetI2CDriverErrno(void);
int08  ADC_GetRTAErrno(void);
int08  ADC_GetI2CErrorStruct(ADC_DriverErrorStruct *i2c_error_struct);
int08  ADC_GetRTAErrorStruct(ADC_DriverErrorStruct *rta_error_struct);
BOOL   ADC_IsI2CDead(void);

/* Initialization */
void  ADC_CfgADC(I2CPORT i2c_port, I2CINIT *i2c_cfg, uint16 i2c_address, uint08 max_sample_freq_in_mhz, uint16 cap_in_nanofarads);
int08 ADC_InitADC(void);

/* Software revision */
int08 ADC_GetSoftwareRevision(uint08* sw_rev);

/* Firmware revision */
int08 ADC_GetFirmwareRevision(uint08* fw_rev);

/* PLL divider control */ 
int08 ADC_SetPLLDivider(uint16 pll_divide_ratio);
int08 ADC_GetPLLDivider(uint16* pll_divide_ratio);
int08 ADC_GetPLLLimits(ADC_LimitStruct *limits);

/* Gain and offset control */  
int08 ADC_SetGain(uint16 red, uint16 green, uint16 blue);
int08 ADC_GetGain(uint16 *red, uint16 *green, uint16 *blue);
int08 ADC_SetOffset(uint16 red, uint16 green, uint16 blue);
int08 ADC_GetOffset(uint16 *red, uint16 *green, uint16 *blue);
int08 ADC_SetGainAndOffset(uint16 red_gain, 
                           uint16 green_gain,
                           uint16 blue_gain,
                           uint16 red_offset,
                           uint16 green_offset,
                           uint16 blue_offset);                                  
int08 ADC_GetGainLimits(ADC_LimitStruct* limits);
int08 ADC_GetOffsetLimits(ADC_LimitStruct* limits);
                                 
/* Clamp timing control */
int08 ADC_SetClampPlacement(uint16 clamp_placement);
int08 ADC_GetClampPlacement(uint16 *clamp_placement);
int08 ADC_SetClampDuration(uint16 clamp_duration);
int08 ADC_GetClampDuration(uint16 *clamp_duration);
int08 ADC_GetClampPlacementLimits(ADC_LimitStruct *limits);
int08 ADC_GetClampDurationLimits(ADC_LimitStruct *limits);

/* HSYNC pulse width */
int08 ADC_SetHsyncPulseWidth(uint16 hsync_pulse_width);
int08 ADC_GetHsyncPulseWidth(uint16 *hsync_pulse_width);
int08 ADC_GetHsyncPulseWidthLimits(ADC_LimitStruct *limits);

/* General control */
int08 ADC_SetOutputPortWidth(uint08 output_width_is_48);
int08 ADC_GetOutputPortWidth(uint08 *output_width_is_48);
int08 ADC_SetDVIOutputPortWidth(uint08 output_width_is_48);
int08 ADC_GetDVIOutputPortWidth(uint08 *output_width_is_48);
int08 ADC_SetInputHSYNCPolarity(uint08 active_high);
int08 ADC_GetInputHSYNCPolarity(uint08 *active_high);
int08 ADC_SetOutputHSYNCPolarity(uint08 active_high);
int08 ADC_GetOutputHSYNCPolarity(uint08 *active_high);
int08 ADC_SetExternalCOASTPolarity(uint08 active_high);
int08 ADC_GetExternalCOASTPolarity(uint08 *active_high);
int08 ADC_SetClampSignalSource(uint08 external_clamp);
int08 ADC_GetClampSignalSource(uint08 *external_clamp);
int08 ADC_SetExternalClampSignalPolarity(uint08 active_high);
int08 ADC_GetExternalClampSignalPolarity(uint08 *active_high);
int08 ADC_SetRedClampLevel(uint08 mid_level);
int08 ADC_GetRedClampLevel(uint08 *mid_level);
int08 ADC_SetGreenClampLevel(uint08 mid_level);
int08 ADC_GetGreenClampLevel(uint08 *mid_level);
int08 ADC_SetBlueClampLevel(uint08 mid_level);
int08 ADC_GetBlueClampLevel(uint08 *mid_level);
int08 ADC_SetExternalClockSelect(uint08 external_clock);
int08 ADC_GetExternalClockSelect(uint08 *external_clock);
int08 ADC_SetOutputPortPhase(uint08 port_b_first);
int08 ADC_GetOutputPortPhase (uint08 *port_b_first);
int08 ADC_SetOutputDriveLevel(uint08 drive_level);
int08 ADC_GetOutputDriveLevel(uint08 *drive_level);
int08 ADC_SetOutputPower(uint08 tri_state_outputs);
int08 ADC_GetOutputPower(uint08 *tri_state_outputs);
int08 ADC_SetActiveInterfaceMode(uint08 active_if_mode);
int08 ADC_GetActiveInterfaceMode(uint08 *active_if_mode);
int08 ADC_SetActiveInterface(uint08 active_if);
int08 ADC_GetActiveInterface(uint08 *active_if);
int08 ADC_SetActiveHSYNCMode(uint08 active_hsync_mode);
int08 ADC_GetActiveHSYNCMode(uint08 *active_hsync_mode);
int08 ADC_SetActiveHSYNC(uint08 active_hsync);
int08 ADC_GetActiveHSYNC(uint08 *active_hsync);
int08 ADC_SetActiveVSYNCMode(uint08 active_vsync_mode);
int08 ADC_GetActiveVSYNCMode(uint08 *active_vsync_mode);
int08 ADC_SetActiveVSYNC(uint08 active_vsync);
int08 ADC_GetActiveVSYNC(uint08 *active_vsync);
int08 ADC_SetCoastSource(uint08 coast_source);
int08 ADC_GetCoastSource(uint08 *coast_source);
int08 ADC_SetDevicePower(uint08 device_power);
int08 ADC_GetDevicePower(uint08 *device_power);
int08 ADC_SetVsyncSeparatorThreshold(uint16 vsync_sep_th);
int08 ADC_GetVsyncSeparatorThreshold(uint16 *vsync_sep_th);
int08 ADC_SetScanFunction(uint08 scan_function);
int08 ADC_GetScanFunction(uint08 *scan_function);
int08 ADC_SetInputCoastPolarityMode(uint08 coast_polarity);
int08 ADC_GetInputCoastPolarityMode(uint08 *coast_polarity);
int08 ADC_SetInputHSYNCPolarityMode(uint08 hsync_polarity);
int08 ADC_GetInputHSYNCPolarityMode(uint08 *hsync_polarity);
int08 ADC_SetSOGSlicerThreshold(uint08 slicer_threshold);
int08 ADC_GetSOGSlicerThreshold(uint08 *slicer_threshold);
int08 ADC_SetHDCPMasterSerialPortTriStated(uint08 not_tri_stated);
int08 ADC_GetHDCPMasterSerialPortTriStated(uint08 *not_tri_stated);

/* Clock generator control */
int08 ADC_SetPhase(uint08 phase);
int08 ADC_GetPhase(uint08 *phase);
int08 ADC_GetPhaseLimits(ADC_LimitStruct* limits); 
int08 ADC_SetVCORange(uint08 vco_range_select);
int08 ADC_GetVCORange(uint08 *vco_range_select);
int08 ADC_SetChargePumpCurrent (uint08 charge_pump_current);
int08 ADC_GetChargePumpCurrent (uint08 *charge_pump_current);
int08 ADC_SetVCORangeAndChargePumpCurrent(uint08 vco_range_select, 
                                          uint08 charge_pump_current);
int08 ADC_SetSampleClock(uint16 clocks_per_line, 
                         uint32 pixel_rate, 
                         uint32 horz_freq);
int08 ADC_SetPreCoast(uint08 pre_coast);
int08 ADC_GetPreCoast(uint08 *pre_coast);
int08 ADC_SetPostCoast(uint08 post_coast);
int08 ADC_GetPostCoast(uint08 *post_coast);                         
                                                   
#ifdef __cplusplus		/* matches __cplusplus construct above */
}
#endif

#endif /* __ADC_H */